DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of claim 1-10,21-30 in the reply filed on 02/10/2026 is acknowledged.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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Claims 1-10,21-30 rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 11532658. Although the claims at issue are not identical, they are not patentably distinct from each other because:
With respect to claim 1, the patented case discloses forming a plurality of photodiodes (claim 1) in a substrate (claim 1);forming an interconnect structure (claim 1) on a front-side of the substrate (claim 1) ;forming a barrier layer (Claim 1) on the substrate (Claim 1); depositing a metal layer over the barrier layer (claim 1);forming an adhesion enhancement layer (claim 1) over the metal layer (claim 1);forming an oxide layer over the adhesion enhancement layer (claim 1); and etching the oxide layer (claim 1), the adhesion enhancement layer (claim 1), the metal layer (claim 1), and the barrier layer to form an oxide grid (claim 1), an adhesion enhancement grid (claim 1), a metal grid (claim 1), and a barrier grid (claim 1), respectively. However, claim 1 does not explicitly disclose wherein the barrier grid and the adhesion enhancement grid have a same chemical element, and the grid is formed on a back-side of the substrate. On the other hand, claim 12 discloses that barrier grid and adhesion layer have the same chemical element. It would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify claim 1 according to the teachings of the claim 12, such that adhesion and barrier layers have the same chemical element as a design choice. Furthermore, it would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify claim 1 such that grid structure is formed on the back of the substrate, in order to avoid ILD to interfere with light capture by the pixels.
With respect to claim 2, the patented case discloses wherein the chemical element comprises nitrogen (claim 5,12).
With respect to claim 3, the patented case discloses wherein the adhesion enhancement layer is made of silicon nitride (claim 10, silicon nitride has refractive index in that range).
With respect to claim 4, the patented case does not disclose wherein the barrier layer is made of a metal-containing nitride material. O the other hand, it would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify the patented case such that TiN is used as a barrier layer, because of it’s stability.
With respect to claim 5, the patented case discloses wherein the adhesion enhancement layer has a refractive index in a range from about 1.5 to about 2.5 (claim 10).
With respect to claim 6, the patented case does not explicitly disclose wherein the adhesion enhancement grid has a thickness less than a thickness of the metal grid. "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
With respect to claim 7, the patented case does not explicitly disclose wherein the adhesion enhancement grid has a thickness in a range from about 230 angstroms to about 300 angstroms. However, "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
With respect to claim 8, the patented case discloses wherein the adhesion enhancement grid comprises gridlines each having a width that increases as a distance from the semiconductor substrate increases (claim 6).
With respect to claim 9, the patented case discloses wherein the adhesion enhancement grid comprises gridlines each having a width in a range from about 10 angstroms to about 500 angstroms (claim 9).
With respect to claim 10, the patented case discloses wherein the metal layer is made of tungsten (claim 5).
With respect to claim 21, the patented case in claim 1, discloses: forming a plurality of image sensing elements in a semiconductor substrate (claim 1); forming an interconnect structure on a front-side of the semiconductor substrate (claim 1); forming a barrier layer on a back-side of the semiconductor substrate (claim 1),; depositing a metal layer over the barrier layer; forming an adhesion enhancement layer over the metal layer (claim 1); forming an oxide layer over the adhesion enhancement layer (claim 1); and patterning the oxide layer, the adhesion enhancement layer, the metal layer, and the barrier layer in a single patterning sequence to form an oxide grid (claim 1), an adhesion enhancement grid (claim 1), a metal grid, and a barrier grid, respectively (claim 1). However, claim 1 does not explicitly disclose the barrier layer comprising a metal-containing nitride; the adhesion enhancement layer comprising a nitride material that includes a same chemical element as the barrier layer; and the gridlines are all formed in a single patterning process; and the grid is formed on a back-side of the substrate. On the other hand, claim 5 discloses the enhancement grid is made out of nitride material. It would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify the claim 1 according to the teachings of the claim such that nitride material is made from nitride material as a design choice. Furthermore, it would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify claim 1 such that the barrier layer is made from metal containing nitride because of it’s stability. Furthermore, it would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify claim 1 such that grid structure is formed on the back of the substrate, in order to avoid ILD to interfere with light capture by the pixels. Furthermore, it would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify claim 1 such that single patterning process is used to form the gridlines, to cut the cost of the manufacturing.
With respect to claim 22, the patented case discloses wherein the same chemical element included in the barrier layer and the adhesion enhancement layer comprises nitrogen (claim 5,12).
With respect to claim 23, the patented case does not explicitly disclose wherein the adhesion enhancement layer is formed to a thickness less than a thickness of the metal layer. However, "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
With respect to claim 24, wherein the adhesion enhancement grid formed from the adhesion enhancement layer laterally and vertically separates the metal grid from the oxide grid (claim 1), such that no oxide/metal interface is formed during the patterning (claim 1).
With respect to claim 25, the patented case does not explicitly disclose wherein patterning the oxide layer, the adhesion enhancement layer, the metal layer, and the barrier layer in the single patterning sequence comprises etching the oxide layer, the adhesion enhancement layer, the metal layer, and the barrier layer using a same etching process. It would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify claim 1 such that single patterning process is used to form the gridlines, to cut the cost of the manufacturing.
With respect to claim 26, the patented case discloses: forming a plurality of photodiodes (claim 1) in a semiconductor substrate (claim 1); forming an interconnect structure on a front-side of the semiconductor substrate (claim 1); forming a barrier layer (claim 1), a metal layer (claim 1), an adhesion enhancement layer (claim 1), and an oxide layer in sequence (claim 1); etching the oxide layer (claim 1), the adhesion enhancement layer, the metal layer, and the barrier layer to form a plurality of stacked gridlines (claim 1); and configuring the stacked gridlines such that the adhesion enhancement layer laterally and vertically separates the metal layer from the oxide layer (claim 1), the stacked gridlines being without an oxide/metal interface (claim 1). However, claim 1, does not explicitly disclose that the patented case discloses that the grid lines are formed on a back-side of the semiconductor substrate. It would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify claim 1 such that grid structure is formed on the back of the substrate, in order to avoid ILD to interfere with light capture by the pixels
With respect to claim 27, the patented case does not explicitly disclose wherein etching the oxide layer, the adhesion enhancement layer, the metal layer, and the barrier layer forms the stacked gridlines each having an inclined sidewall profile. However, it would have been obvious to one of ordinary skill in the art at the time of the filing of the invention such that grid lines would have an inclined surfaces as a design choice.
With respect to claim 28, the patented case does not explicitly disclose wherein the stacked gridlines are formed such that a width of at least one of the stacked gridlines varies along a direction perpendicular to the back-side of the semiconductor substrate. However, it would have been obvious to one of ordinary skill in the art at the time of the filing of the invention such a width of at least one of the stacked gridlines varies along a direction perpendicular to the back-side of the semiconductor substrate as a design choice
With respect to claim 29, the patented case discloses wherein the stacked gridlines are configured such that the oxide layer is free of direct physical contact with the metal layer (claim 1).
With respect to claim 30, the patented case discloses wherein the adhesion enhancement layer comprises a nitride material (claim 2).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALI N NARAGHI whose telephone number is (571)270-5720. The examiner can normally be reached 10am-6pm.
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/ALI NARAGHI/Primary Examiner, Art Unit 2817
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