Prosecution Insights
Last updated: July 17, 2026
Application No. 18/072,127

DEVICE WITH PLASMA INDUCED DAMAGE (PID) PROTECTION

Non-Final OA §112
Filed
Nov 30, 2022
Examiner
ZHU, SHENG-BAI
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Globalfoundries U.s. Inc.
OA Round
4 (Non-Final)
62%
Grant Probability
Moderate
4-5
OA Rounds
0m
Est. Remaining
68%
With Interview

Examiner Intelligence

Grants 62% of resolved cases
62%
Career Allowance Rate
444 granted / 714 resolved
-5.8% vs TC avg
Moderate +6% lift
Without
With
+6.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
64 currently pending
Career history
780
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
95.1%
+55.1% vs TC avg
§102
3.0%
-37.0% vs TC avg
§112
1.3%
-38.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 714 resolved cases

Office Action

§112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Detailed Action Drawings Objection The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the limitations “the second portion not forming a circuit with the first portion and the transistor” and “the second portion connecting directly to the substrate via a contact that extends into the N-well and that laterally contacts the source region or drain region” in Claims 4 and 12 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. In the response filed on 4/14/2026, the Applicant states that the limitations are shown in FIG. 5. The Examiner believes the Application defines the second region as 14, which connects directly to the substrate via a contact (25) that extends into the N-well (12) and that laterally contacts the source region or drain region (24). However, this means the second portion forms a circuit with the first portion and the transistor (electrically connected each other). Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections – 35 U.S.C. 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 4, 5, 7-17, and 19 rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the enablement requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to enable one skilled in the art to which it pertains, or with which it is most nearly connected, to make and/or use the invention. Claims 4 and 12 each includes the limitations “the second portion not forming a circuit with the first portion and the transistor” and “the second portion connecting directly to the substrate via a contact that extends into the N-well and that laterally contacts the source region or drain region”. One of ordinary skill in the art would not understand how to make a device with a second portion connecting directly to the substrate via a contact that extends into the N-well and that laterally contacts the source region or drain region, while the second portion does not form a circuit with the first portion and the transistor. Claims 5, 7-11, 13-17, and 19 depend from Claims 4 and 17. Pertinent Art Xu (CN 107393908) discloses an N-well (NW), wherein a portion of the N-well extends directly underneath the active region, the source region, and the drain region; and a first gate-protecting line at a first wiring level above the substrate, the first gate-protecting line comprising a first portion and a second portion, the second portion not forming a circuit with the first portion and the transistor (separated by fuse 401), the first portion connecting to the gate structure of the transistor and the second portion connecting to the N-well. Zhuang (CN 104464816) discloses an N-well (76), wherein a portion of the N-well extends directly underneath the active region, the source region (172), and the drain region (174); and a first gate-protecting line at a first wiring level above the substrate, the first gate-protecting line comprising a first portion (WLRB) and a second portion (WLPB), the second portion not forming a circuit with the first portion and the transistor, the first portion connecting to the gate structure of the transistor and the second portion connecting to the N-well. Han (CN 112151620) discloses an N-well (11), wherein a portion of the N-well extends directly underneath the active region, the source region (14), and the drain region (12). Zheng (U.S. Patent Pub. No. 20030201819) discloses an N-well (220), wherein a portion of the N-well extends directly underneath the active region, the source region (224), and the drain region (226). US 6060347 discloses the second portion of the first gate-protecting line directly contacts the N-well. Pertinent art also includes US 6537883 and 6013927; and Miyata (JP 3075892). Response to Arguments Applicant’s arguments with respect to Claims 4 and 12 have been considered but are moot because the arguments do not apply to any of the references being used in the current rejection. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHENG-BAI ZHU whose telephone number is (571)270-3904. The examiner can normally be reached on 11am – 7pm EST. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chad Dicke can be reached on (571)270-7996. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SHENG-BAI ZHU/Primary Examiner, Art Unit 2897
Read full office action

Prosecution Timeline

Show 9 earlier events
Oct 29, 2025
Response after Non-Final Action
Jan 14, 2026
Non-Final Rejection mailed — §112
Apr 14, 2026
Response Filed
Apr 28, 2026
Final Rejection mailed — §112
Jun 04, 2026
Interview Requested
Jun 15, 2026
Examiner Interview Summary
Jun 15, 2026
Applicant Interview (Telephonic)
Jun 18, 2026
Response after Non-Final Action

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

4-5
Expected OA Rounds
62%
Grant Probability
68%
With Interview (+6.0%)
2y 9m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 714 resolved cases by this examiner. Grant probability derived from career allowance rate.

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