DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
Claims 33 and 36-39 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
The term “wavy” in claim 33 is a relative term which renders the claim indefinite. The term “wavy” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention.
A person of ordinary skill in the art at the time the invention was filed would recognize that all man-made materials include some degree of variation in thickness uniformity. The term ‘wavy’ as used in the claim appears to refer to a degree of variation in thickness or surface planarity. However, the claim fails to quantify the degree of variation required to be considered wavy. Accordingly, one of ordinary skill in the art would not be reasonably apprised of the scope of the invention, rendering the scope of claim 33 indefinite.
For the purposes of compact prosecution, the Examiner has interpreted claim 33 to mean:
33. (New) The method of claim 8, wherein the first conductive layer is laminated on a top surface of a dielectric structure, and the second conductive layer is laminated on a bottom surface of the dielectric structure,
Claim 36 recites the term ‘predetermining’ in lines 4-5. These terms appear to refer to steps of the claimed method. However, there do not appear to be any particular recited methods or criteria for these steps. It is unclear if these are actively performed steps that are part of the claimed method, or merely intended target values established prior to performing the claimed method. As such, the scope of claim 36 is indefinite.
Furthermore, claim 36 recites a ‘desired elevation’ and a ‘tolerance of the desired elevation’. Since there are no references or criteria provided, or even which element is to be considered (for example an elevation of the workpiece, the dielectric layer, the conductive layer, or some other feature), these are essentially unbounded ranges, and could encompass and value including zero. For these additional reasons, the scope of claim 36 is indefinite.
For the purposes of compact prosecution, the Examiner has interpreted claim 36 to mean:
36. (New) A method for manufacturing a substrate, comprising:
providing a workpiece with a dielectric layer and a conductive layer stacked thereon, wherein the conductive layer has a bottom surface facing the dielectric layer and a top surface;
electrically connecting the top surface of the conductive layer to a current source, wherein the current source is electrically connected to a drilling tool;
determining a start point when the drilling tool contacts the top surface of the conductive layer;
recording an elevation of the start point; and
drilling the workpiece when the elevation of the start point is located within [[the predetermined range]] a predetermined elevation tolerance.
Claims 37-39 depend on claim 36 and are rejected under 35 USC §112(b) for implicitly including the indefinite subject matter above.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1, 8, 12, 28-29, 33-36 and 38-39 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. (PG Pub. No. US 2019/0074247 A1) in view of Yang et al. (PG Pub. No. US 2015/0047892 A1).
Regarding claim 1, Wang teaches a method for manufacturing a substrate, comprising:
providing a carrier (¶ 0020: printed circuit board 50) with a dielectric layer and a conductive layer (¶ 0020: 50 includes insulator 40 and conductive pad 30) stacked thereon, wherein the conductive layer has a bottom surface facing the dielectric layer and a top surface (fig. 1-2A among others: bottom surface of 30 faces 40;
determining a start point when the drilling tool contacts the comprising the top surface of the conductive layer (¶ 0020: drilling process through 30 includes starting when a non-illustrated drilling tool contacts the top surface of 30); and
drilling the conductive layer since the start point and drilling toward the dielectric layer (¶ 0020: blind via 46 formed by drilling through 30 toward 40) by a predetermined distance no less than a thickness of the conductive layer (fig. 1-2A: 46 includes a depth equal to or greater than thickness of 30).
Wang does not teach the method further comprises electrically connecting the top surface of the conductive layer to a current source, wherein the current source is electrically connected to the drilling tool.
Yang teaches a method including electrically connecting a top surface of a conductive layer to a current source (¶ 0060: top surface of 2012 electrically connected to current signal in a conductive loop), wherein the current source is electrically connected to a drilling tool (fig. 2: current signal in conductive loop electrically connected to backdrilling device 202).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to configure the method of Wang with the current source of Yang, as a means to accomplish higher backdrilling precision (Yang, ¶ 0057).
Regarding claim 8, Wang teaches a method for manufacturing a substrate, comprising:
providing a structure including a first conductive layer (¶ 0020: 30) and a second conductive layer (¶ 0020: 70) under the first conductive layer (fig. 1-2A: in an inverted orientation, 70 disposed under 30);
contacting a top surface of the first conductive layer with a drilling tool to determine a first start point (¶ 0020 & fig. 1-2A: drilling of 50 includes contacting a drill apparatus to a top surface 31 of pad 30);
drilling since the first start point (fig. 1-2A: drilling initiates on surface 31);
contacting a top surface of the second conductive layer with the drilling tool to determine a first end point (fig. 1-2A: drilling to form 46 includes contacting surface 722 of 70); and
stopping drilling after determining the first end point (fig. 1-2A: drilling does not penetrate 70).
Wang fails to teach the method further comprises:
electrically connecting the top surface of the first conductive layer to a current source, wherein the current source is electrically connected to a drilling tool; and
electrically connecting a bottom surface of the second conductive layer to the current source.
Yang teaches a method including:
electrically connecting a top surface of a conductive layer to a current source (¶ 0060 & fig. 2: top surface of 2011 electrically connected to current signal in a conductive loop), wherein the current source is electrically connected to a drilling tool (fig. 2: current signal in conductive loop electrically connected to backdrilling device 202); and
electrically connecting a bottom surface of a second conductive layer to the current source (fig. 3: bottom surface of second conductive layer 2012 electrically connected to current signal in the conductive loop).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to configure the method of Wang with the current source of Yang, as a means to accomplish higher backdrilling precision (Yang, ¶ 0057).
Regarding claim 12, Wang in view of Yang teaches the method of claim 8, further comprising:
contacting the top surface of the first conductive layer with a drilling tool to determine a second start point (Wang, fig. 1-2A: drilling implement contacts a second region of 30);
drilling since the second start point (Wang, fig. 1-2A: second 46 formed by drilling in second region staring from surface 31);
contacting the top surface of the second conductive layer with the drilling tool to determine a second end point (Wang, fig. 1-2A: surface 722 in second region contacted by drilling implement); and
stopping drilling after determining the second end point (Wang, fig. 1-2A: drilling stops after contacting surface 722), wherein an elevation of the first start point is different from an elevation of the second start point (Wang, second 46 laterally offset from first 46, such that elevations originate in different locations of 50).
Wang in view of Yang as applied to claim 8 above does not teach wherein an elevation of the first end point is different from an elevation of the second end point, wherein a first drilling depth from the first start point to the first end point is different form a second drilling depth from the second start point to the second end point.
However, Yang does teach an elevation of a drilling endpoint of a first hole is different from an elevation of a drilling endpoint of a second hole (fig. 3: bottom of second preset depth different from bottom of first preset depth), and a first drilling depth from the first start point to the first end point is different form a second drilling depth from the second start point to the second end point (fig. 3: distance between 2011 and 2012 different from distance between 2012 and 2013).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to configure the holes of Wang in view of Yang with different elevations, as a means to make electrical contact to conductive layers at different elevation levels with features such as ground, power, or signal levels.
Regarding claim 28, Wang in view of Yang teaches the method of claim 1, wherein the step of electrically connecting the top surface of the conductive layer to the current source includes:
contacting the top surface of the conductive layer with a conductive pressing element (Yang, figs. 2-3: top surface of 2811 or 2812 electrically contacted by pressing conductive drill 202/203), wherein the conductive pressing element is electrically connected to the current source (Yang, ¶ 0060 & figs. 2-3: 202/203 electrically connected to electric signal).
Regarding claim 29, Wang in view of Yang teaches the method of claim 28, further comprising:
forming an electrical loop through electrical connections of the drilling tool, the top surface of the conductive layer, the conductive pressing element and the current source when the drilling tool contacts the conductive layer (Yang, ¶ 0060 & figs. 2-3: electrical loop formed by top surface of 2011/2012, 202/203 and electric current generation).
Regarding claim 33, Wang in view of Yang teaches the method of claim 8, wherein the first conductive layer is laminated on a top surface of a dielectric structure (Wang, fig. 1-3: 30 laminated on 40, and/or Yang, fig. 2: 2011 laminated on PCB), and the second conductive layer is laminated on a bottom surface of the dielectric structure (Wang, fig. 1-3: 70 laminated on bottom of 40, and/or Yang, 2012 laminated on bottom surface of top portion of PCB), wherein both the top surface of the first conductive layer and the bottom surface of the second conductive layer are wavy (not given patentable weight, see 35 USC § 112(b) rejection above, wherein the entire first conductive layer is electrically insulated from the entire second conductive layer (Wang, fig. 1-3: 30 electrically insulated from 70, and/or Yang, fig. 3: after drilling, entire layer 2011 electrically isolated from 2012).
Regarding claim 34, Wang in view of Yang teaches the method of claim 8, wherein the step of electrically connecting the top surface of the first conductive layer to the current source includes:
contacting the top surface of the first conductive layer with a first conductive pressing element, (Yang, figs. 2-3: top surface of 2811 or 2812 electrically contacted by pressing conductive drill 202/203), wherein the first conductive pressing element is electrically connected to the current source (Yang, ¶ 0060 & figs. 2-3: 202/203 electrically connected to electric signal);
wherein the step of electrically connecting the bottom surface of the second conductive layer to the current source includes:
contacting the bottom surface of the second conductive layer with a second conductive pressing element (Yang, figs. 2-3: bottom surface of 2812 electrically contacted by pressing conductive drill 202/203), wherein the second conductive pressing element is electrically connected to the current source (Yang, ¶ 0060 & figs. 2-3: 202/203 electrically connected to electric signal).
Regarding claim 35, Wang in view of Yang teaches the method of claim 34, further comprising:
forming a first electrical loop through electrical connections of the drilling tool, the top surface of the first conductive layer, the first conductive pressing element and the current source when the drilling tool contacts the top surface of the first conductive layer (Yang, ¶ 0060 & fig. 2: electrically conductive loop formed by 202/203, top surface of 2811, connection wire and generated electric signal when 203 contacts top surface of 2811); and
forming a second electrical loop through electrical connections of the drilling tool, the bottom surface of the second conductive layer, the second conductive pressing element and the current source when the drilling tool contacts the top surface of the second conductive layer (Yang, ¶ 0063 & fig. 3: electrically conductive loop formed by 202/203, bottom surface of 2812, connection wire and generated electric signal when 203 contacts top surface of 2812).
Regarding claim 36, Wang teaches a method for manufacturing a substrate, comprising:
providing a workpiece (¶ 0020: 50) with a dielectric layer (¶ 0020: 40) and a conductive layer (¶ 0020: 30) stacked thereon (fig. 1-3: 50 includes 30 stacked on 40), wherein the conductive layer has a bottom surface facing the dielectric layer and a top surface (fig. 1-3: 30 has bottom surface facing 40 and a top surface exposed from 40);
predetermining a desired elevation (not given patentable weight, see 35 USC § 112(b) rejection above);
predetermining a range of a first level and a second level, wherein the first level is a top limit of a tolerance of the desired elevation, wherein the second level is a bottom limit of a tolerance of the desired elevation (not given patentable weight, see 35 USC § 112(b) rejection above);
determining a start point when a drilling tool contacts the top surface of the conductive layer (¶ 0020 & fig. 1-3: forming blind via includes non-illustrated drilling tool contacting top surface of 30); and
drilling the workpiece when an elevation of the start point is located within a predetermined range (¶ 0020: drilling of 44 commences when non-illustrated drill contacts 30).
Wang does not teach the method further comprises:
electrically connecting the top surface of the conductive layer to a current source, wherein the current source is electrically connected to a drilling tool; and
recording an elevation of the start point.
Yang teaches a method including electrically connecting a top surface of a conductive layer to a current source (¶ 0060 & fig. 2: top surface of conductive layer 2011 electrically connected to current signal in a conductive loop), wherein the current source is electrically connected to a drilling tool (¶ 0060 & fig. 2: conductive loop electrically connected to drill 202/203).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to configure the method of Wang with an electrically connected drill, as a means to improve backdrilling precision, thereby controlling the backdrilling depth (Yang, ¶¶ 0064-0065).
Furthermore, said artisan would recognize that including a step of recording an elevation of the start point would be obvious as a means for performing a calculation of the drilling depth, such as minimum and maximum values of preset depths (Yang, ¶¶ 0040, 0049). Accordingly, such a modification would be well within the grasp of said skilled artisan.
Regarding claim 37, Wang in view of Yang teaches the method of claim 36, wherein after recording the elevation of the start point, the method further comprises:
comparing the elevation of the start point with the predetermined range so as to determine whether the elevation of the start point is located within the predetermined range (Yang, ¶ 0038: drilling starts from the surface of the PCB, meeting the broadest reasonable interpretation of “determine whether the elevation of the start point is located within the predetermined range”).
Regarding claim 39, Wang in view of Yang teaches the method of claim 36, wherein the step of drilling the workpiece includes:
drilling the workpiece since the start point toward the dielectric layer by a predetermined distance no less than a thickness of the conductive layer (Wang, fig. 1-3: 50 drilled from top of 2011 toward 40 through at least a thickness of 30).
Claims 4-5 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Wang in view of Yang as applied to claim 1 above, and further in view of Lin et al. (PG Pub. No. US 2024/0114625 A1).
Regarding claim 4, Wang in view of Yang teaches the method of claim 1, wherein the step of determining the start point when the drilling tool contacts the top surface of the conductive layer includes:
determining a first start point of the top surface of the conductive layer when a drilling tool contacts the top surface (¶ 0020: drilling contacts top/outer surface of 30 to form left opening 34); and
determining a second start point of the top surface of the conductive layer when the drilling tool contacts the conductive layer again (implicit: second via 46 formed by right opening 34).
Wang is silent to wherein the second start point is not level with the first start point.
Lin teaches a method including a first start point of a top surface of a conductive layer of a circuit board, and a second start point of the top surface of the conductive layer of the circuit board (¶ 0019: plurality of back-drilled vias to be drilled in a circuit board), wherein the second start point is not level with the first start point (¶ 0040: circuit board has an uneven thickness).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to configure the method of Wang to include the second start point not level with the first start point, as a means to compensate the drilling depth, improving the accuracy of the target back-drilling depth or the target relative height (Lin, ¶ 0027).
Regarding claim 5, Wang in view of Yang and Lin teaches the method of claim 4, wherein the step of drilling the conductive layer since the start point and drilling toward the dielectric layer by the predetermined distance no less than the thickness of the conductive layer includes:
drilling the conductive layer since the first start point and drilling toward the dielectric layer by a first predetermined distance no less than the thickness of the conductive layer so as to form a first hole (Wang, fig. 1-2A: drilling of left 46 extends from bottom surface of 30 toward 40 no less than thickness of 30 to form first hole 36); and
drilling the conductive layer since the second start point and drilling toward the dielectric layer by a second predetermined distance no less than the thickness of the conductive layer and substantially equal to the first predetermined distance so as to form a second hole (Wang, fig. 1-2A: drilling of right 46 extends from bottom surface of 30 toward 40 no less than thickness of 30, substantially equal to depth of left 46 to form hole 36).
Wang in view of Yang and Lin as applied to claim 4 above does not teach wherein an elevation of a bottommost end of the first hole is different from an elevation of a bottommost end of the second hole.
However, Yang does teach an elevation of a bottommost end of a first hole is different from an elevation of a bottommost end of the second hole (fig. 3: bottom of second preset depth different from bottom of first preset depth).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to configure the holes of Wang in view of Yang and Lin with different elevations, as a means to make electrical contact to conductive layers at different elevation levels with features such as ground, power, or signal levels.
Regarding claim 7, Wang in view of Yang and Lin teaches the method of claim 5, wherein in the step of providing the carrier, the conductive layer is a continuous and intact layer, wherein both of the first hole and the second hole are blind holes that are embedded in the dielectric layer and are detectable from a top view (Wang, ¶ 0020 & fig. 1-3: first and second blind vias extend through surface of 34/40 and therefore at least visually detectable from a top view), wherein the method further comprises:
patterning at least a portion of the conductive layer according to the first hole and the second hole (Wang, fig. 1-2A: 30 patterned into portions surrounding openings in 34).
Claim 31 is rejected under 35 U.S.C. 103 as being unpatentable over Wang in view of Yang and Lin as applied to claim 7 above, and further in view of Standing et al. (PG Pub. No. US 2020/0335446 A1).
Regarding claim 31, Wang in view of Yang and Lin teaches the method of claim 7, comprising a carrier (Wang, 50) a dielectric layer (Wang, 40) and first and second holes (Wang, blind vias 44).
Wang in view of Yang and Lin does not teach wherein the carrier further includes an electronic device encapsulated by the dielectric layer, wherein both of the first hole and the second hole do not vertically overlap the electronic device.
Standing teaches a substrate (fig. 18 among others) including an electronic device (¶ 0059: 100) encapsulated by a dielectric layer (¶ 0062, fig. 18: 100 encapsulated by spacer 114), wherein both of a first hole and a second hole (¶ 0070: plurality of drilled contact holes 138) do not vertically overlap the electronic device (figs. 16-18: 138 do not vertically overlap 100).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to configure the method of Wang in view of Yang and Lin with the electronic device and first and second hole alignment of Standing, as a means to electrically couple underlying conductive layers in combination with an integrated circuit device (Standing, ¶ 0102), increasing functionality of the carrier and/or substrate.
Claims 13, 25 and 32 are rejected under 35 U.S.C. 103 as being unpatentable over Wang in view of Yang as applied to claims 1 and 12 above, and further in view of Araki et al. (PG Pub. No. US 2015/0245494 A1).
Regarding claim 13, Wang in view of Yang teaches the method of claim 12, comprising an elevation of the first start point and an elevation of the second start point (Wang, fig. 1-2A: elevations of surface 31 starting blind vias 46 in left and right regions).
Wang is silent to the method further comprising:
recording the elevation of the first start point and the elevation of the second start point; and
estimating a flatness of the structure from a variation between the elevation of the first start point and the elevation of the second start point.
Araki teaches a method including recording an elevation of a drill starting point, and determining a respective board thickness (HA, HB) from a reference depth detection region (¶¶ 0016, 0043 & fig. 2: HA, HB determined in part by detecting and storing height of an upper surface position of the multilayer printed wiring board when the drill bit is brought into contact with a conductive sheet affixed onto the multilayer printed wiring board).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to configure the method of Wang in view of Yang to include elevation storage and flatness estimation of the structure, as a means to ensure drilling depth accuracy in a wiring board having variations in thickness of its layers or its board thickness (Araki, ¶ 0021).
Regarding claim 25, Wang in view of Yang teaches the method of claim 12, further comprising:
determining a first thickness of a first portion of the substrate by a difference between an elevation of the first start point and an elevation of the first end point (Wang, fig. 1-2A: depth of left opening 34); and
determining a second thickness of a second portion of the substrate by a difference between an elevation of the second start point and an elevation of the second end point (Wang, fig. 1-2A: depth of right opening 34).
Wang fails to teach the method further comprises:
recording the elevation of the first start point, the elevation of the first end point, the elevation of the second start point and the elevation of the second end point; and
determining a thickness uniformity of the substrate by comparing the first thickness and the second thickness.
Araki teaches drilling into at least two regions of a carrier (¶ 0028 & fig. 2: openings drilled into regions of wiring board 1),
recording the elevation of the first start point, the elevation of the first end point, the elevation of the second start point and the elevation of the second end point (¶¶ 0035, 0043: feed position information, including heights of surface of 1 and surface of 11, stored in a table); and
determining a first thickness of a first portion of the substrate by a difference between the elevation of the first start point and the elevation of the first end point (fig. 2: depth HA of opening 2 determined by difference between elevations of 1 and 11);
determining a second thickness of a second portion of the substrate by a difference between an elevation of the second start point and an elevation of the second end point (fig. 2: depth HB of opening 7 determined by difference between elevations of 1 and 11); and
determining a thickness uniformity of the substrate by comparing the first thickness and the second thickness (¶¶ 0043: ratio including board thickness data HA obtained in the backdrilling portion 1A, and board thickness data HB obtained in the reference depth detection region 1B).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to configure the method of Wang to include determining a thickness uniformity of the substrate, as a means to ensure the drilling depth accuracy in a multilayer printed wiring board having variations in thickness of its layers or its board thickness (Araki, ¶ 0012).
Regarding claim 32, Wang in view of Yang teaches the method of claim 1, further comprising:
determining whether an elevation of the start point is located within a predetermined range between a predetermined top elevation and a predetermined bottom elevation (Wang, ¶ 0020: 34 formed by drilling, which implicitly includes determining if a drill starting point is within an acceptable range), wherein the predetermined top elevation is higher than a predetermined desired elevation, and the predetermined bottom elevation is lower than the predetermined desired elevation (Wang, fig. 1-2A among others: drill starting point of surface 31 and ending point of surface 722 implicitly requires starting the drill process at or higher than surface of 31, and at or below surface 722).
Wang in view of Yang does not teach the method further comprising recording the elevation of the start point.
Araki teaches a method including recording an elevation of a drill starting point (¶¶ 0016, 0043 & fig. 2: HA, HB determined in part by detecting and storing height of an upper surface position of the multilayer printed wiring board when the drill bit is brought into contact with a conductive sheet affixed onto the multilayer printed wiring board).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to configure the method of Wang in view of Yang to include recording/storage of the starting point elevation, as a means to ensure drilling depth accuracy in a wiring board having variations in thickness of its layers or its board thickness (Araki, ¶ 0021).
Allowable Subject Matter
Claim 30 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim 38 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: The prior art fails to teach or clearly suggest the limitations stating:
“drilling since the first start point toward the dielectric layer by a first predetermined distance so as to form a first hole, wherein the first hole includes a first dimple recessed from a top surface of a second conductive layer under the dielectric layer; and
drilling since the second start point toward the dielectric layer by a second predetermined distance different from the first predetermined distance so as to form a second hole, wherein the second hole includes a second dimple recessed from the top surface of the second conductive layer under the dielectric layer” as recited in claim 30, and
“wherein a difference between the first level and the desired elevation is predetermined as about 5% of a thickness of the workpiece, wherein a difference between the second level and the desired elevation is predetermined as about 5% of the thickness of the workpiece” as recited in claim 38.
Response to Arguments
Applicant’s arguments, see page 9, filed 12/12/2025, with respect to the 35 USC § 112 rejections of claims 23-24 and 27 have been fully considered and are persuasive. Accordingly, these rejections have been withdrawn.
Applicant’s arguments with respect to the 35 USC § 102 and § 103 rejections of claim(s) 1-2, 6-8, 12, 23-24 and 27-39 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Meng (CN 112492759 B) teaches a method of determining the actual thickness h of the circuit board at each of a plurality of through hole positions.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/BRIAN TURNER/ Examiner, Art Unit 2818