DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on May 4, 2026 has been entered.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Yang (US Patent No. 10,622,479) in view of Lu et al (US Publication No. 2016/0163532), Liaw (US Publication No. 2020/0402971) and Shinohara (US Publication No. 2017/0221917).
Regarding claims 1 and 11, Yang discloses a method for fabricating a semiconductor device and a semiconductor device, comprising: forming a first gate structure on a substrate Fig 5B-1 to 5B-3; forming a spacer adjacent to the first gate structure Fig 5B-1 to 5B-3;forming an interlayer dielectric (ILD) layer on the first gate structure Fig 5C-1 to Fig 5C-2; and forming a first hard mask on the first gate structure and spacer Fig 5D-2 to Fig 5D-3, wherein a width of the first hard mask is greater than a width of the first gate structure Fig 5D-2 to Fig 5D-3. Yang discloses all the limitations but silent on the material used for the first hard mask.
Whereas Lu discloses the first hard mask Fig 2, 42 made of a conductive material comprising a metal nitride ¶0018 and 0028. Yang and Lu are analogous art because they are directed to semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Yang because they are from the same field of endeavor. Therefore it would have been obvious to one having ordinary skill of the art before the effective filing date of the claimed invention to modify the hard mask material of Yang and incorporate the teachings of Lu since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of design choice. In re Leshin, 125 USPQ 416 (1960). Yang and Lu disclose all the limitations except for the second ILD. Whereas Liaw discloses forming a first interlayer dielectric (ILD) layer on the first gate structure; Fig 2A, ILD-1 forming a first hard mask Fig 2A, 294/293/292 and Fig 5A, 592 on and directly contacting the first gate structure Fig 2A, 224/223/222/221, and forming a second ILD layer Fig 5A, ILD2 on and directly contacting the first hard mask Fig 5A, 592 and the first ILD layer Fig 5A, ILD1. While Shinohara discloses the arrangement of the second ILD relative to the sidewalls of the hard mask Fig 51. Yang Liaw, and Shinohara are analogous art because they are directed to semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Yang because they are from the same field of endeavor. Therefore it would have been obvious to one having ordinary skill of the art before the effective filing date of the claimed invention to modify the device of Yang and incorporate additional ILD to provide additional protection/isolation between interconnect.
Claims 2 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Yang (US Patent No. 10,622,479), Lu et al (US Publication No. 2016/0163532), Liaw (US Publication No. 2020/0402971) and Shinohara (US Publication No. 2017/0221917) in further view of Then et al (US Publication No. 2020/0098746).
Regarding claims 2 and 12, Yang discloses the method further comprising: forming the first gate structure on the first region, a second gate structure on the second region, a third gate structure on the third region, and a fourth gate structure on the fourth region Fig 3A; forming the ILD layer on the first gate structure, the second gate structure, the third gate structure, and the fourth gate structure Fig 3B-3C; performing a replacement metal gate (RMG) process to transform the first gate structure, the second gate structure, the third gate structure, and the fourth gate structure into a first metal gate, a second metal gate, a third metal gate, and a fourth metal gate Fig 5D- to Fig 9C; and forming the first hard mask on the first gate structure and a second hard mask on the second gate structure Fig 5D-1 to Fig 5D-3. Yang discloses all the limitations but silent on the type of region in the integrated circuit. Whereas Then discloses a substrate comprises a core region, a low noise amplifier (LNA) region, an input/output (I/O) region, and a power amplifier (PA) region ¶0064-0070. Yang and Then are analogous art because they are directed to semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Yang because they are from the same field of endeavor. Therefore it would have been obvious to one having ordinary skill of the art before the effective filing date of the claimed invention to modify the type of regions in Yang and incorporate the teachings of Then to provide a more diverse integrated circuit to form a computing device.
Claims 3-4, 7-9 and 13-14, 17-19 are rejected under 35 U.S.C. 103 as being unpatentable over Yang (US Patent No. 10,622,479) in view of Lu et al (US Publication No. 2016/0163532), Liaw (US Publication No. 2020/0402971), Shinohara (US Publication No. 2017/0221917), Then et al (US Publication No. 2020/0098746) and Ho et al (US Publication No. 2015/0228646).
Regarding claims 3 and 13, Yang discloses all the limitations except for the contact etch stop layer. Whereas Ho discloses forming a first contact etch stop layer (CESL) adjacent to one side of the first gate structure and a second CESL adjacent to another side of the first gate structure before performing the RMG process Fig 2B, 309. Yang and Ho are analogous art because they are directed to semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Yang because they are from the same field of endeavor. Therefore it would have been obvious to one having ordinary skill of the art before the effective filing date of the claimed invention to modify the device of Yang and incorporate the teachings of Ho to provide added insulation to the device.
Regarding claims 4 and 14, Ho discloses the width of the first hard mask is greater than a distance between the first CESL to the second CESL Fig 2F.
Regarding claims 7 and 17, Ho discloses forming a third CESL Fig 2B, 309 adjacent to one side of the third gate structure and a fourth CESL Fig 2B, 309 adjacent to another side of the third gate structure before performing the RMG process; and forming a third hard mask on the third gate structure and a fourth hard mask on the fourth gate structure Fig 2B.
Regarding claims 8 and 18, Ho discloses wherein a width of the third hard mask is greater than a width of the third gate structure Fig 2F.
Regarding claims 9 and 19, Ho discloses wherein a sidewall of the third hard mask is aligned with a sidewall of the third CESL Fig 2F.
Claims 5-6, 10 and 15-16, 20 are rejected under 35 U.S.C. 103 as being unpatentable over Yang (US Patent No. 10,622,479) in view of Lu et al (US Publication No. 2016/0163532), Liaw (US Publication No. 2020/0402971), Shinohara (US Publication No. 2017/0221917), Then et al (US Publication No. 2020/0098746) and Hung et al (US Publication No. 2017/0103981).
Regarding claims 5 and 15, Yang discloses all the limitations but silent on the multiple mask. Whereas Hung discloses forming a third hard mask on the first hard mask and a fourth hard mask on the second hard mask Fig 4. Yang and Hung are analogous art because they are directed to semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Yang because they are from the same field of endeavor. Therefore it would have been obvious to one having ordinary skill of the art before the effective filing date of the claimed invention to modify the device of Yang and incorporate the teachings of Hung to provide added protection to the gate below from further processing.
Regarding claims 6 and 16, Hung discloses wherein a width of the first hard mask is equal to a width of the third hard mask Fig 4.
Regarding claims 10 and 20, Hung discloses forming a fifth hard mask on the third hard mask and a sixth hard mask on the fourth hard mask Fig 4.
Response to Arguments
Applicant’s arguments with respect to claims 1-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
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/CHRISTINE A ENAD/Primary Examiner, Art Unit 2811
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