CTNF 18/084,908 CTNF 100105 Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Continued Examination Under 37 CFR 1.114 07-42-04 AIA A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on January 21, 2026 has been entered. Priority 02-27 AIA Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed in parent Application No. JP2021-206922, filed on December 21, 2021 and patent Application No. JP2022-181677 , filed on November 14, 2022 . Information Disclosure Statement The information disclosure statements (IDS) submitted on March 11, 2026 and May 1, 2026 are being considered by the examiner. Response to Amendment This Office Action is in response to Applicant’s Amendment filed August 6, 2025. Claims 1, 6, 7, 8, and 19 are amended. Claims 18 and 24 are cancelled. The Examiner notes that claims 1-17 and 19-23 are examined. Claim Rejections - 35 USC § 112 07-30-02 AIA The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. 07-34-01 Claims 1-17 and 19-23 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. The limitation “and wherein the second annealing is performed at the second temperature such that the second amorphous silicon film is capable of maintaining an amorphous state without crystal nuclei of silicon being formed in the second amorphous silicon film” of claim 1 is indefinite because the metes and bounds of what temperatures anticipate the limitation is unclear. It is unclear whether the film being “capable” of maintaining an amorphous state requires that the film actually does maintain the amorphous state during the process and under what conditions an amorphous film must be capable of maintaining the state. For the purposes of this action the Examiner will consider prior art to read on this limitation if the annealing takes place between 400 and 800 degrees Celsius as these are the temperatures recited in para. 46 of the specification as the preferable range for the second annealing. Claim Rejections - 35 USC § 103 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim s 1-4, 11-17 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Bu (US 2018/0122634 B1) in view of Toet (Thin Solid Films, 1997), Hikavyy ( Semiconductor Science and Technology, 2017 ), and Ren (CN 107017153 A) . With respect to claim 1, Bu teaches: A method of forming a crystalline silicon film, the method comprising: forming a crystal nucleation film (microcrystalline layer 3) in which crystal nuclei of silicon are formed (silicon seeds 31) ; performing etching (para. 52, “the base substrate formed with the porous metal film is immersed into an etching liquid which comprises hydrogen fluoride and oxidants for etching the microcrystalline silicon layer”); forming an amorphous silicon film (amorphous silicon layer 5) on the crystal nuclei (silicon seeds 31) remaining after the etching; and forming the crystalline silicon film (poly-silicon layer 7) by performing an annealing on the substrate (base substrate 1 and buffer layer 2) (para. 55 “Irradiated the deposited amorphous silicon layer 5 with the excimer laser 6 can anneal and crystallize the amorphous silicon layer 5 so as to form the poly-silicon layer 7 as shown in FIG. 4H.”) after the forming of the amorphous silicon film (5) to grow the crystal nuclei. Bu differs from the claimed invention in that Bu does not specify the method in which the microcrystalline film is formed and teaches a wet etch instead of a dry (gas) etch. Therefore, Bu fails to teach: forming a first amorphous silicon film on a substrate; forming a crystal nucleation film in which crystal nuclei of silicon are formed by performing a first annealing at a first temperature on the substrate having the first amorphous silicon film formed thereon; performing etching with an etching gas; and forming the crystalline silicon film by performing a second annealing at a second temperature lower than the first temperature wherein during the performing etching, an amorphous silicon portion and fine crystal grains are removed from the crystal nucleation film while the crystal nuclei remain on the substrate. and wherein the second annealing is performed at the second temperature such that the second amorphous silicon film is capable of maintaining an amorphous state without crystal nuclei of silicon being formed in the second amorphous silicon film. Toet teaches: forming a first amorphous silicon film (a-Si) on a substrate (glass substrate (2. Growth Procedure “Our growth procedure was carried out on 410 nm thick a- Si films grown by low pressure chemical vapor deposition on glass substrates at 450 °C,”); forming a crystal nucleation film in which crystal nuclei of silicon are formed by performing a first annealing at a first temperature on the substrate having the first amorphous silicon film formed thereon (2. Growth Procedure “The crystallization seeds were using a cw Ar -laser beam created by locally melting the a-Si + (A = 514.5 nm) focused to a spot of ~ 1 μm diameter”); and forming the crystalline silicon film by performing a second annealing at a second temperature lower than the first temperature (3. Evolution of poly-Si “anneaIing at 600 °C for 5 h and 30 min” Toet teaches that the first annealing melts at least part of the Si, the melting point of silicon is higher than the 600°C of the second annealing at least in the portions where irradiation occurs) and wherein the second annealing is performed at the second temperature such that the second amorphous silicon film is capable of maintaining an amorphous state without crystal nuclei of silicon being formed in the second amorphous silicon film (The instant application teaches in para. 46 that the second annealing occurs at “typically about 600 degrees C”, the same temperature taught by Toet). The above limitations are obvious by modifying Bu by Toet through the use of a known technique to improve similar devices in the same way. The Graham factual inquiries for this rationale are: (1) a finding that the prior art contained a “base” device (method, or product) upon which the claimed invention can be seen as an “improvement;” (2) a finding that the prior art contained a “comparable” device (method, or product that is not the same as the base device) that has been improved in the same way as the claimed invention; (3) a finding that one of ordinary skill in the art could have applied the known “improvement” technique in the same way to the “base” device (method, or product) and the results would have been predictable to one of ordinary skill in the art; and (4) whatever additional findings based on the Graham factual inquiries may be necessary, in view of the facts of the case under consideration, to explain a conclusion of obviousness. Bu teaches a base method of growing a forming a polysilicon layer by depositing a-Si over a seed layer followed by annealing. Toet teaches a comparable method in which a seed layer is formed within an a-Si layer through laser annealing and the a-Si layer is formed by annealing at a lower temperature. The ordinary artisan could have applied the known technique of forming silicon seeds through laser annealing and the technique of annealing at 600° C to grow poly-Si from the seeds as taught by Toet with a predictable result of forming a poly-Si thin film See KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007). Hikavvy teaches: performing etching with an etching gas (abstract “The etching rate is strongly affected by the choice of the carrier gas (He, H2 and N2) and by the process pressure which gives high flexibility for its application. As compared to HCl, Cl2 allows decreasing of the etching process temperatures down to ∼ 400 °C for Si”); It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the teachings of Hikavyy into the method of Bu/Toet to etch the Si layer using a gas etch. The ordinary artisan would have been motivated to modify Bu/Toet in the manner set forth above for the purpose of “etch[ing] group IV materials in a low temperature range” (conclusions of Hikavyy) Ren teaches: wherein during the performing etching, an amorphous silicon portion and fine crystal grains are removed from the crystal nucleation film while the crystal nuclei remain on the substrate. (para. 89 “Among them, the plasma process uses plasma of gases such as argon Ar, helium He, nitrogen N2, hydrogen H2, etc. to treat the first amorphous silicon layer after crystallization treatment, removing the amorphous components and smaller grains in the first amorphous silicon layer after crystallization, as well as grains whose orientation does not meet the preset orientation.”) It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the teachings of Ren into the method of Bu/Toet/Hikavyy make the crystal nucleation film in a way in which the silicon layer has amorphous components and smaller grains that are removed by etching. The ordinary artisan would have been motivated to modify Bu/Toet/Hikavyy in the manner set forth above for the purpose of keeping only grains of a size and orientation that are desired (para. 89 of Ren) With respect to claim 2, Bu further teaches: wherein the substrate includes an underlayer film (buffer layer 2) formed on a base body (base substrate 1), and the first amorphous silicon film (amorphous thin film 32 which corresponds to microcrystalline film 3 after crystallization) is formed on the underlayer film (2 of Bu). It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Bu in view of Toet, Hikavyy, and Ren as explained above. With respect to claim 3, Bu further teaches: wherein the underlayer film (buffer layer 2) is an insulating film (para. 24, “the buffer layer is a SiN layer with a thickness of about 50 to 100 nm or a SiO layer with a thickness of about 150 to about 300 nm”, both silicon nitride and silicon oxide are known insulators) It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Bu in view of Toet, Hikavyy, and Ren as explained above. With respect to claim 4, Ren further teaches: wherein the amorphous silicon film has a thickness of 15 nm or less (para. 50 “The thickness of the first amorphous silicon layer is 100 angstroms” which is 10 nm) It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Bu in view of Toet, Hikavyy, and Ren as explained above. With respect to claim 11, Toet further teaches: wherein the first annealing is performed by laser irradiation (2. Growth Procedure “The crystallization seeds were using a cw Ar -laser beam created by locally melting the a-Si + (A = 514.5 nm) focused to a spot of ~ 1 μm diameter”) to form the crystal nucleation film (film with “crystallization seeds”) in a laser irradiation region (Toet teaches locally melting at specific spots separated by distances of 5 to 10 microns and arranged in a hexagonal lattice). It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Bu in view of Toet, Hikavyy, and Ren as explained above. With respect to claim 12, Toet further teaches: wherein the irradiation region (“spots of 1 μm) is selectively formed in the first amorphous silicon film (a-Si films). It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Bu in view of Toet, Hikavyy, and Ren as explained above. With respect to claim 13, Hikavyy further teaches: wherein the etching is performed by supplying an etching gas capable of etching silicon (abstract of Hikavyy “The etching rate is strongly affected by the choice of the carrier gas (He, H2 and N2) and by the process pressure which gives high flexibility for its application. As compared to HCl, Cl2 allows decreasing of the etching process temperatures down to ∼ 400 °C for Si”) It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Bu in view of Toet, Hikavyy, and Ren as explained above. With respect to claim 14, Hikavyy further teaches: wherein, in the performing the etching, Cl 2 gas is used as the etching gas (abstract of Hikavyy “The etching rate is strongly affected by the choice of the carrier gas (He, H2 and N2) and by the process pressure which gives high flexibility for its application. As compared to HCl, Cl2 allows decreasing of the etching process temperatures down to ∼ 400 °C for Si”) It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Bu in view of Toet, Hikavyy, and Ren as explained above. With respect to claim 15, Hikavyy further teaches: wherein the etching is performed at a temperature of 200 to 500 degrees C (abstract of Hikavyy “The etching rate is strongly affected by the choice of the carrier gas (He, H2 and N2) and by the process pressure which gives high flexibility for its application. As compared to HCl, Cl2 allows decreasing of the etching process temperatures down to ∼ 400 °C for Si ”). It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Bu in view of Toet, Hikavyy, and Ren as explained above. With respect to claim 16, Bu further teaches: wherein the second amorphous silicon film has a thickness in a range of 1 to 500 nm (para. 56 “the amorphous silicon layer has a thickness of about 40-50 nm.”) With respect to claim 17, Toet teaches: wherein the second annealing grows the crystal nuclei by solid phase epitaxial growth (“solid phase crystallization”) The Examiner notes that although Toet does not use the phrase “solid phase epitaxial growth,” it is known in the art that “solid phase epitaxy” refers to a process in which an amorphous material undergoes a phase transition into a crystalline material because of an interface with a crystal seed. Therefore, the process steps recited in Toet are solid phase epitaxial growth. It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Bu in view of Toet, Hikavyy, and Ren as explained above. With respect to claim 19, Toet further teaches: wherein the second temperature is a temperature in a range of 400 to 800 degrees C (3. Evolution of poly-Si “anneaIing at 600 °C for 5 h and 30 min”) It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Bu in view of Toet, Hikavyy, and Ren as explained above . 07-21-aia AIA Claim s 1 and 5-9 are rejected under 35 U.S.C. 103 as being unpatentable over Bu (US 2018/0122634 B1), Lai ( Thin Solid Films, 2006 ), Toet (Thin Solid Films, 1997), Hikavyy ( Semiconductor Science and Technology, 2017 ), and Ren (CN 107017153 A) . With respect to claim 1, Bu teaches: A method of forming a crystalline silicon film, the method comprising: forming a crystal nucleation film (microcrystalline layer 3) in which crystal nuclei of silicon are formed (silicon seeds 31); performing etching (para. 52, “the base substrate formed with the porous metal film is immersed into an etching liquid which comprises hydrogen fluoride and oxidants for etching the microcrystalline silicon layer”); forming an amorphous silicon film (amorphous silicon layer 5) on the crystal nuclei (silicon seeds 31) remaining after the etching; and forming the crystalline silicon film (poly-silicon layer 7) by performing an annealing on the substrate (base substrate 1 and buffer layer 2) (para. 55 “Irradiated the deposited amorphous silicon layer 5 with the excimer laser 6 can anneal and crystallize the amorphous silicon layer 5 so as to form the poly-silicon layer 7 as shown in FIG. 4H.”) after the forming of the amorphous silicon film (5) to grow the crystal nuclei. Bu differs from the claimed invention in that Bu does not specify the method in which the microcrystalline film is formed and teaches a wet etch instead of a dry (gas) etch. Therefore, Bu fails to teach: forming a first amorphous silicon film on a substrate; forming a crystal nucleation film in which crystal nuclei of silicon are formed by performing a first annealing at a first temperature on the substrate having the first amorphous silicon film formed thereon; performing etching with an etching gas; and forming the crystalline silicon film by performing a second annealing at a second temperature lower than the first temperature wherein during the performing etching, an amorphous silicon portion and fine crystal grains are removed from the crystal nucleation film while the crystal nuclei remain on the substrate. and wherein the second annealing is performed at the second temperature such that the second amorphous silicon film is capable of maintaining an amorphous state without crystal nuclei of silicon being formed in the second amorphous silicon film. Lai teaches: forming a crystal nucleation film in which crystal nuclei of silicon are formed by performing a first annealing at a first temperature on the substrate having the first amorphous silicon film formed thereon; (Lai teaches in the results and discussion section that nanocrystalline grains nucleate from a-Si with annealing at 800-900 °C) The above limitations are obvious by modifying Bu by Lai through the use of a known technique to improve similar devices in the same way. The Graham factual inquiries for this rationale are listed above. Bu teaches a base that includes forming a seed layer of Si. Lai teaches a comparable method in which a nucleation occurs by annealing an a-Si layer at 800 or 900 degrees C. The ordinary artisan could have applied the known technique of annealing at 800° C cause nucleation in a-Si that may be combined with other known processes described below to form a seed layer. See KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007). The ordinary artisan would have been motivated to modify Bu in the manner set forth above for the purpose of “reaching a saturation grain size quickly” (3. Results and discussion para. 2 of Lai). Toet teaches: forming a first amorphous silicon film (a-Si) on a substrate (glass substrate (2. Growth Procedure “Our growth procedure was carried out on 410 nm thick a- Si films grown by low pressure chemical vapor deposition on glass substrates at 450 °C,”); forming a crystal nucleation film (2. Growth Procedure “The crystallization seeds were using a cw Ar -laser beam created by locally melting the a-Si + (A = 514.5 nm) focused to a spot of ~ 1 μm diameter”); and forming the crystalline silicon film by performing a second annealing at a second temperature lower than the first temperature (3. Evolution of poly-Si “anneaIing at 600 °C for 5 h and 30 min” Toet teaches that the first annealing melts at least part of the Si, the melting point of silicon is higher than the 600°C of the second annealing at least in the portions where irradiation occurs) and wherein the second annealing is performed at the second temperature such that the second amorphous silicon film is capable of maintaining an amorphous state without crystal nuclei of silicon being formed in the second amorphous silicon film (The instant application teaches in para. 46 that the second annealing occurs at “typically about 600 degrees C”, the same temperature taught by Toet). The above limitations are obvious by modifying Bu/Lai by Toet through the use of a known technique to improve similar devices in the same way. The Graham factual inquiries for this rationale are listed above. Bu modified by Lai teaches a base method of growing a forming a polysilicon layer by depositing a-Si over a seed layer that was formed by annealing at 800 or 900 degrees C (Lai) followed by annealing (Bu). Toet teaches a comparable method in which poly-Si is formed by annealing an a-Si layer containing a seed layer is annealed at 600 degrees C. The ordinary artisan could have applied the known technique of annealing at 600° C to grow poly-Si from the seeds as taught by Toet, which is lower than the temperature of the nucleation anneal taught by Lai, with a predictable result of forming a poly-Si thin film See KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007). Hikavvy teaches: performing etching with an etching gas (abstract “The etching rate is strongly affected by the choice of the carrier gas (He, H2 and N2) and by the process pressure which gives high flexibility for its application. As compared to HCl, Cl2 allows decreasing of the etching process temperatures down to ∼ 400 °C for Si”); It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the teachings of Hikavyy into the method of Bu/Lai/Toet to etch the Si layer using a gas etch. The ordinary artisan would have been motivated to modify Bu/Lai/Toet in the manner set forth above for the purpose of “etch[ing] group IV materials in a low temperature range” (conclusions of Hikavyy) Ren teaches: wherein during the performing etching, an amorphous silicon portion and fine crystal grains are removed from the crystal nucleation film while the crystal nuclei remain on the substrate. (para. 89 “Among them, the plasma process uses plasma of gases such as argon Ar, helium He, nitrogen N2, hydrogen H2, etc. to treat the first amorphous silicon layer after crystallization treatment, removing the amorphous components and smaller grains in the first amorphous silicon layer after crystallization, as well as grains whose orientation does not meet the preset orientation.”) It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the teachings of Ren into the method of Bu/Lai/Toet/Hikavyy make the crystal nucleation film in a way in which the silicon layer has amorphous components and smaller grains that are removed by etching. The ordinary artisan would have been motivated to modify Bu/Lai/Toet/Hikavyy in the manner set forth above for the purpose of keeping only grains of a size and orientation that are desired (para. 89 of Ren) With respect to claim 5, Lai further teaches: wherein the first annealing is performed by a heat treatment (annealing at 800 or 900 degrees). It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Bu in view of Lai, Toet, Hikavyy, and Ren as explained above. With respect to claim 6, Lai further teaches: wherein the first temperature (3. Results and discussion, lns. 2-7 “After annealing at 600 -C for 30 min, the presence of XRD peaks at 28.55-, 47.5- and 56.3- correspond to Si (111), (220) and (311), respectively. All the annealed samples show a strong preferential orientation of (111) plane. Similar results are obtained for samples annealed at 700, 800 and 900 -C”) is higher than a temperature (550 C) at which the first amorphous silicon film is formed (2. Experimental, ln. 2-3 “Si thin films were deposited by LPCVD at 550 -C, 475 mTorr on these oxidized Si substrates,” 3. Results and discussion, ln. 1 refers to the films as amorphous silicon (a-Si)) It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Bu in view of Lai, Toet, Hikavyy, and Ren as explained above. With respect to claim 7, Lai teaches: wherein the first temperature is a temperature (Lai, 3. Results and Discussion, annealing may occur at 800 or 900 C) at which migration occurs in the first amorphous silicon film. The Examiner notes that although Lai does not recite “migration,” the temperature at which migration occurs is an inherent property of amorphous silicon. As the temperatures of 800 and 900 degrees are the same temperatures as the first anneal in which migration occurs per para. 39-40 of the specification, the Examiner determines that Lai teaches the limitation of claim 7. It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Bu in view of Lai, Toet, Hikavyy, and Ren as explained above. With respect to claim 8, Lai teaches: wherein the first temperature is 800 degrees C or higher (Lai, 3. Results and Discussion, annealing may occur at 800 or 900 C). It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Bu in view of Lai, Toet, Hikavyy, and Ren as explained above. With respect to claim 9, Toet further teaches: wherein the first annealing is performed in a vacuum atmosphere (2. Growth Procedure “The thermal annealing was performed in an evacuated quartz tube”). It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Bu in view of Lai, Toet, Hikavyy, and Ren as explained above . 07-22-aia AIA Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Bu (US 2018/0122634 B1), Lai ( Thin Solid Films, 2006 ), Toet (Thin Solid Films, 1997), Hikavyy ( Semiconductor Science and Technology, 2017 ), and Ren (CN 107017153 A) as applied to claim 5 above and further in view of Kim (US 2006/0257569 A1) . With respect to claim 10, Bu/Lai/Toet/Hikavyy/Ren teaches all limitations of claim 5 upon which claim 10 depends. Bu/Lai/Toet/Hikavyy/Ren fails to teach: wherein the first annealing is performed in a H 2 gas atmosphere. Kim teaches: wherein the first annealing is performed in a H 2 gas atmosphere (para. 51 “Also, this crystallization process can be performed under either a vacuum atmosphere, a hydrogen atmosphere.”) It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to further incorporate the teachings of Kim into the method of Bu/Lai/Toet/Hikavyy/Ren perform the annealing under hydrogen atmosphere. The ordinary artisan would have been motivated to modify Bu/Lai/Toet/Hikavyy/Ren in the manner set forth above for the purpose of tuning the physical properties of the thin film (para. 51 of Kim) and preventing oxidation during the annealing process . 07-22-aia AIA Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Bu (US 2018/0122634 B1), Toet (Thin Solid Films, 1997), Hikavyy ( Semiconductor Science and Technology, 2017 ) and Ren (CN 107017153 A) as applied to claim 17 above and further in view of Kim (US 2006/0257569 A1) . With respect to claim 20, Bu/Toet/Hikavyy/Ren teaches all limitations of claim 17 upon which claim 20 depends. Bu/Toet/Hikavvy/Ren fails to teach: wherein the second annealing is performed in a H 2 gas atmosphere or an inert gas atmosphere. Kim teaches: wherein the second annealing is performed in a H 2 gas atmosphere or an inert gas atmosphere. (para. 51 “Also, this crystallization process can be performed under either a vacuum atmosphere, a hydrogen atmosphere.”) It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to further incorporate the teachings of Kim into the method of Bu/Toet/Hikavyy/Ren perform the annealing under hydrogen atmosphere. The ordinary artisan would have been motivated to modify Bu/Toet/Hikavyy/Ren in the manner set forth above for the purpose of tuning the physical properties of the thin film (para. 51 of Kim) and preventing oxidation during the annealing process . 07-21-aia AIA Claim s 21-23 are rejected under 35 U.S.C. 103 as being unpatentable over Bu (US 2018/0122634 B1) in view of Toet (Thin Solid Films, 1997), Hikavyy ( Semiconductor Science and Technology, 2017 ), and Ren (CN 107017153 A) as applied to independent claim 1 above and further in view of Khan (US 2010/0102359 A1) With respect to claim 21, Bu/Toet/Hikavyy/Ren fail to teach: performing treatment of an etched surface after the etching. Khan teaches: performing treatment of an etched surface after the etching (para. 66 “The side-walls of the etched portions may have some residues of unwanted/unreacted gas particles that are left behind. This soft anneal will desorbs the particles, thus improving the leakage performance.”) It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the teachings of Khan into the method of Bu/Toet/Hikavyy/Ren treat the etched surface after etching. The ordinary artisan would have been motivated to modify Bu/Toet/Kihavyy/Ren in the manner set forth above for the purpose of removing residues of unwanted/unreacted gas particles that are left behind (para. 66 of Khan). With respect to claim 22, Khan further teaches: wherein, in the performing the treatment, an etching gas component remaining on the surface after the etching is removed (para. 66 “The side-walls of the etched portions may have some residues of unwanted/unreacted gas particles that are left behind. This soft anneal will desorbs the particles, thus improving the leakage performance.”). It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Bu in view of Toet, Hikavyy, Ren, and Khan as explained above. With respect to claim 23, Khan further teaches: wherein, in the performing the treatment, the etching gas component adsorbed on the surface is desorbed by annealing (para. 66 “The side-walls of the etched portions may have some residues of unwanted/unreacted gas particles that are left behind. This soft anneal will desorbs the particles, thus improving the leakage performance.”). It would have been obvious to one having ordinary skill in the effective filing date of the claimed invention to combine Bu in view of Toet, Hikavyy, Ren, and Khan as explained above. Response to Arguments Applicant’s arguments with respect to independent claim 1 and its dependents have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to AARON MICHAEL WEGNER whose telephone number is (571)270-7647. The examiner can normally be reached Mon-Fri 8:30 AM - 5 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jacob Choi can be reached at (469) 295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /A.M.W./ Examiner, Art Unit 2897 /JACOB Y CHOI/ Supervisory Patent Examiner, Art Unit 2897 Application/Control Number: 18/084,908 Page 2 Art Unit: 2897 Application/Control Number: 18/084,908 Page 3 Art Unit: 2897 Application/Control Number: 18/084,908 Page 4 Art Unit: 2897 Application/Control Number: 18/084,908 Page 5 Art Unit: 2897 Application/Control Number: 18/084,908 Page 6 Art Unit: 2897 Application/Control Number: 18/084,908 Page 7 Art Unit: 2897 Application/Control Number: 18/084,908 Page 8 Art Unit: 2897 Application/Control Number: 18/084,908 Page 9 Art Unit: 2897 Application/Control Number: 18/084,908 Page 10 Art Unit: 2897 Application/Control Number: 18/084,908 Page 11 Art Unit: 2897 Application/Control Number: 18/084,908 Page 12 Art Unit: 2897 Application/Control Number: 18/084,908 Page 13 Art Unit: 2897 Application/Control Number: 18/084,908 Page 14 Art Unit: 2897 Application/Control Number: 18/084,908 Page 15 Art Unit: 2897 Application/Control Number: 18/084,908 Page 16 Art Unit: 2897 Application/Control Number: 18/084,908 Page 17 Art Unit: 2897 Application/Control Number: 18/084,908 Page 18 Art Unit: 2897 Application/Control Number: 18/084,908 Page 19 Art Unit: 2897 Application/Control Number: 18/084,908 Page 20 Art Unit: 2897 Application/Control Number: 18/084,908 Page 21 Art Unit: 2897 Application/Control Number: 18/084,908 Page 22 Art Unit: 2897
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