DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on February 13, 2026 has been entered.
Response to Arguments
RE: the objection to the claims, Applicant’s amendments resolve the typographical issues in the claims. Accordingly, the objections to the claims have been withdrawn.
RE: the rejection of claim 23 under 35 USC 112(b), Applicant’s amendments resolve the issues of indefiniteness in this claim. Accordingly, the rejection of claim 23 under 35 USC 112(b) is withdrawn.
RE: the rejection of claim 1 under 35 USC 103, Applicant' s amendments and arguments have been considered but are not persuasive as discussed below.
Applicant argues McKnight-MacNeil Does Not Teach or Suggest Geometric Interlocking of an Embedded Leadframe. McKnight-MacNeil discloses an embedded die and leadframe structure within a laminated body.
As McKnight-MacNeil discloses an embedded die and leadframe structure within a laminated body, McKnight-MacNeil teaches Applicant’s latest amendment to claim 1: “the leadframe embedded within the laminated body.”
Applicant further argues McKnight-MacNeil does not disclose edges of the leadframe comprising lateral scallops and a vertical undercut extending continuously around the entire periphery.
However, this was acknowledged in the last Office Action dated November 13, 2025. This point is not in contention.
Applicant further argues Park describes improving mold locking of the die pad against the package body. The indentations are formed in the sidewalls and periphery of the die pad to enhance engagement with mold compound. The die pad in Park is not embedded within a laminated stack of dielectric and conductive layers as now expressly required by Claim 1.
However, 1) McKnight-MacNeil already teaches Applicant’s latest amendment to claim 1, and therefore Park is not necessarily required to teach the same limitation; 2) As Park teaches the indentations are formed in the sidewalls and periphery of the die pad to enhance engagement with mold compound / package body 230, [0022], the teachings in Park would have led a person of ordinary skill in the art to modify McKnight-MacNeil to arrive at the claimed invention.
Applicant argues Because Park addresses a different structural environment and a different mechanical interface, it does not provide a teaching or motivation to modify McKnight-MacNeil's embedded laminated leadframe in the manner required by amended Claim 1.
However, Mcknight-Macneil teaches a power semiconductor die is embedded in laminated body comprising a layer stack of a plurality of dielectric layers; the package body has a laminated structure configured for high voltage, high temperature operation with improved reliability (see abstract). Dielectric layers are insulating layers.
Mcknight-Macneil teaches the at least one dielectric layer of the core and said first, second and outer dielectric build-up layers comprise any one of: a glass-fiber reinforced resin composition; a glass-fiber reinforced epoxy resin composition; a dielectric resin build-up layer, [0021].
Park teaches By means of the indentations 114, the horizontal mold locking capability of the die pad 110 can be enhanced so that the die pad 110 will not be horizontally delaminated from a package body, [0022]. Park teaches the package body is electrically insulated resin, [0024]. Accordingly, the teachings of Park are relevant to Mcknight-Macneil, and Park provides a teaching and motivation to modify Mcknight-Macneil to arrive at the claimed invention, so that the leadframe in Mcknight-Macneil would lock or interlock with its surrounding dielectric or insulating layer(s) made of resin.
Applicant argues The limitation requiring a vertical undercut extending continuously around the entire periphery of an embedded leadframe is a specific structural requirement. Cadag does not disclose or suggest this feature.
However, Cadag discloses backside chemical etching step 316 forms curved portions 149 of the die pads 142, [0083]. FIGs. 12-15 show the etching used to etched the curved portions 149 on the back / bottom side of the die pad 142. FIG. 15 shows each bottom portion of the leadframe 166 has a vertical undercut. As the bottom side of the lead frame would be subjected to chemical etching, the chemical etching would etch the entire periphery of the bottom side of the leadframe.
Further Cadag is applicable to mold compounds as the leadframe locks with a molding compound, [0047]. The reference US 20090011522 A1 (“Drennan”) discloses the chip 26, wirebonds 32, and exposed leadfingers 18 within the cavity 20 are encapsulated. Preferably, the cavity 20 is filled or substantially filled with dielectric mold compound 24 such as curable plastic or epoxy resin familiar in the arts, [0027]. Accordingly, Cadag is relevant to leadframes interlocking with resin.
Additionally, a further reference “Glenn” is provided, teaching The etch process is stopped early so that there is an underetching of all of the side surfaces of the components of leadframe 20, including side surfaces 27 of die pad 24 and side surfaces 33 of tabs 30, Col. 6, lines 3-11. This underetching would result in the vertical undercut extending continuously around the entire periphery of the leadframe.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1, 3-4, 20-24 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claim 1 includes “the vertical undercut extending continuously around the entire periphery of the leadframe” and this limitation is not supported by the instant application. Instead, the drawings (e.g., FIGs. 7-9, 11) show one or two sides of the leadframe has a vertical undercut. The instant specification does not disclose the vertical undercut extends continuously around the entire periphery of the leadframe.
The remaining claims are rejected due to their dependency from claim 1.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1, 4, 21-22, 24 is/are rejected under 35 U.S.C. 103 as being unpatentable over US20220020669A1 (“Mcknight-Macneil”) in view of US20050260795A1 (“Park”) further in view of US20190067212A1 (“Cadag”), further in view of US7005326B1 (“Glenn”).
RE: Claim 1, Mcknight-Macneil discloses An embedded die package (100 in FIG. 7) comprising
a laminated body (layers in 100 including 110, 120-1, 120-2, 120-4, 130-1, 130-2 [0081]) and
a die (die 10, [0081]) comprising a power semiconductor device (10 is a power semiconductor die, [0081]),
the die being embedded within the laminated body (FIG. 7 shows 10 embedded in the laminated body), wherein:
the laminated body comprises a layer stack of a plurality of dielectric layers (110, 120-1, 120-2, 120-4 are dielectric layers, [0081]) and electrically conductive layers (130-1, 130-2 are conductive copper layers, [0081]);
a first electrically conductive layer comprising a leadframe (112 in 110 shown in FIG. 24) defining electrical contact areas (lead frame 112 surrounds the die and provides electrical interconnections through the dielectric layer(s) of the core structure 110, [0094]),
the leadframe embedded within the laminated body (FIG. 24 shows the leadframe 112 embedded within the laminated body 110, 120-1, 120-2, 120-4);
the die being mounted on the leadframe (leadframe comprises parts 114 and 116, wherein the middle part 116 has a cavity which supports the die, [0095]);
electrical connections between contact pads of the die (contact area on back-side of die, [0036]), the electrical contact areas of the leadframe (In FIG. 24, left and right parts of lead frame 110 connecting to 130-2, 130-3) and at least one other electrically conductive layer (130-3 and/or 180-4 in FIG. 7, [0094]), the electrical connections comprising electrically conductive vias (vias 140, 150, 160 in FIG. 7; these vias would establish electrical connections between back side of the die, the left, right parts of the lead frame 110, and the layer 130-3; FIG. 24 shows unlabeled vias establishing electrical connections between back side of the die, the left, right parts of the lead frame 110, and the layer 130-3 and extending through the dielectric layers) extending through the dielectric layers.
Mcknight-Macneil does not explicitly disclose wherein edges of the leadframe comprise lateral scallops and a vertical undercut, the lateral scallops being defined laterally by a curved area, and the vertical undercut extending continuously around the entire periphery of the leadframe, such that the leadframe edges provide vertical and lateral interlocking of the leadframe and surrounding dielectric layers.
However, Mcknight-Macneil discloses The core structure 110 comprises dielectric layer(s), [0094].
In the same field of endeavor, Park discloses a leadless leadframe 100 with an improved die pad for mold locking, [0022] and the leadframe 100 includes die pad 110, [0022].
FIGs. 4-5, 8 shows edges of 110 including indentations 114 that form lateral scallops being defined laterally by a curved area.
Park further discloses the indentations 114 are semi-vias be located in the sidewalls 113 and on the periphery of the upper surface 111, which are in semi-circular shape through the upper surface of the die pad 110, [0022].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the edges of the leadframe in Mcknight-Macneil to include indentations forming lateral scallops as taught by Park in order to improve mold locking as further taught by Park. As a result, edges of the leadframe would comprise lateral scallops, the lateral scallops being defined laterally by a curved area, such that the leadframe edges provide lateral interlocking of the leadframe and surrounding dielectric layers of the core 110.
In the same field of endeavor, in FIG. 5 Cadag discloses a die pad 142 with a bottom portion having a curved portion 149 on each side formed by etching, [0047]. Cadag discloses the curved portion 149 helps interlock the die pad, [0048].
FIG. 5 shows the upper part of the curved portions 149 are diagonal, and the lower part of the curved portions 149 are curved.
Cadag discloses backside chemical etching step 316 forms curved portions 149 of the die pads 142, [0083].
FIGs. 12-15 show the etching used to etched the curved portions 149 on the back / bottom side of the die pad 142.
FIG. 15 shows each bottom portion of the leadframe 166 has a vertical undercut on either side.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combination of Mcknight-Macneil, Park so that the bottom side of the leadframe is modified by chemical etching to form curved portions on each side as taught by Cadag in order to help interlock the die pad with the surrounding layers 110. As the bottom side of the lead frame would be subjected to chemical etching, the chemical etching would etch the entire periphery of the bottom side of the leadframe, such that the vertical undercut would extend continuously around the entire periphery of the leadframe, and the leadframe edges would provide vertical interlocking of the leadframe and surrounding dielectric layers of the core 110.
Further, in the same field of endeavor, Glenn teaches A leadframe 20 having side surfaces like FIG. 3 can be formed by chemically etching the rolled strip metal stock from both sides using a conventional liquid etchant. The etch process is stopped early so that there is an underetching of all of the side surfaces of the components of leadframe 20, including side surfaces 27 of die pad 24 and side surfaces 33 of tabs 30, Col. 6, lines 3-11.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combination of Mcknight-Macneil, Park, Cadag so that Cadag’s etching is performed on all side surfaces of the bottom side of the leadframe as taught by Glenn in order to improve the vertical interlocking of the leadframe and surrounding dielectric layers of the core 110. As the etching would be performed on all side surfaces of the bottom side of the lead frame, the vertical undercut would extend continuously around the entire periphery of the leadframe.
RE: Claim 4, the combination of Mcknight-Macneil, Park, Cadag, Glenn discloses The embedded die package of claim 1, wherein the dielectric layers comprise a glass fiber filled epoxy composite resin (Mcknight-Macneil discloses the at least one dielectric layer of the core and said first, second and outer dielectric build-up layers comprise any one of: a glass-fiber reinforced resin composition, [0021] and GaN die is embedded in a dielectric package body, e.g.: a glass fiber epoxy composite, [0005]), and the lateral scallops are configured for stress relief of glass fibers within the resin (As modified above, the lateral scallops would be configured for stress relief of glass fibers within the resin since Park discloses indentations 114 can disperse the horizontal thermal stress and firmly hold the sidewall 113 of the die pad 110 with the package body 230, [0024]).
RE: Claim 21, the combination of Mcknight-Macneil, Park, Cadag, Glenn discloses The embedded die package of Claim 1, the at least one other electrically conductive layer comprising a conductive layer that defines a thermal pad (In Mcknight-Macneil FIG. 7, thermal pad 180-4 or metal source pad 132-3, [0081]).
RE: Claim 22, the combination of Mcknight-Macneil, Park, Cadag, Glenn discloses The embedded die package of Claim 21, the thermal pad also serving as a source pad (In Mcknight-Macneil 132-3 is a source pad, [0081]) for the embedded die package.
RE: Claim 24, the combination of Mcknight-Macneil, Park, Cadag, Glenn discloses The embedded die package of Claim 1, the vertical undercut being curved (As modified above, at least a lower portion of the vertical uppercuts would be curved since in FIG. 5 Cadag shows a lower portion of the vertical uppercut 149 curved).
Claim(s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Mcknight-Macneil in view of Park, further in view of Cadag, Glenn as applied to claim 1 above, and further in view of US 20210035894 A1 (“Fontana”).
RE: Claim 3, the combination of Mcknight-Macneil, Park, Cadag, Glenn does not explicitly disclose The embedded die package of claim 1, wherein the edges of the leadframe are beveled.
However, in the same field of endeavor, Fontana discloses the lead frame 301 includes a die pad 310, [0055] and that the edges (here designated by 311) of the die pad 310 are beveled, [0055].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combination of Mcknight-Macneil, Park, Cadag, Glenn so that the edges of the leadframe are beveled as taught by Fontana in order to prevent the leadframe from cutting into surrounding dielectric layers of 110.
Claim(s) 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Mcknight-Macneil in view of Park, further in view of Cadag, Glenn as applied to claim 1 above, and further in view of Yu Chen et al., "Molding void issue and solution of a Package-in-Package," 2012 14th International Conference on Electronic Materials and Packaging (EMAP), Hong Kong, China, 2012, pp. 1-5 (“Chen”), further in view of B. Xie, et al., "Accelerated Moisture Sensitivity Test Methodology for Stacked-Die Molded Matrix Array Package," 2007 9th Electronics Packaging Technology Conference, Singapore, 2007, pp. 100-104 (“Xie”) further in view of W. J. Roesch, "Measuring and comparing humidity acceleration factors of compound semiconductors," 2009 Reliability of Compound Semiconductors Digest (ROCS), Greensboro, NC, USA, 2009, pp. 125-136, (“Roesch”).
RE: Claim 20, the combination of Mcknight-Macneil, Park, Cadag, Glenn does not explicitly disclose The embedded die package of Claim 1, wherein lamination of the embedded die structure is structured to survive 3 reflow cycles between 0 degrees Celsius and 260 degrees Celsius in 100 percent ambient humidity without delamination.
However, in the same field of endeavor, Chen discloses MSL 3 testing is Moisture Sensitivity Level 3 testing (see abstract on pg. 1).
Chen further discloses Failure mechanism was setup and verified based on findings from failure analysis and mold flow simulation. Design optimization had been pursued and verified, samples built after modification all passed the MSL3 test with improved reliability performance (see abstract pg. 1).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combination of Mcknight-Macneil, Park, Cadag, Glenn by performing MSL 3 testing and performing design optimization and failure analysis so that the embedded die package passes MSL 3 testing as taught by Chen in order to improve reliability performance.
In the same field of endeavor, Xie teaches To validate the modeling results, the moisture/reflow tests were performed on this kind of MMAP under conditions of standard 216hrs30° C/60%RH and accelerated 30hrs, 45hrs, 60hrs, 75hrs, 88hrs-60° C/60%RH and After the moisture soak, the packages were subjected to 3 cycles of the certain reflow condition with the peak reflow temperature of 260 degrees Celsius (see pg. 102, paragraph immediately under the section heading “Experimental Validation”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combination of Mcknight-Macneil, Park, Cadag, Glenn, Chen so that the MSL 3 testing includes subjecting the embedded die package to relative humidity of 60%, 260 degrees Celsius and 3 reflow cycles as taught by Xie in order to improve reliability performance.
In the same field of endeavor, Roesch teaches In addition to biased moisture testing, there are also unbiased aging methods. The primary technique applied is autoclave (A/C) aging, run at 121ºC, 100% Relative Humidity and 15PSI, (pg. 126, left column, paragraph under Table 1).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combination of Mcknight-Macneil, Park, Cadag, Glenn, Chen, Xie so that the MSL 3 testing includes subjecting the embedded die package to relative humidity of 100% as taught by Roesch in order to improve reliability performance. As a result, the embedded die package would pass MSL3 testing and therefore survive 3 reflow cycles between 0 degrees Celsius and 260 degrees Celsius in 100 percent ambient humidity without delamination.
Claim(s) 23 is/are rejected under 35 U.S.C. 103 as being unpatentable over Mcknight-Macneil in view of Park, further in view of Cadag, Glenn as applied to claim 1 above, and further in view of US 20100258922 A1 (“Nakamura”).
RE: Claim 23, the combination of Mcknight-Macneil, Park, Cadag, Glenn does not explicitly disclose The embedded die package of Claim 1, surfaces of the leadframe having been roughened due to surface etching.
However, in the same field of endeavor, Nakamura discloses etching and surface roughening of the lead frame LFa can improve the adhesion with the insulating resin, [0045].
Nakamura further discloses when both the upper and lower surfaces of the lead frame LFa are etched to roughen them, the surface roughening extends even to the bottom surface f2a of the die pad Dpa, [0046].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combination of Mcknight-Macneil, Park, Cadag, Glenn by performing a surface roughening process on the leadframe using surface etching as taught by Nakamura in order to improve adhesion with surrounding dielectric layers of 110.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL ANGUIANO whose telephone number is (703)756-1226. The examiner can normally be reached Monday through Friday.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Brent Fairbanks can be reached at (408) 918-7532. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/MICHAEL ANGUIANO/Examiner, Art Unit 2899 /DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899
Prosecution Insights