DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The previous 35 U.S.C. 112(a) rejection of claims 1-13 and 22-24 is withdrawn in view of applicants’ claim amendments.
The following is a quotation of 35 U.S.C. 112(b):
(B) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-13, 22, and 24 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Claim 1 recites “flowing a second epitaxial semiconductor reactant” in the first line of the first full paragraph at p. 3. It is unclear whether this is the same second epitaxial semiconductor reactor that is recited in l. 16 of the claim or if applicants intended to refer to a different second epitaxial semiconductor reactant. It is assumed applicants intended to recite “flowing the second epitaxial semiconductor reactant.” Dependent claims 2-13 and 22 are similarly rejected due to their dependence on claim 1.
Similarly, claim 24 recites “flowing a second epitaxial semiconductor reactant” in l. 30. It is unclear whether this is the same second epitaxial semiconductor reactor that is recited in ll. 16-17 of the claim or if applicants intended to refer to a different second epitaxial semiconductor reactant. It is assumed applicants intended to recite “flowing the second epitaxial semiconductor reactant.”
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1-3, 5-6, 9, 11-12, and 24 is/are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Appl. Publ. No. 2015/0232992 to Kim, et al. (hereinafter “Kim”) in view of U.S. Patent Appl. Publ. No. 2003/0036268 to Brabant, et al. (“Brabant”) and further in view of U.S. Patent Appl. Publ. No. 2004/0107897 to Lee, et al. (“Lee”) and still further in view of U.S. Patent Appl. Publ. No. 2017/0278707 to Margetis, et al. (“Margetis”).
Regarding claim 1, Kim teaches a reactor system (see, e.g., the Abstract, Figs. 1-8, and entire reference which teach a reactor (300)), comprising:
a reactor (see, e.g., Fig. 3 and ¶¶[0038]-[0049] which teach an embodiment of a reactor (300)), comprising:
a first reaction chamber comprising a first reaction space enclosed therein, a first susceptor disposed within the first reaction space, and a first fluid distribution system in fluid communication with the first reaction space, wherein the first susceptor is configured to support a first substrate (see, e.g., Fig. 3 and ¶¶[0038]-[0049] which teach a first reaction chamber (312) having a first showerhead (320) and a first susceptor (354) configured to support a first substrate); and
a second reaction chamber comprising a second reaction space enclosed therein, a second susceptor disposed within the second reaction space, and a second fluid distribution system in fluid communication with the second reaction space, wherein the second susceptor is configured to support a second substrate (see, e.g., Fig. 3 and ¶¶[0038]-[0049] which teach a second reaction chamber (314) having a second showerhead (320) and a second susceptor (354) configured to support a second substrate); and
a first epitaxial semiconductor reactant source configured to provide a first epitaxial semiconductor reactant comprising a silicon precursor to the first reaction chamber and the second reaction chamber, wherein the first reaction chamber and the second reaction chamber are fluidly coupled to the first epitaxial semiconductor reactant source at least partially by a first reactant shared line (see, e.g., Fig. 3 and ¶¶[0038]-[0049] which teach a first gas source (328) which is fluidly coupled to the first (312) and second (314) chambers by a gas distribution system (304) and a shared first gas line (332); see also Fig. 5 and ¶¶[0051]-[0057] which teach a method of depositing a silicon-containing layer by flowing a first silicon-containing precursor which, in the case of Fig. 3 would necessarily involve providing a silicon-containing precursor as the first gas source (328)),
a second epitaxial reactant source configured to provide a second epitaxial reactant to the first reaction chamber and the second reaction chamber, wherein the first reaction chamber and the second reaction chamber are fluidly coupled to the second epitaxial reactant source at least partially by a second reactant shared line (see, e.g., Fig. 3 and ¶¶[0038]-[0049] which teach a second gas source (398) which is coupled to the first (312) and second (314) chambers by a gas distribution system (304) and a shared second gas line (334));
a controller (see, e.g., Figs. 2-3 and ¶¶[0034]-[0036] which teach the use of a system controller (290) to control one or more components in the substrate processing system); and
a tangible, non-transitory memory configured to communicate with the controller, the tangible, non-transitory memory having instructions stored thereon that, in response to execution by the controller, cause the controller to perform operations (see, e.g., Figs. 2-3 and ¶¶[0034]-[0036] which teach that the controller (290) includes a CPU (292) and memory (294) with instructions stored thereupon) comprising:
performing a first cycle, the first cycle comprising:
flowing the first epitaxial semiconductor reactant comprising the silicon precursor from the first epitaxial semiconductor reactant source to the first reaction chamber via the first reactant shared line (see, e.g., Fig. 5 and ¶¶[0051]-[0057] which teach a method of depositing a silicon-containing layer by flowing a first silicon-containing precursor which, in the case of Fig. 3 would necessarily involve flowing said silicon-containing precursor from the first gas source (328) and through first gas supply circuit (332) such that it is supplied to the first reaction chamber (312); moreover, in order for the system to perform these processing steps, the appropriate instructions must be stored in the memory (294));
flowing a second epitaxial reactant from the second epitaxial reactant source to the first reaction chamber via the second reactant shared line (see, e.g., Fig. 5, ¶[0043], and ¶¶[0051]-[0057] which teach a method of depositing a SiOxCy-containing layer by flowing a second reactant such as oxygen which, in the case of Fig. 3 would necessarily involve flowing said oxygen precursor from the second gas source (398) and through second supply circuit (334) such that it is supplied to the first reaction chamber (312); moreover, in order for the system to perform these processing steps, the appropriate instructions must be stored in the memory (294));
performing a second cycle, the second cycle comprising:
flowing the first epitaxial semiconductor reactant comprising the silicon precursor from the first epitaxial semiconductor reactant source to the second reaction chamber via the first reactant shared line (see, e.g., Fig. 5 and ¶¶[0051]-[0057] which teach a method of depositing a silicon-containing layer by flowing a first silicon-containing precursor which, in the case of Fig. 3 would necessarily involve flowing said silicon-containing precursor from the first gas source (328) and through first gas supply circuit (332) such that it is supplied to the second reaction chamber (314); moreover, in order for the system to perform these processing steps, the appropriate instructions must be stored in the memory (294)),
wherein the reactor system is configured to deliver the first epitaxial semiconductor reactant from the first epitaxial semiconductor reactant source to the first reaction chamber and the second reaction chamber through the first reactant shared line (see, e.g., Fig. 3 and ¶¶[0038]-[0049] which teach that the first gas source is delivered to the first (312) and second (314) chambers by the shared first gas line (332); see also ¶[0033] which teaches that a crystalline layer may be deposited from a Si-containing precursor, indicating that the gas source(s) (328) and/or (398) are configured to deliver an epitaxial semiconductor reactant), and
wherein only the first epitaxial semiconductor reactant and second epitaxial reactant are flowed during the first cycle, wherein , during the first cycle, the first epitaxial semiconductor reactant and second epitaxial semiconductor reactant are flowed concurrently (see, e.g., Fig. 5, ¶[0043], and ¶¶[0051]-[0057] which teach a method of depositing a SiOxCy-containing layer by, for example, concurrently flowing only the first silicon-containing precursor and only the second epitaxial reactant such as oxygen during the first cycle in order to deposit the desired SiOxCy-containing layer).
Kim does not teach that the first epitaxial semiconductor source comprises a chlorinated silicon precursor and that the second epitaxial reactant source is a semiconductor reactant comprised of a germanium precursor. However, in Fig. 2 and ¶¶[0048]-[0055] as well as elsewhere throughout the entire reference Brabant teaches an analogous embodiment of a CVD reactor which includes, inter alia, a plurality of precursor gases such as hydrogen (72), a silane source (86), and a germane source (84) for the formation of epitaxial Si, Ge, and/or SiGe thin films. In some embodiments the Si-containing source gas may be in the form of a chlorinate Si precursor such as dichlorosilane (DCS) or trichlorosilane (TCS) (74). Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Brabant and would be motivated to include not just a chlorinated Si precursor as a first epitaxial silicon-containing reactant, but also a source of germane as a second epitaxial germanium-containing reactant in order to facilitate the simultaneous deposition of epitaxial layers of Group IV semiconductors such as Si, Ge, and/or SiGe in the first (312) and/or second (314) chambers in the apparatus of Kim in order to increase the throughput of the device fabrication process and facilitate the deposition of additional semiconductor thin film layers with differing compositions. In this case the use of a chlorinated Si precursor as an alternative to a silane precursor would involve nothing more than the use of a known equivalent for the same purpose which supports a prima facie determination of obviousness.
Kim and Brabant do not teach that the second cycle is performed in the second reaction chamber without flowing the second epitaxial semiconductor reactant to the second reaction chamber. However, in Fig. 3 and ¶¶[0057]-[0074] Lee teaches an analogous embodiment of a dual reactor system which includes a first (100) and second reactor (100’) that are separately connected to first (151) and second (155) reactant sources by shared supply lines (141)-(141’) and (143)-(143’), respectively. In ¶[0062] Lee specifically teaches that supply control valves (511), (511’), (513), and (513’) are used to individually control the flow of the first (151) and second (155) reactants to the first (100) and second (100’) reactor such that the desired reactant may be separately and sequentially supplied to each reactor as part of, for example, film growth by the atomic layer deposition (ALD) process. Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would be motivated to configure the controller (290) of Kim such that it supplies only the first epitaxial reactant to the second reaction chamber after supplying the first and second epitaxial semiconductor reactants to the first chamber with the motivation for doing so being to, for example, facilitate the sequential growth of separate epitaxial layers having a different composition (i.e., SiGe/Si bilayers) on one or more substrates either simultaneously or sequentially in the first and the second reaction chambers and/or to enable film growth by ALD.
Kim, Brabant, and Lee do not teach that the second cycle is performed a plurality of times after performing the first cycle, and that only the first epitaxial semiconductor reactant is flowed during the second cycle. However, in Fig. 1 and ¶¶[0016]-[0032] as well as elsewhere throughout the entire reference Margetis teaches an analogous system and method for epitaxial deposition of the Group IV semiconductors, Si, Ge, C, and Sn. As shown in Fig. 1, the reaction system (10) includes a first (100) and second (200) multi-port injector for delivering a first gas such as silane and a second gas such as germane to a substrate (120). In ¶¶[0027]-[0032] Margetis specifically teaches that the reaction system (10) may be used to form multilayer film stacks comprised of alternating layers of Si and SiGe by delivering the Si precursor through the first injector (100) and the Ge precursor through the second injector (200). Deposition of such a multilayer stack would be achieved by flowing Si and Ge during one cycle and then only Si during the next cycle in order to form a stack comprised of, for example, SiGe/Si/SiGe/Si. Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Margetis and would recognize that in order to deposit a multilayer stack comprised of alternating layers of Si and SiGe in each of two different reaction chambers it would be necessary to flow both the first and second epitaxial semiconductor reactant during the first cycle in order to deposit SiGe and to flow only the first epitaxial semiconductor reactant during the second cycle in order to deposit Si such that alternating layers of SiGe and Si are formed. Since both SiGe and Si are being sequentially deposited in both the first and second reactor the Si layer in the second reactor is necessarily deposited after one or more SiGe layers which have been previously deposited in the first reactor. Alternatively, as discussed infra with respect to the rejection of claim 10, each layer on the same substrate could be performed in a separate chamber such that SiGe is formed in the first chamber and, after transferring the wafer to the second chamber, Si is then formed on the SiGe layer. Since different chambers may be dedicated to different stages of the device fabrication process a person of ordinary skill in the art prior to the effective filing date of the invention would be motivated to transfer the wafer from the first chamber to the second chamber after performing the first cycle in order to minimize cross-contamination between different layers and to speed up the device fabrication process. The combination of prior art elements according to known methods to yield predictable results has been held to support a prima facie determination of obviousness. All the claimed elements are known in the prior art and one skilled in the art could combine the elements as claimed by known methods with no change in their respective functions, with the combination yielding nothing more than predictable results to one of ordinary skill in the art. KSR International Co. v. Teleflex Inc., 550 U.S. 398, __, 82 USPQ2d 1385, 1395 (2007). See also, MPEP 2143(A).
Regarding claim 2, Kim teaches that the first susceptor and the second susceptor comprise a ceramic material (see, e.g., ¶[0047] which teaches that substrate supports (406) may be made of a ceramic material), but does not teach that the ceramic material is selected from the list consisting of aluminum nitride, silicon carbide, silicon nitride, and yttrium oxide. However, in at least Fig. 1 and ¶[0038] Brabant teaches an analogous embodiment of an reactor (10) which includes a susceptor (20) that, in one embodiment, is made of SiC. Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Brabant and would be motivated to utilize SiC as the first and second susceptor in the apparatus of Kim in order to benefit from the use of a known material according to its intended use which has good thermal conductivity, relative chemical inertness, and/or a high melting temperature.
Regarding claim 3, Kim teaches that the first susceptor and the second susceptor each comprise an electric heater (see, e.g., Fig. 3 and ¶[0042] which teach that the first and second susceptor each comprise an electric heater (344)), but does not teach that the controller is configured to heat the first susceptor and the second susceptor to a temperature between 300 °C and 660 °C during flowing the first epitaxial semiconductor reactant and the second epitaxial semiconductor reactant. However, in at least Fig. 5 and ¶¶[0075]-[0091] as well as elsewhere throughout the entire reference Brabant teaches an analogous system and method for the deposition of epitaxial Group IV layers such as Si and SiGe. In ¶[0088] Brabant specifically teaches that the deposition step (250) is performed at a wafer temperature of between 450 and 950 °C and, more preferably, may be at 550 °C. Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would be motivated to configure the CPU (292) and memory (294) of Kim with instructions to heat the first and second susceptors in the system of Kim and Lee to a temperature in the overlapping range of 300 to 660 °C with the motivation for doing so being to, for example, facilitate the deposition of high quality epitaxial layers comprised of Group IV semiconductors such as Si, Ge, and/or SiGe.
Regarding claim 5, Kim teaches a remote plasma unit in fluid communication with the first reaction chamber and the second reaction chamber, wherein the remote plasma unit is configured to deliver an activated species to the first reaction chamber and a second reaction chamber through a shared plasma line (see, e.g., Fig. 3 and ¶¶[0038]-[0049] which teach a remote plasma source (394) which is in fluid communication with reaction chambers (312) and (314) through a shared 2nd gas supply line (334)).
Regarding claim 6, Kim does not teach that the memory has instructions stored thereupon that, in response to execution by the controller, cause the controller to perform operations further comprising: before performing the first cycle, heating the first susceptor and the second susceptor to a temperature between 475 °C and 550 °C. However, in at least Fig. 5 and ¶¶[0075]-[0091] as well as elsewhere throughout the entire reference Brabant teaches an analogous system and method for the deposition of epitaxial Group IV layers such as Si and SiGe. In ¶[0088] Brabant specifically teaches that the deposition step (250) is performed at a wafer temperature of between 450 and 950 °C and, more preferably, may be at 550 °C. Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would be motivated to configure the CPU (292) and memory (294) of Kim with instructions to heat the first and second susceptors in the system of Kim and Lee to a temperature in the overlapping range of 450 to 550 °C with the motivation for doing so being to, for example, facilitate the deposition of high quality epitaxial layers comprised of Group IV semiconductors such as Si, Ge, and/or SiGe.
Regarding claim 9, Kim does not teach that the first epitaxial semiconductor reactant comprises one or more of chlorosilane, dichlorosilane, trichlorosilane, and tetrachlorosilane. However, in Fig. 2 and ¶¶[0048]-[0055] Brabant teaches that the Si-containing source gas may be in the form of a chlorinated Si precursor such as dichlorosilane (DCS) or trichlorosilane (TCS) (74). Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would be motivated to utilize a chlorinated Si precursor as an alternative to a silane precursor since this would involve nothing more than the use of a known equivalent for the same purpose which supports a prima facie determination of obviousness.
Regarding claim 11, Kim does not teach that the first epitaxial semiconductor reactant consists of the chlorinated silicon precursor. However, in Fig. 2 and ¶¶[0048]-[0055] Brabant teaches that the Si-containing source gas may be in the form of a chlorinated Si precursor such as dichlorosilane (DCS) or trichlorosilane (TCS) (74). Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would be motivated to utilize a Si source which consists of a chlorinated Si precursor as an alternative to a silane precursor since this would involve nothing more than the use of a known equivalent for the same purpose which supports a prima facie determination of obviousness.
Regarding claim 12, Kim, Lee, and Margetis do not teach that the germanium precursor comprises at least one of germane (GeH4), digermane (Ge2H6), trigermane (Ge3H8), or germylsilane (GeH6Si). However, as noted supra with respect to the rejection of claim 1, in Fig. 2 and ¶¶[0048]-[0055] as well as elsewhere throughout the entire reference Brabant teaches an analogous embodiment of a CVD reactor which includes, inter alia, a plurality of precursor gases such as hydrogen (72), a silane source (86), and a germane source (84) for the formation of epitaxial Si, Ge, and/or SiGe thin films. Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Brabant and would be motivated to include not just a chlorinated silicon precursor a first silicon-containing reactant, but also a source of germane as a second germanium-containing reactant in order to facilitate the deposition of layers of Si, Ge, and/or SiGe in the first (312) and/or second (314) chambers in the apparatus of Kim.
Regarding claim 24, Kim teaches a reactor system (see, e.g., the Abstract, Figs. 1-8, and entire reference which teach a reactor (300)), comprising:
a reactor (see, e.g., Fig. 3 and ¶¶[0038]-[0049] which teach an embodiment of a reactor (300)), comprising:
a first reaction chamber comprising a first reaction space enclosed therein, a first susceptor disposed within the first reaction space, and a first fluid distribution system in fluid communication with the first reaction space, wherein the first susceptor is configured to support a first substrate (see, e.g., Fig. 3 and ¶¶[0038]-[0049] which teach a first reaction chamber (312) having a first showerhead (320) and a first susceptor (354) configured to support a first substrate); and
a second reaction chamber comprising a second reaction space enclosed therein, a second susceptor disposed within the second reaction space, and a second fluid distribution system in fluid communication with the second reaction space, wherein the second susceptor is configured to support a second substrate (see, e.g., Fig. 3 and ¶¶[0038]-[0049] which teach a second reaction chamber (314) having a second showerhead (320) and a second susceptor (354) configured to support a second substrate); and
a first epitaxial semiconductor reactant source configured to provide a first epitaxial semiconductor reactant comprising a silicon precursor to the first recation chamber and the second reaction chamber, wherein the first reaction chamber and the second reaction chamber are fluidly coupled to the first epitaxial semiconductor reactant source at least partially by a first reactant shared line (see, e.g., Fig. 3 and ¶¶[0038]-[0049] which teach a first gas source (328) which is fluidly coupled to the first (312) and second (314) chambers by a gas distribution system (304) and a shared first gas line (332); see also Fig. 5 and ¶¶[0051]-[0057] which teach a method of depositing a silicon-containing layer by flowing a first silicon-containing precursor which, in the case of Fig. 3 would necessarily involve providing a silicon-containing precursor as the first gas source (328)),
a second epitaxial reactant source configured to provide a second epitaxial reactant to the first reaction chamber and the second reaction chamber, wherein the first reaction chamber and the second reaction chamber are fluidly coupled to the second epitaxial reactant source at least partially by a second reactant shared line (see, e.g., Fig. 3 and ¶¶[0038]-[0049] which teach a second gas source (398) which is coupled to the first (312) and second (314) chambers by a gas distribution system (304) and a shared second gas line (334));
a controller (see, e.g., Figs. 2-3 and ¶¶[0034]-[0036] which teach the use of a system controller (290) to control one or more components in the substrate processing system); and
a tangible, non-transitory memory configured to communicate with the controller, the tangible, non-transitory memory having instructions stored thereon that, in response to execution by the controller, cause the controller to perform operations (see, e.g., Figs. 2-3 and ¶¶[0034]-[0036] which teach that the controller (290) includes a CPU (292) and memory (294) with instructions stored thereupon) comprising:
performing a first cycle, the first cycle comprising:
flowing the first epitaxial semiconductor reactant comprising the silicon precursor from the first epitaxial semiconductor reactant source to the first reaction chamber via the first reactant shared line (see, e.g., Fig. 5 and ¶¶[0051]-[0057] which teach a method of depositing a silicon-containing layer by flowing a first silicon-containing precursor which, in the case of Fig. 3 would necessarily involve flowing said silicon-containing precursor from the first gas source (328) and through first gas supply circuit (332) such that it is supplied to the first reaction chamber (312); moreover, in order for the system to perform these processing steps, the appropriate instructions must be stored in the memory (294));
flowing a second epitaxial reactant from the second epitaxial reactant source to the first reaction chamber via the second reactant shared line (see, e.g., Fig. 5, ¶[0043], and ¶¶[0051]-[0057] which teach a method of depositing a SiOxCy-containing layer by flowing a second reactant such as oxygen which, in the case of Fig. 3 would necessarily involve flowing said oxygen precursor from the second gas source (398) and through second supply circuit (334) such that it is supplied to the first reaction chamber (312); moreover, in order for the system to perform these processing steps, the appropriate instructions must be stored in the memory (294));
performing a second cycle, the second cycle comprising:
flowing the first epitaxial semiconductor reactant comprising the silicon precursor from the first epitaxial semiconductor reactant source to the second reaction chamber via the first reactant shared line (see, e.g., Fig. 5 and ¶¶[0051]-[0057] which teach a method of depositing a silicon-containing layer by flowing a first silicon-containing precursor which, in the case of Fig. 3 would necessarily involve flowing said silicon-containing precursor from the first gas source (328) and through first gas supply circuit (332) such that it is supplied to the second reaction chamber (314); moreover, in order for the system to perform these processing steps, the appropriate instructions must be stored in the memory (294)),
wherein the reactor system is configured to deliver the first epitaxial semiconductor reactant from the first epitaxial semiconductor reactant source to the first reaction chamber and the second reaction chamber through the first reactant shared line (see, e.g., Fig. 3 and ¶¶[0038]-[0049] which teach that the first gas source is delivered to the first (312) and second (314) chambers by the shared first gas line (332); see also ¶[0033] which teaches that a crystalline layer may be deposited from a Si-containing precursor, indicating that the gas source(s) (328) and/or (398) are configured to deliver an epitaxial semiconductor reactant), and
wherein only the first epitaxial semiconductor reactant and second epitaxial reactant are flowed during the first cycle, wherein, during the first cycle, the first epitaxial semiconductor reactant and second epitaxial semiconductor reactant are flowed concurrently (see, e.g., Fig. 5, ¶[0043], and ¶¶[0051]-[0057] which teach a method of depositing a SiOxCy-containing layer by, for example, concurrently flowing only the first silicon-containing precursor and only the second epitaxial reactant such as oxygen during the first cycle in order to deposit the desired SiOxCy-containing layer).
Kim does not teach that the first epitaxial semiconductor source comprises a chlorinated silicon precursor and that the second epitaxial reactant source is a semiconductor reactant comprised of a germanium precursor. However, in Fig. 2 and ¶¶[0048]-[0055] as well as elsewhere throughout the entire reference Brabant teaches an analogous embodiment of a CVD reactor which includes, inter alia, a plurality of precursor gases such as hydrogen (72), a silane source (86), and a germane source (84) for the formation of epitaxial Si, Ge, and/or SiGe thin films. In some embodiments the Si-containing source gas may be in the form of a chlorinate Si precursor such as dichlorosilane (DCS) or trichlorosilane (TCS) (74). Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Brabant and would be motivated to include not just a chlorinated Si precursor as a first epitaxial silicon-containing reactant, but also a source of germane as a second epitaxial germanium-containing reactant in order to facilitate the simultaneous deposition of epitaxial layers of Group IV semiconductors such as Si, Ge, and/or SiGe in the first (312) and/or second (314) chambers in the apparatus of Kim in order to increase the throughput of the device fabrication process and facilitate the deposition of additional semiconductor thin film layers with differing compositions. In this case the use of a chlorinated Si precursor as an alternative to a silane precursor would involve nothing more than the use of a known equivalent for the same purpose which supports a prima facie determination of obviousness.
Kim and Brabant do not teach that the second cycle is performed in the second reaction chamber after the first cycle and without flowing the second epitaxial semiconductor reactant to the second reaction chamber. However, in Fig. 3 and ¶¶[0057]-[0074] Lee teaches an analogous embodiment of a dual reactor system which includes a first (100) and second reactor (100’) that are separately connected to first (151) and second (155) reactant sources by shared supply lines (141)-(141’) and (143)-(143’), respectively. In ¶[0062] Lee specifically teaches that supply control valves (511), (511’), (513), and (513’) are used to individually control the flow of the first (151) and second (155) reactants to the first (100) and second (100’) reactor such that the desired reactant may be separately and sequentially supplied to each reactor as part of, for example, film growth by the atomic layer deposition (ALD) process. Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would be motivated to configure the controller (290) of Kim such that it supplies only the first epitaxial reactant to the second reaction chamber after supplying the first and second epitaxial semiconductor reactants to the first chamber with the motivation for doing so being to, for example, facilitate the sequential growth of separate epitaxial layers having a different composition (i.e., SiGe/Si bilayers) on one or more substrates either simultaneously or sequentially in the first and the second reaction chambers and/or to enable film growth by ALD.
Kim, Brabant, and Lee do not teach that only the first epitaxial semiconductor reactant is flowed during the second cycle. However, in Fig. 1 and ¶¶[0016]-[0032] as well as elsewhere throughout the entire reference Margetis teaches an analogous system and method for epitaxial deposition of the Group IV semiconductors, Si, Ge, C, and Sn. As shown in Fig. 1, the reaction system (10) includes a first (100) and second (200) multi-port injector for delivering a first gas such as silane and a second gas such as germane to a substrate (120). In ¶¶[0027]-[0032] Margetis specifically teaches that the reaction system (10) may be used to form multilayer film stacks comprised of alternating layers of Si and SiGe by delivering the Si precursor through the first injector (100) and the Ge precursor through the second injector (200). Deposition of such a multilayer stack would be achieved by flowing Si and Ge during one cycle and then only Si during the next cycle in order to form a stack comprised of, for example, SiGe/Si/SiGe/Si. Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Margetis and would recognize that in order to deposit a multilayer stack comprised of alternating layers of Si and SiGe it would be necessary to flow only the first epitaxial semiconductor reactant during the second cycle such that a single material such as Si is deposited during that cycle and would be motivated to flow only the first epitaxial semiconductor reactant for that purpose. Alternatively, as discussed infra with respect to the rejection of claim 10, each layer on the same substrate could be performed in a separate chamber such that SiGe is formed in the first chamber and, after transferring the wafer to the second chamber, Si is then formed on the SiGe layer. The combination of prior art elements according to known methods to yield predictable results has been held to support a prima facie determination of obviousness. All the claimed elements are known in the prior art and one skilled in the art could combine the elements as claimed by known methods with no change in their respective functions, with the combination yielding nothing more than predictable results to one of ordinary skill in the art. KSR International Co. v. Teleflex Inc., 550 U.S. 398, __, 82 USPQ2d 1385, 1395 (2007). See also, MPEP 2143(A).
Claim 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim in view of Brabant and further in view of Lee and Margetis and still further in view of U.S. Patent Appl. Publ. No. 2002/0137334 to Watanabe, et al. (“Watanabe”).
Regarding claim 4, Kim, Brabant, Lee, and Margetis do not teach that the first susceptor and the second susceptor each comprise a first heater in a first susceptor portion and a second heater in a second susceptor portion, such that the first susceptor and the second susceptor comprise dual-zone heaters. However, in Fig. 1 and ¶¶[0046]-[0052] Watanabe teaches an analogous embodiment of a CVD apparatus which includes, inter alia, a heating stage (3) comprised of a susceptor (31) with a heater (32) that is divided into a plurality of zones which includes central (32a) and peripheral (32b) heaters in order to independently control the heating rate of different regions on the susceptor (31). Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would be motivated to provide each of the supports (354) of Kim with a dual zone heater comprised of central (32a) and peripheral (32b) heaters in order to provide independent control over different regions of the substrate such that the desired temperature profile can be maintained.
Claims 7-8 and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim in view of Brabant and further in view of Lee and still further in view of Margetis and even further in view of U.S. Patent Appl. Publ. No. 2011/0256692 to Tam, et al. (“Tam”).
Regarding claim 7, Kim, Brabant, Lee, and Margetis do not teach that the first fluid distribution system and the second fluid distribution system each comprise a first channel fluidly coupled to the first epitaxial semiconductor reactant source and a second channel fluidly coupled to the second epitaxial semiconductor reactant source, wherein the first channel and the second channel are fluidly separate. However, in Figs. 2-4 and ¶¶[0026]-[0043] Tam teaches an analogous embodiment of a CVD system which includes, inter alia, a showerhead assembly (204) which includes first (204A) and second (205B) gas channels which are coupled to first and second process gases via first (259) and second (258) processing gas inlets, respectively. The use of separate gas channels (204A) and (204B) facilitates delivery of the first and second process gases via separate gas conduits in the showerhead (204) such as via an inner (246) and outer (245) gas conduits, respectively, in order to deliver the two process gases evenly across the substrate and, when desired, to promote intermixing of the process gases in the vicinity of the substrate. Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would be motivated to utilize showerheads (320) in the apparatus of Kim which are comprised of separate first (204A) and second (204B) channels which are fluidly coupled to the first and second reactant sources of Lee in order to uniformly deliver the desired precursor gases over the entire substrate.
Regarding claim 8, Kim teaches that the remote plasma unit is fluidly coupled to the first channel and the second channel in each of the first fluid distribution system and the second fluid distribution system (see, e.g., Fig. 3 and ¶¶[0038]-[0049] which teach that the remote plasma source (394) is coupled to the gas distribution system (304) which, in turn, is coupled to first (332) and second (334) gas supply circuits which, as explained supra with respect to the rejection of claim 7, are coupled to first (204A) and second (204B) channels in each showerhead; accordingly, the remote plasma source (394) may be considered as being coupled to the first and second channel in the first and second fluid distribution system as claimed and a person of ordinary skill in the art prior to the effective filing date of the invention would be motivated to utilize such a configuration in order to uniformly supply a remote plasma with the desired process gas uniformly across the entire substrate).
Regarding claim 13, Kim, Brabant, Lee, and Margetis do not teach that the second channel comprises a greater number of holes at an outer portion of each of the first fluid distribution system and the second fluid distribution system than the first channel. However, in Fig. 4A and ¶[0034] Tam teaches an embodiment of a showerhead (400) which includes a classic one-to-one square pattern of gas passages. In some embodiments the configuration in Fig. 4A results in a pattern in which each row has more of the second gas conduits (404) than the first gas conduits (402) which therefore means that the second gas conduit (404) has a greater number of holes at an outer portion of the showerhead (400). Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Tam and would recognize that a traditional square pattern may be utilized for the first and second gas channels which produces a greater number of holes for the second channel at an outer portion of the showerhead (400) with the motivation for doing so being to utilize a known configuration that produces a relatively uniform distribution of process gases. Alternatively, since the location of each gas conduit (402) and (404) determines where each precursor gas is delivered to the substrate, it is considered to be a result-effective variable, i.e., a variable which achieves a recognized result. See, e.g., In re Antonie, 559 F.2d 618, 195 USPQ 6 (CCPA 1977). See also MPEP 2144.05(II)(B). It therefore would have been within the capabilities of a person of ordinary skill in the art prior to the effective filing date of the invention to provide a greater number of second gas conduits (404) around an outer periphery of the showerhead (400) in order to, for example, compensate for compositional nonuniformities or to produce the desired concentration profile around an outer periphery of the wafer.
Claim 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim in view of Brabant and further in view of Lee and still further in view of Margetis and even further in view of U.S. Patent Appl. Publ. No. 2020/0161171 to Colombeau, et al. (“Colombeau”).
Regarding claim 10, Kim teaches that the tangible, non-transitory memory has instructions stored thereupon that, in response to execution by the controller (see, e.g., Figs. 2-3 and ¶¶[0034]-[0036] which teach that the controller (290) includes a CPU (292) and memory (294) with instructions stored thereupon), causes the controller to perform operations further comprising:
before performing the first cycle, loading a substrate onto the first susceptor (see, e.g., Figs. 2-3 and ¶[0041] which teaches that a substrate (324) is first transferred to the first substrate support (354) in the first chamber (312) through an access port in order to perform film growth thereupon; moreover, in order for the system to perform these processing steps, the appropriate instructions must be stored in the memory (294)), and
after performing the first cycle, unloading the substrate from the first susceptor (see, e.g., Figs. 2-3 and at least ¶[0034] which teach that substrates are loaded and unloaded from the processing system (200) via a loadlock chamber (212); moreover, the substrate is necessarily unloaded from the first substrate support (354) in the first chamber (312) after deposition is completed).
Kim does not explicitly teach that the substrate is loaded onto the second susceptor after performing the first cycle and before performing the second cycle. However, in Figs. 1-5 and ¶¶[0021]-[0079] as well as elsewhere throughout the entire reference Colombeau teaches an analogous embodiment of a multi-chamber processing system (100) which includes a transfer chamber (108) connected to a plurality of processing chambers (112), (114), (116), (118), (120), and (122) along with a system controller (140) having a CPU (142), memory (144), and support circuits (146) which control the chambers to perform one or more processes. A flowchart of a particular method (500) is shown in Fig. 5 and ¶¶[0063]-[0079] in which one deposition process is performed in a second processing chamber in step (514) and then the substrate is transferred to a different processing chamber for the deposition of a different layer in step (520). Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Colombeau and would recognize that different chambers may be dedicated for different stages of the device fabrication process and would be motivated to transfer the wafer from the first chamber to the second chamber after performing the first cycle with the motivation for doing so being to minimize cross-contamination between different layers and to speed up the device fabrication process.
Claim 22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim in view of Brabant and further in view of Lee and still further in view of Margetis and even further in view of U.S. Patent Appl. Publ. No. 2020/0144058 to David Kohen (“Kohen”).
Regarding claim 22, Kim, Brabant, Lee, and Margetis do not teach that the germanium precursor comprises germylsilane (GeH6Si). However, in Figs. 1-2 and ¶¶[0021]-[0042] as well as elsewhere throughout the entire reference Kohen teaches an analogous system and method for the epitaxial growth of SiGe-containing layers from Si- and Ge-containing precursor gases. In ¶[0030] Kohen specifically teaches that the Ge-containing precursor may be in the form of germylsilane (GeH6Si). Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Kohen and would be motivated to utilize germylsilane as a Ge-containing precursor gas for the deposition of SiGe epitaxial layers since this would involve nothing more than the use of a known equivalent according to its intended use which supports a prima facie determination of obviousness.
Response to Arguments
Applicants’ arguments filed June 26, 2026, have been fully considered, but are moot in view of the new grounds of rejections set forth in this Office Action.
Applicants argue that the cited prior art does not teach the use of a first chlorinated Si precursor and a second germanium precursor as claimed and specifically alleges that Brabant teaches liquid dichlorosilane, but fails to teach the chlorinated semiconductor reactant of claim 1 or 24. See applicants’ 6/26/2026 reply, pp. 10-11. Applicants’ argument is noted, but is unpersuasive. As detailed supra with respect to the rejection of claims 1 and 24, in ¶¶[0050]-[0051] Brabant specifically and clearly teaches the use of dichlorosilane or trichlorosilane as a Si precursor and germane as a germanium precursor which reads upon the recitation of a “chlorinated silicon precursor” and a “germanium precursor,” respectively.
Applicants further argue that the cited prior art does not teach or suggest splitting the first and second cycle into different chambers to form a bilayer on a single substrate as recited in claim 10. Id. at pp. 11-12. Applicants’ argument is noted, but is unpersuasive. As detailed supra with respect to the rejection of claim 10, at least Fig. 5 and ¶¶[0063]-[0079] of Colombeau are relied upon to teach that transferring the substrate between two different processing chambers in order to perform two different deposition processes is known in the art.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/KENNETH A BRATLAND JR/Primary Examiner, Art Unit 1714
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