Prosecution Insights
Last updated: May 29, 2026
Application No. 18/093,648

HYDROGEN MANAGEMENT IN PLASMA DEPOSITED FILMS

Non-Final OA §103
Filed
Jan 05, 2023
Priority
Jul 19, 2020 — continuation of 11/562,902
Examiner
TURNER, BRIAN
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Applied Materials, Inc.
OA Round
3 (Non-Final)
83%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
88%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allowance Rate
620 granted / 747 resolved
+15.0% vs TC avg
Minimal +4% lift
Without
With
+4.5%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
35 currently pending
Career history
808
Total Applications
across all art units

Statute-Specific Performance

§101
1.1%
-38.9% vs TC avg
§103
89.8%
+49.8% vs TC avg
§102
4.6%
-35.4% vs TC avg
§112
3.8%
-36.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 747 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after allowance or after an Office action under Ex Parte Quayle, 25 USPQ 74, 453 O.G. 213 (Comm'r Pat. 1935). Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, prosecution in this application has been reopened pursuant to 37 CFR 1.114. Applicant's submission filed on 4/29/2026 has been entered. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1-3, 6, 8-9, 13, 15 and 18-19 are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. (PG Pub. No. US 2014/0357065 A1) in view of Yu et al. (PG Pub. No. US 2019/0319113 A1). Regarding claim 1, Wang teaches a semiconductor processing method comprising: flowing a silicon-containing precursor into a processing region of a semiconductor processing chamber (¶ 0030 & fig. 2, step 204: silicon-containing precursor delivered to processing region of a process chamber), wherein a substrate is housed within the processing region (¶ 0030: substrate 302 housed within processing region), and wherein the substrate is maintained at a temperature below or about 450 ˚C (¶ 0035: substrate temperature maintained at about 370 degrees Celsius); striking a plasma of the silicon-containing precursor (¶ 0034: silicon-containing precursor activated in a plasma); and forming a layer of amorphous silicon on a semiconductor substrate (¶ 0034 & fig. 3B: amorphous silicon layer 308 is deposited over substrate 302). Wang further teaches the as-deposited amorphous silicon comprises low hydrogen concentration (¶ 0032: as-deposited amorphous silicon layer has minimum number of hydrogen atoms). However, Wang does not teach wherein the as-deposited layer of amorphous silicon is characterized by less than or about 3% hydrogen incorporation. Yu teaches an as-deposited amorphous silicon layer (¶ 0019: 516) with hydrogen content of less than about 3 atomic % (¶ 0028: film 516 may initially include a first amount of hydrogen (e.g., around 1%)). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to configure the as-deposited amorphous silicon layer of Yang with low hydrogen content, as a means to provide a semiconductor thin film having improved deposition uniformity (Yang, ¶ 0033) and avoiding device failure (Yang, ¶ 0039). Furthermore, it has been held that where the claimed ranges overlap or lie inside ranges disclosed by the prior art, a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990). In the instant case, the claimed range (“less than or about 3%”) overlaps the range disclosed by Yu (around 1%). Since all the claimed elements were known in the prior art, and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions, the combination would have yielded nothing more than predictable results to one of ordinary skill in the art. KSR Int'l Co. v. Teleflex Inc., 550 U.S. 538, 416, 82 USPQ2d 1385, 1395 (2007); Sakraida v. AG Pro, Inc., 425 U.S. 273, 282, 189 USPQ 449, 453 (1976); Anderson’s-Black Rock, Inc. v. Pavement Salvage Co., 396 U.S. 57, 62-63, 163 USPQ 673, 675 (1969); Great Atlantic & P. Tea Co. v. Supermarket Equip. Corp., 340 U.S. 147, 152, 87 USPQ 303, 306 (1950). See MPEP § 2143.02. Regarding claim 2, Wang in view of Yu teaches the semiconductor processing method of claim 1, further comprising: flowing hydrogen into the processing region of the semiconductor processing chamber with the silicon-containing precursor (Wang, ¶ 0030: hydrogen-based gas flowed into process chamber). Regarding claim 3, Wang in view of Yu teaches the semiconductor processing method of claim 2, wherein the hydrogen is flowed at a flow rate of at least twice the flow rate of the silicon-containing precursor (Wang, ¶ 0032: H2 gas supplied at a flow rate between about 0.55 sccm/cm2 and about 3.29 sccm/cm2, silicon-containing precursor supplied at a flow rate between about 0.042 sccm/cm2 and about 0.31 sccm/cm2). Regarding claim 6, Wang in view of Yu teaches the semiconductor processing method of claim 1, further comprising: performing an energy treatment on the layer of amorphous silicon, wherein the energy treatment further reduces the hydrogen incorporation (Wang, ¶ 0037: forming 308 includes a dehydrogenation bake). Regarding claim 8, Wang in view of Yu teaches the semiconductor processing method of claim 6, wherein the energy treatment is performed without breaking vacuum conditions during the semiconductor processing method (Wang, ¶¶ 0037-0038: dehydrogenation bake performed as an in-situ process, and Wang is silent to breaking vacuum conditions). Regarding claim 9, Wang teaches a semiconductor processing method comprising: flowing a silicon-containing precursor into a processing region of a semiconductor processing chamber (¶ 0030 & fig. 2, step 204: silicon-containing precursor delivered to processing region of a process chamber), wherein a substrate is housed within the processing region (¶ 0030: substrate 302 housed within processing region), and wherein the substrate is maintained at a temperature below or about 450 ˚C (¶ 0035: substrate temperature maintained at about 370 degrees Celsius); flowing a catalytic precursor into the processing region of the semiconductor processing chamber (¶ 0030: activation gas delivered to processing region); striking a plasma of the silicon-containing precursor and the catalytic precursor (¶ 0034: silicon-containing precursor and activation gas activated in a plasma); and forming a layer of amorphous silicon on a semiconductor substrate (¶ 0034 & fig. 3B: amorphous silicon layer 308 is deposited over substrate 302). Wang further teaches the amorphous silicon as-deposited comprises low hydrogen concentration (¶ 0032: as-deposited amorphous silicon layer has minimum number of hydrogen atoms). . However, Wang does not teach wherein the layer of as-deposited amorphous silicon is characterized by less than or about 3% hydrogen incorporation. Yu teaches an as-deposited amorphous silicon layer (¶ 0019: 516) with hydrogen content of less than about 3 atomic % (¶ 0028: film 516 may initially include a first amount of hydrogen (e.g., around 1%)). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to configure the as-deposited amorphous silicon layer of Yang with low hydrogen content, as a means to provide a semiconductor thin film having improved deposition uniformity (Yang, ¶ 0033) and avoiding device failure (Yang, ¶ 0039). Furthermore, it has been held that where the claimed ranges overlap or lie inside ranges disclosed by the prior art, a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990). In the instant case, the claimed range (“less than or about 3%”) overlaps the range disclosed by Yu (around 1%). Since all the claimed elements were known in the prior art, and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions, the combination would have yielded nothing more than predictable results to one of ordinary skill in the art. KSR Int'l Co. v. Teleflex Inc., 550 U.S. 538, 416, 82 USPQ2d 1385, 1395 (2007); Sakraida v. AG Pro, Inc., 425 U.S. 273, 282, 189 USPQ 449, 453 (1976); Anderson’s-Black Rock, Inc. v. Pavement Salvage Co., 396 U.S. 57, 62-63, 163 USPQ 673, 675 (1969); Great Atlantic & P. Tea Co. v. Supermarket Equip. Corp., 340 U.S. 147, 152, 87 USPQ 303, 306 (1950). See MPEP § 2143.02. Regarding claim 13, Wang in view of Yu teaches the semiconductor processing method of claim 9, further comprising: performing an energy treatment on the layer of amorphous silicon, wherein the energy treatment further reduces the hydrogen incorporation (Wang, ¶ 0037: forming 308 includes a dehydrogenation bake). Regarding claims 15, Wang teaches a semiconductor processing method comprising: flowing a silicon-containing precursor into a processing region of a semiconductor processing chamber (¶ 0030 & fig. 2, step 204: silicon-containing precursor delivered to processing region of a process chamber), wherein a substrate is housed within the processing region (¶ 0030: substrate 302 housed within processing region), and wherein the substrate is maintained at a temperature below or about 450 °C (¶ 0035: substrate temperature maintained at about 370 degrees Celsius); striking a plasma of the silicon-containing precursor (¶ 0034: silicon-containing precursor activated in a plasma); forming a layer of amorphous silicon on a semiconductor substrate (¶ 0034 & fig. 3B: amorphous silicon layer 308 is deposited over substrate 302), wherein the layer of amorphous silicon as-deposited is characterized by a first amount of hydrogen incorporation (¶ 0032: gas flow selected to provide a minimum number of hydrogen atoms included in the film); and performing an energy treatment on the layer of amorphous silicon (¶ 0037: dehydrogenation bake performed on the amorphous silicon layer), wherein the energy treatment reduces an amount of hydrogen from the layer of amorphous silicon to a second amount of hydrogen incorporation less than the first amount of hydrogen incorporation (¶ 0037: dehydrogenation bake process reduces hydrogen incorporation of the amorphous silicon layer). Wang further teaches the method provides improved deposition uniformity and surface roughness of amorphous silicon films (¶ 0045), and the as-deposited amorphous silicon comprises low hydrogen concentration (¶ 0032: as-deposited amorphous silicon layer has minimum number of hydrogen atoms). However, Wang does not teach wherein the as-deposited layer of amorphous silicon is characterized by less than or about 3% hydrogen incorporation. Yu teaches an as-deposited amorphous silicon layer (¶ 0019: 516) with hydrogen content of less than about 3 atomic % (¶ 0028: film 516 may initially include a first amount of hydrogen (e.g., around 1%)). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to configure the as-deposited amorphous silicon layer of Yang with low hydrogen content, as a means to provide a semiconductor thin film having improved deposition uniformity (Yang, ¶ 0033) and avoiding device failure (Yang, ¶ 0039). Furthermore, it has been held that where the claimed ranges overlap or lie inside ranges disclosed by the prior art, a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990). In the instant case, the claimed range (“less than or about 3%”) overlaps the range disclosed by Yu (around 1%). Since all the claimed elements were known in the prior art, and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions, the combination would have yielded nothing more than predictable results to one of ordinary skill in the art. KSR Int'l Co. v. Teleflex Inc., 550 U.S. 538, 416, 82 USPQ2d 1385, 1395 (2007); Sakraida v. AG Pro, Inc., 425 U.S. 273, 282, 189 USPQ 449, 453 (1976); Anderson’s-Black Rock, Inc. v. Pavement Salvage Co., 396 U.S. 57, 62-63, 163 USPQ 673, 675 (1969); Great Atlantic & P. Tea Co. v. Supermarket Equip. Corp., 340 U.S. 147, 152, 87 USPQ 303, 306 (1950). See MPEP § 2143.02. Regarding claim 18, Wang in view of Yu teaches the semiconductor processing method of claim 15, including an energy treatment to reduce an amount of hydrogen incorporation (Wang, ¶ 0037). Wang in view of Yuas applied to claim 15 above is silent to the reduced/second amount of hydrogen incorporation less than or about 2 atomic %. However, Yu teaches a subsequent energy treatment process for treating the amorphous silicon layer (Yu, ¶ 0031: anneal process 212), and further reducing hydrogen incorporation (initial amount of hydrogen in 516 about 1%; amount of hydrogen after anneal process 212 in a range from 70% to 95% the amount of hydrogen present before the anneal). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to configure the method of Wang in view of Yu with a reduced second hydrogen content, as a means to further optimize film properties such as uniformity and deposition profile (Wang, ¶ 0046). Regarding claim 19, Wang in view of Yu teaches the semiconductor processing method of claim 15, further comprising: flowing hydrogen into the processing region of the semiconductor processing chamber with the silicon-containing precursor (Wang, ¶ 0030: hydrogen-based gas flowed into process chamber). Claims 4 and 10-11 are rejected under 35 U.S.C. 103 as being unpatentable over Wang in view of Yuas applied to claims 1 and 9 above, and further in view of Kim et al. (PG Pub. No. US 2017/0221557 A1). Regarding claim 4, Wang in view of Yu teaches the semiconductor processing method of claim 1, comprising flowing a silicon-containing precursor into the processing region of the semiconductor processing chamber (Wang, ¶ 0030: silicon-containing precursor delivered to the processing region). Wang in view of Yufurther teaches an activation gas are delivered to the processing region (Wang, ¶ 0030). Wang in view of Yuis silent to the processing method further comprising: flowing a boron-containing precursor or a phosphorus-containing precursor into the processing region of the semiconductor processing chamber with the silicon-containing precursor. Kim teaches a processing method of forming an amorphous silicon layer (¶ 0044) including flowing a silicon-containing precursor (silicon source gas, corresponding to the silicon-containing precursor of Wang) and a boron-containing precursor or a phosphorus-containing precursor (boron source gas) into a processing region of a semiconductor processing chamber (boron source gas and silicon source gas injected into a reaction chamber to form the amorphous silicon layer). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to configure the processing method of Wang in view of Yuto further comprise flowing a boron-containing precursor into the processing chamber with the silicon-containing precursor, as a means to decrease the reaction temperature (Kim, ¶ 0044), providing for reduced overall thermal budget, as well as the use of transparent or low cost substrate materials such as plastic (Wang, ¶ 0028). Since all the claimed elements were known in the prior art, and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions, the combination would have yielded nothing more than predictable results to one of ordinary skill in the art. KSR Int'l Co. v. Teleflex Inc., 550 U.S. 538, 416, 82 USPQ2d 1385, 1395 (2007); Sakraida v. AG Pro, Inc., 425 U.S. 273, 282, 189 USPQ 449, 453 (1976); Anderson’s-Black Rock, Inc. v. Pavement Salvage Co., 396 U.S. 57, 62-63, 163 USPQ 673, 675 (1969); Great Atlantic & P. Tea Co. v. Supermarket Equip. Corp., 340 U.S. 147, 152, 87 USPQ 303, 306 (1950). See MPEP § 2143.02. Regarding claim 10, Wang in view of Yu teaches the semiconductor processing method of claim 9, comprising a catalytic precursor (Wang, ¶ 0030). Wang in view of Yu does not teach wherein the catalytic precursor comprises a boron-containing precursor, a phosphorus-containing precursor, or a silicon-and-halogen-containing precursor. Kim teaches a processing method of forming an amorphous silicon layer (¶ 0044) including flowing a silicon-containing precursor (silicon source gas, corresponding to the silicon-containing precursor of Wang) and a boron-containing precursor or a phosphorus-containing precursor (boron source gas) into a processing region of a semiconductor processing chamber (boron source gas and silicon source gas injected into a reaction chamber to form the amorphous silicon layer). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to configure the processing method of Wang in view of Yu to further comprise flowing a boron-containing precursor into the processing chamber with the silicon-containing precursor, as a means to decrease the reaction temperature (Kim, ¶ 0044), providing for reduced overall thermal budget, as well as the use of transparent or low cost substrate materials such as plastic (Wang, ¶ 0028). Since all the claimed elements were known in the prior art, and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions, the combination would have yielded nothing more than predictable results to one of ordinary skill in the art. KSR Int'l Co. v. Teleflex Inc., 550 U.S. 538, 416, 82 USPQ2d 1385, 1395 (2007); Sakraida v. AG Pro, Inc., 425 U.S. 273, 282, 189 USPQ 449, 453 (1976); Anderson’s-Black Rock, Inc. v. Pavement Salvage Co., 396 U.S. 57, 62-63, 163 USPQ 673, 675 (1969); Great Atlantic & P. Tea Co. v. Supermarket Equip. Corp., 340 U.S. 147, 152, 87 USPQ 303, 306 (1950). See MPEP § 2143.02. Regarding claim 11, Wang in view of Yu and Kim teaches the semiconductor processing method of claim 10, wherein the halogen comprises fluorine, chlorine, or iodine (note that since claim 10 does not require halogen, the type of halogen gas is moot. Accordingly, the catalyst of Kim meets the limitations required by claim 11). Claims 5, 12 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Wang in view of Yu as applied to claims 1, 9 and 15 above, and further in view of Asami et al. (PG Pub. No. US 2002/0014625 A1). Regarding claim 5, Wang in view of Yu teaches the semiconductor processing method of claim 1, comprising forming a layer of amorphous silicon by striking a plasma of silicon-containing precursor (Wang, ¶ 0034). Wang in view of Yu is silent to wherein the plasma is pulsed at a frequency of less than or about 10 kHz during the semiconductor processing method, and wherein a duty cycle of plasma pulsing is less than or about 50%. Asami teaches a method of forming a layer of amorphous silicon by a plasma process (¶ 0050), wherein the plasma is pulsed at a frequency of less than or about 10 kHz during the semiconductor processing method (¶ 0053: repetition frequency of 10 Hz to 10 kHz), and wherein a duty cycle of plasma pulsing is less than or about 50% (¶ 0053: duty ratio set to 1 to 50%). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to configure the semiconductor processing of Wang in view of Yu with the plasma conditions of Asami, as a means to allow selection of radical species (atoms or molecules that are electrically neutral and chemically active) in the deposition process of the amorphous semiconductor film (Asami, ¶ 0054), optimizing surface reaction in forming the film (Asami, ¶ 0057). Regarding claim 12, Wang in view of Yu teaches the semiconductor processing method of claim 9, comprising forming a layer of amorphous silicon by striking a plasma of silicon-containing precursor and a catalytic precursor (Wang, ¶ 0034). Wang in view of Yu is silent to wherein the plasma is pulsed at a frequency of less than or about 10 kHz during the semiconductor processing method, and wherein a duty cycle of plasma pulsing is less than or about 50%. Asami teaches a method of forming a layer of amorphous silicon by a plasma process (¶ 0050), wherein the plasma is pulsed at a frequency of less than or about 10 kHz during the semiconductor processing method (¶ 0053: repetition frequency of 10 Hz to 10 kHz), and wherein a duty cycle of plasma pulsing is less than or about 50% (¶ 0053: duty ratio set to 1 to 50%). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to configure the semiconductor processing of Wang in view of Yu with the plasma conditions of Asami, as a means to allow selection of radical species (atoms or molecules that are electrically neutral and chemically active) in the deposition process of the amorphous semiconductor film (Asami, ¶ 0054), optimizing surface reaction in forming the film (Asami, ¶ 0057). Regarding claim 20, Wang in view of Yu teaches the semiconductor processing method of claim 15, comprising forming a layer of amorphous silicon by striking a plasma of silicon-containing precursor (Wang, ¶ 0034). Wang in view of Yu is silent to wherein the plasma is pulsed at a frequency of less than or about 10 kHz during the semiconductor processing method, and wherein a duty cycle of plasma pulsing is less than or about 50%. Asami teaches a method of forming a layer of amorphous silicon by a plasma process (¶ 0050), wherein the plasma is pulsed at a frequency of less than or about 10 kHz during the semiconductor processing method (¶ 0053: repetition frequency of 10 Hz to 10 kHz), and wherein a duty cycle of plasma pulsing is less than or about 50% (¶ 0053: duty ratio set to 1 to 50%). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to configure the semiconductor processing of Wang in view of Yu with the plasma conditions of Asami, as a means to allow selection of radical species (atoms or molecules that are electrically neutral and chemically active) in the deposition process of the amorphous semiconductor film (Asami, ¶ 0054), optimizing surface reaction in forming the film (Asami, ¶ 0057). Claims 7, 14 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Wang in view of Yu as applied to claims 6, 13 and 15 above, and further in view of Jeong et al. (PG Pub. No. US 2016/0284562 A1). Regarding claim 7, Wang in view of Yu teaches the semiconductor processing methods of claims 6 and 13, comprising an energy treatment (Wang, ¶ 0038). Wang in view of Yu does not teach wherein the energy treatment comprises exposing the layer of amorphous silicon to UV, microwave, or in plasma. Jeong teaches a method including performing of dehydrogenation (¶ 0027) after forming amorphous silicon on a substrate (¶ 0068: to-be-processed object S, including amorphous silicon 23 formed on substrate 21), wherein the dehydrogenation comprises exposing the amorphous silicon to UV (¶ 0074: irradiating the to-be-processed object S by operating a lamp which emits ultraviolet light (UV)). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to configure he energy treatment of Wang in view of Yu with the UV of Jeong, as a means to debond Si—H bonds in the thin film (Jeong, ¶ 0074) by using light having a wavelength band similar to the bonding energy of Si and H (Jeong, ¶ 0052), thereby facilitating the dehydrogenation of Wang in Yamazaki. Since all the claimed elements were known in the prior art, and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions, the combination would have yielded nothing more than predictable results to one of ordinary skill in the art. KSR Int'l Co. v. Teleflex Inc., 550 U.S. 538, 416, 82 USPQ2d 1385, 1395 (2007); Sakraida v. AG Pro, Inc., 425 U.S. 273, 282, 189 USPQ 449, 453 (1976); Anderson’s-Black Rock, Inc. v. Pavement Salvage Co., 396 U.S. 57, 62-63, 163 USPQ 673, 675 (1969); Great Atlantic & P. Tea Co. v. Supermarket Equip. Corp., 340 U.S. 147, 152, 87 USPQ 303, 306 (1950). See MPEP § 2143.02. Regarding claim 16, Wang in view of Yu teaches the semiconductor processing method of claim 15, comprising an energy treatment (Wang, ¶ 0038). Wang in view of Yu does not teach wherein the energy treatment comprises exposing the layer of amorphous silicon to UV, microwave, or in situ plasma. Jeong teaches a method including performing of dehydrogenation (¶ 0027) after forming amorphous silicon on a substrate (¶ 0068: to-be-processed object S, including amorphous silicon 23 formed on substrate 21), wherein the dehydrogenation comprises exposing the amorphous silicon to UV (¶ 0074: irradiating the to-be-processed object S by operating a lamp which emits ultraviolet light (UV)). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to configure he energy treatment of Wang in view of Yu with the UV of Jeong, as a means to debond Si—H bonds in the thin film (Jeong, ¶ 0074) by using light having a wavelength band similar to the bonding energy of Si and H (Jeong, ¶ 0052), thereby facilitating the dehydrogenation of Wang. Since all the claimed elements were known in the prior art, and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions, the combination would have yielded nothing more than predictable results to one of ordinary skill in the art. KSR Int'l Co. v. Teleflex Inc., 550 U.S. 538, 416, 82 USPQ2d 1385, 1395 (2007); Sakraida v. AG Pro, Inc., 425 U.S. 273, 282, 189 USPQ 449, 453 (1976); Anderson’s-Black Rock, Inc. v. Pavement Salvage Co., 396 U.S. 57, 62-63, 163 USPQ 673, 675 (1969); Great Atlantic & P. Tea Co. v. Supermarket Equip. Corp., 340 U.S. 147, 152, 87 USPQ 303, 306 (1950). See MPEP § 2143.02. Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Wang in view of Yu as applied to claim 15 above, and further in view of Yamazaki et al. (Patent No. US 6,670,640 B1, hereinafter referenced as ‘Yamazaki-640’). Regarding claim 17, Wang in view of Yu teaches the semiconductor processing method of claim 15, comprising an in-situ energy treatment (Wang, ¶ 0037). Wang in view of Yu does not teach wherein the energy treatment comprises exposing the amorphous silicon to in situ plasma, and wherein the in situ plasma is formed at less than or about 2,000 W. Yamazaki-640 teaches a dehydrogenating energy treatment comprising exposing amorphous silicon to plasma (col. 11 lines 63-65: dehydrogenation of an amorphous silicon film by plasma treatment). Furthermore, Yamazaki-640 does not teach forming the plasma at more than or about 2,000 W. It would have been obvious to one of ordinary skill in the art at the time the invention was filed to configure the in-situ energy treatment of Wang in view of Yu with plasma, as a means to facilitate releasing hydrogen from the amorphous silicon, accelerating desorption of hydrogen from the film, strengthening a bond among silicon atoms, and allowing for easier crystallization of the amorphous silicon (Yamazaki-640, col. 12 lines 24-32). Furthermore, it has been held that where the claimed ranges overlap or lie inside ranges disclosed by the prior art, a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990). In the instant case, the claimed range of “plasma is formed at less than or about 2,000 W” overlaps the range implicitly disclosed by Yamazaki-640. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Tsai et al. (PG Pub. No. US 2002/0018862 A1) teaches depositing an amorphous silicon precursor layer with low hydrogen incorporation on a substrate at temperatures of 450 °C (¶ 0006). Sato et al. (PG Pub. US 2002/0058399 A1) teaches amorphous silicon films with hydrogen incorporation less than 3 atomic % (¶ 0007). Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRIAN TURNER whose telephone number is (571)270-5411. The examiner can normally be reached M-F 8am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached at 571-270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BRIAN TURNER/Examiner, Art Unit 2818
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Prosecution Timeline

Show 13 earlier events
Mar 14, 2025
Response after Non-Final Action
Mar 14, 2025
Response after Non-Final Action
Mar 17, 2025
Response after Non-Final Action
Mar 17, 2025
Response after Non-Final Action
Dec 12, 2025
Response after Non-Final Action
Apr 29, 2026
Request for Continued Examination
May 06, 2026
Response after Non-Final Action
May 20, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
83%
Grant Probability
88%
With Interview (+4.5%)
2y 0m (~0m remaining)
Median Time to Grant
High
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