DETAILED ACTION
This Office action is in response to the election and claim amendments filed 5 January 2026. By this amendment, claims 6-14 and 19-29 are withdrawn; claim 15 is amended. Claims 1-29 are currently pending; claims 6-14 and 19-29 stand withdrawn.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of Species III (Fig. 29), Sub-species A (Figs. 5-6), claims 1-5 and 15-18, in the reply filed on 5 January 2026 is acknowledged. The traversal is on the ground(s) that (1) each of claims 1-29 are directed to a dual-side-cooled embedded die package and thus, are considered part of Species III, and (2) limiting this application to Sub-species A is unnecessarily restrictive. (Remarks, pp. 11-12.) As to (1), this argument is found persuasive and the restriction between Species I-III is withdrawn. Since all claims as originally presented were directed to Species III, it is noted that Species III is therefore constructively elected by original presentation. As to (2), this is not found persuasive because Sub-species A and B are mutually exclusive for the reasons as set forth in the Restriction Requirement mailed 7 November 2025, and thus present an undue search and examination burden necessitating the employment of different search strategies for each species. Therefore, the restriction between Sub-species A and B is maintained.
Applicant is respectfully reminded rejoinder may be possible if future prosecution renders allowable subject matter and claims non-elected require all limitations of an allowable claim.
The requirement is still deemed proper and is therefore made FINAL.
Claims 6-14 and 19-29 have been withdrawn by Applicant; claims 17 and 18 depend directly or indirectly from withdrawn claim 14 and are thus withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected species, there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on 5 January 2026.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-5 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 2022/0020669 A1 to McKnight-MacNeil et al. (hereinafter “McKnight-MacNeil”).
Regarding independent claim 1, McKnight-MacNeil (Fig. 29) discloses an embedded die package comprising a laminated body and a die (Die; ¶ 0097) comprising a power semiconductor device (¶ 0097), the die being embedded within the laminated body, the laminated body comprising a stack of a plurality of dielectric build-up layers 120-1/120-2/120-3/110 (¶ 0094) and a plurality of electrically conductive layers 130-1/130-2/130-3 (¶ 0094), wherein a primary thermal pad 118 (¶ 0096) is provided on a first side (bottom) of the package and a secondary thermal pad 130-2 (¶ 0094) is provided on an opposite side (top) of the package (Examiner notes that the primary thermal pad/secondary thermal pad and first side/second side may be reversed in an alternative interpretation), the primary and secondary thermal pads providing for dual-side-cooling (¶ 0096; ¶ 0084 - 130-2 comprises copper, suitable for heat dissipation and cooling).
Regarding claim 2, McKnight-MacNeil (Fig. 29) discloses the embedded die package of claim 1, wherein the laminated body is based on a bottom-side-cooled layup that provides the primary thermal pad 118 and electrical connections 130-3 (¶ 0094) for the power semiconductor device on the first side (bottom-side) (bottom) of the package and wherein the secondary thermal pad 130-2 is provided on the opposite side (top-side) (top) of the package.
Regarding claim 3, McKnight-MacNeil (Fig. 29) discloses the embedded die package of claim 1, wherein the laminated body is based on a top-side cooled layup that provides the primary thermal pad 118 on the first side (top-side) (top of 180° rotation of Fig. 29) of the package and wherein the secondary thermal pad 130-2 and electrical connections 130-2 (¶ 0094) for the power semiconductor device are provided on the opposite side (bottom-side) (bottom of 180° rotation of Fig. 29) of the package.
Regarding claim 4, McKnight-MacNeil (Fig. 29) discloses the embedded die package of claim 2, wherein one of said plurality of electrically conductive layers comprises a leadframe 114/116 (¶ 0095), the leadframe supporting the die within the laminated body and providing said primary thermal pad 118 (Fig. 29).
Regarding claim 5, McKnight-MacNeil (Fig. 29) discloses the embedded die package of claim 3, wherein one of said plurality of electrically conductive layers comprises a leadframe 114/116, the leadframe supporting the die within the laminated body and providing said primary thermal pad 118 (Fig. 29).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over McKnight-MacNeil.
Regarding independent claim 15, McKnight-MacNeil (Fig. 29) discloses an embedded die package 1000 (¶ 0096) comprising a laminated body 120-1/120-2/120-3/130-1/130-2/130-3 (¶¶ 0095-96) and a die (Die; ¶ 0097) comprising a power semiconductor device (¶ 0097), the die being embedded within the laminated body, wherein:
the die (Die; see also Fig. 6B, ¶ 0080) comprises a patterned layer of conductive metallization on a front-side of the die providing electrical contact areas of the power semiconductor device (Fig. 29; ¶ 0080), and a thermal contact area (118 connected thereto; ¶0095) on a back-side of the die (Fig. 29); and
a layer stack of the laminated body comprises:
a first conductive layer comprising a leadframe 114/116 (¶ 0095) supporting the die and providing electrical contact areas and a primary thermal pad 118 (¶ 0096), the thermal contact area of the die being in thermal contact with the primary thermal pad of the leadframe (Fig. 29);
a first dielectric build-up layer 110 (¶ 0095) embedding the die and the leadframe;
a second conductive layer (Fig. 29 - conductive layer disposed on top surface of 120-1, ¶ 0094) on the first dielectric build-up layer 110;
the second conductive layer being patterned to define interconnect areas (Fig. 29);
the interconnect areas of the second conductive layer being connected by electrically conductive vias (Fig. 29 - vias in contact with top surface of Die) to respective electrical contact areas of the power semiconductor device (Die); and
a second dielectric build-up layer 120-2 (¶ 0095) on the second conductive layer;
a third conductive layer 130-2 (¶ 0096) on the second dielectric build-up layer 120-2;
the third conductive layer 130-2 being patterned to define a secondary thermal pad (Fig. 29; ¶ 0084 - 130-2 comprises copper, suitable for heat dissipation and cooling); and
a fourth conductive layer 130-3 (¶ 0096) underlying the first conductive layer 114/116 and separated therefrom by another dielectric build-up layer 120-3 (¶ 0096), the fourth conductive layer forming an external thermal pad 130-3 which is in thermal contact with the primary thermal pad 118 of the first conductive layer, and the fourth conductive layer providing external electrical contact areas which are interconnected to respective contact areas of the first conductive layer (Fig. 29), wherein the primary and secondary thermal pads providing for dual-side cooling (Fig. 29).
The instant embodiment fails to expressly disclose: the second conductive layer being connected to electrical contact areas of the leadframe 114/116. In another figure, McKnight-MacNeil (Fig. 25) discloses a conductive layer 132/134 (¶ 0095) being connected by electrically conductive vias to respective electrical contact areas of the power semiconductor devices (Die) and electrical contact areas of the leadframe 114/116 (¶ 0095). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide electrically connections between the second conductive layer and the leadframe for the purpose of electrical contact versatility and accommodating different types of die in the embedded die package.
Regarding claim 16, McKnight-MacNeil (Fig. 29) discloses the embedded die package of claim 15, wherein thermally conductive vias provide said thermal contact between the first thermal pad 118 and the external thermal pad 130-3 (¶ 0096).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Candice Y. Chan whose telephone number is (571)272-9013. The examiner can normally be reached 8:30 am - 5 pm ET.
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CANDICE Y. CHAN
Examiner
Art Unit 2813
19 February 2026
/STEVEN B GAUTHIER/Supervisory Patent Examiner, Art Unit 2813