Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Applicant’s arguments with respect to claim(s) 1-3, 5-7, 9-10 have been fully considered.
In regards to claim 1, the amendment/argument regarding the semiconductor cap layer is considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
In regards to claim 1, the amended limitation “a patterned dielectric layer, disposed on the cap layer” does not appear to be supported by the elected species (Fig. 4) and a 112(a) rejection is provided as discussed below.
In regards to claim 5, applicant argues that prior art Kobayashi et al. do not teach “wherein another side of the patterned dielectric layer is laterally separated from the drain electrode”.
The examiner would like to note that the annotated figure discloses that Kobayashi et al. do teach the limitation.
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DETAILED ACTION
This action is responsive to application No. 18097286 filed on 01/16/2023.
Information Disclosure Statement
Acknowledgment is made of Applicant’s Information Disclosure Statement (IDS) form PTO-1449. These IDS has been considered.
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Election/Restrictions
Applicant’s election without traverse of claims 1-3, 5-7, 9-10 in the reply filed on 7/14/2025 is acknowledged.
Allowable subject matter
Claim 9 is objected to (pending resolution of 112(a) rejection) as being dependent upon a rejected base claim (independent claim 1), but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reasons for allowance: The closest prior art known to the Examiner is listed on the PTO 892 forms of record.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Kobayashi et al. (US 2024/0105826).
With respect to dependent claim 9, the cited prior art does not anticipate or make obvious, inter alia, the step of: “wherein the plurality of separate dielectric segments include a first dielectric segment and a second dielectric segment that is located between the first dielectric segment and the drain electrode, and the high electron mobility transistor further comprises another field plate extended continuously from a side of the second dielectric segment to a top surface of the second dielectric segment”.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 1 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Claim recites the limitation “a patterned dielectric layer, disposed on the cap layer” is not supported by the elected species (Fig. 4). Fig 4 discloses a patterned dielectric layer 113 disposed on the first dielectric layer 110 and NOT on the cap layer 109.
Claims 2-3, 5-7, 9-10 are also rejected under 112(a) as they depend on base claim 1.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 5-7 are rejected under 35 U.S.C. 103 as being unpatentable over Kobayashi et al. (US 2024/0105826) in view of Huang et al. (US 11,201,234).
Regarding Independent claim 1, Kobayashi et al. teach a high electron mobility transistor, comprising:
a semiconductor channel layer (Fig. 1, element 1C) and a semiconductor barrier layer (Fig. 1, element 1D), disposed on a substrate (Fig. 1, element 1A);
a source electrode (Fig. 1, element 4), a gate electrode (Fig. 1, element 3) and a drain electrode (Fig. 1, element 5), disposed on the semiconductor channel layer;
a patterned dielectric layer (Fig. 1, element 9), disposed on the semiconductor barrier layer and located between the gate electrode and the drain electrode;
a first field plate (Fig. 1, element 6), extended continuously from a side of the patterned dielectric layer to a top surface of the patterned dielectric layer, and having a step in height;
a first dielectric layer (Fig. 1, element 2), disposed between the semiconductor barrier layer and the patterned dielectric layer; and
a second dielectric layer (Fig. 1, element 10), covering the patterned dielectric layer,
wherein the dielectric constant of the patterned dielectric layer (paragraph 0091 discloses silicon nitride) is higher than the dielectric constant of the first dielectric layer and the dielectric constant of the second dielectric layer (paragraph 0043,0092 disclose silicon oxide for the first and second dielectric layer).
Kobayashi et al. do not explicitly disclose a cap layer disposed on the semiconductor barrier layer.
Huang et al. teach a HEMT comprising a channel layer (Fig. 1, element 104) disposed on a substrate Fig. 1, element 100), a barrier layer Fig. 1, element 106) on the channel layer and a semiconductor cap layer Fig. 1, element 112) on the barrier layer.
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to modify the teachings of Kobayashi et al. according to the teachings of Huang et al. with the motivation to provide a “2-DEG cutoff region 122” (Col. 7, lines 34-37).
Regarding claim 2, Kobayashi et al. teach further comprising a second field plate (Fig. 1, element 7) disposed on the second dielectric layer, directly above the patterned dielectric layer, and having a step in height.
Regarding claim 3, Kobayashi et al. teach wherein the first field plate and the second field plate are electrically connected to the source electrode (Fig. 1).
Regarding claim 5, Kobayashi et al. teach wherein another side of the patterned dielectric layer is laterally separated from the drain electrode (see annotated figure above).
Regarding claim 6, Kobayashi et al. teach wherein the patterned dielectric layer comprises a plurality of separate dielectric segments (Fig. 1).
Regarding claim 7, Kobayashi et al. teach wherein the plurality of separate dielectric segments have the same composition (Fig. 1, same composition), or have different dielectric constants respectively.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Kobayashi et al. (US 2024/0105826) in view of Huang et al. (US 11,201,234) and further in view of Lin et al. (US 2022/0148938).
Regarding claim 10, Kobayashi et al. modified by Huang et al. teach all of the limitations as discussed above.
Kobayashi et al. modified by Huang et al. do not explicitly disclose wherein the patterned dielectric layer comprises a stack of a plurality of dielectric material layers, and the plurality of dielectric material layers have different dielectric constants respectively.
Lin et al. teach a HEMT comprising a stack of a plurality of dielectric material layers, and the plurality of dielectric material layers have different dielectric constants respectively (paragraph 0035).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to modify the teachings of Kobayashi et al. and Huang et al. according to the teachings of Lin et al. with the motivation to protect a gate electrode for etching damage (paragraph 0035).
Conclusion
THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAHED AHMED whose telephone number is (571)272-3477. The examiner can normally be reached M-F 9-5.
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/SHAHED AHMED/Primary Examiner, Art Unit 2813