DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 1 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claim 1 requires the limitation “a second conductive feature disposed over the epitaxial source/drain feature, the second conductive feature extending through the etch stop layer and the first ILD”. With the other limitations of the claim, the Examiner believes the second conductive feature to be element 172 in the present disclosure. However, the disclosure does not have support for a configuration where the conductive feature 172 extends through the etch stop layer 145. Rather, the conductive feature 172 terminates at the lower surface of the etch stop layer 145 (see at least Figure 26). Thus, new matter has been introduced into the claims. For examination purposes, the Examiner will interpret the limitation to require a surface of the conductive feature to extend near an opening of the etch stop layer, which is supported by the disclosure.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 9, 13, and 24 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hong et al. (“Hong” US 2019/0221475).
Regarding claim 9, Hong discloses a semiconductor device structure (Figure 16), comprising:
a first interlayer dielectric (ILD) (3) disposed over a substrate (1);
a second ILD (15) disposed over the first ILD (3);
an etch stop layer (13) disposed between and in contact with the first and second ILDs (3, 15, see Figure 16);
a first conductive feature (Va) disposed in the second ILD (15), the first conductive feature (Va) comprising:
a first portion (upper portion) separated from the second ILD (15) by a first gap (upper portions of Av1/Av2, see Figure 16); and
a second portion (lower portion) separated from the etch stop layer (13) by a second gap (lower portions of Av1/Av2, see Figure 16) less than the first gap (upper portions of Av1/Av2 between Va and ILD 15 is thicker than that of the lower portions of Av1/Av2 between Va and ESL 13, see Figure 16); and
a second conductive feature (7) disposed in the first ILD (3), the second conductive feature (7) being in contact with the first conductive feature (Va, see Figure 16), and being separated from the first ILD (3) by a third gap (gap occupied by the diffusion prevention layer 9), wherein the third gap (gap occupied by the diffusion prevention layer 9) is physically separated from the first gap (upper portions of Av1/Av2) and the second gap (lower portions of Av1/Av2) by the etch stop layer (13, see Figure 16).
Regarding claim 13, Hong discloses wherein the third gap (gap occupied by the diffusion prevention layer 9) is greater or less than the first gap (upper portions of Av1/Av2, different in size, see Figure 16, also greater or less than in terms of height within the device, or vertical length, or other parameters that have not been specifically claimed).
Regarding claim 24, Hong discloses wherein the second gap (lower portions of Av1/Av2) is less than the third gap (gap occupied by the diffusion prevention layer 9, Figure 16 shows that these gaps wrap around laterally the conductive features, and the second gap, lower portions of Av1/Av2, would then have a radius as viewed from above less than that of the third gap).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-5 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Hong et al. (“Hong” US 2019/0221475), Wu et al. (“Wu” US 2020/0411415), Liu et al. (“Liu” US 2021/0066500), and Wang et al. (“Wang” US Patent No. 9,824,937).
Regarding claim 1, Hong discloses a semiconductor device structure (Figure 16), comprising:
a substrate (1);
a first interlayer dielectric (ILD) (3) disposed over the [substrate];
an etch stop layer (13) disposed over the first ILD (3);
a second ILD (15) disposed over the etch stop layer (13),
a first conductive feature (Va) disposed in the second ILD (15), the first conductive feature (Va) being separated from the second ILD (15) by a first air gap (Av1/Av2, see Figure 16); and
a second conductive feature (7) disposed over the [substrate], the second conductive feature (7) extending through the etch stop layer (13) and the first ILD (3) and in contact with the first conductive feature (Va, see Figure 16), the second conductive feature (7) being separated from the first ILD (3) by a second [air] gap (gap occupied by the diffusion prevention layer 9) that is physically separated from the first air gap (Av1/Av2) by the etch stop layer (13, see Figure 16).
Hong does not disclose that the second gap, the area/layer between the first conductive feature and the surrounding elements, is an air gap. Rather, it is occupied/filled by a diffusion prevention layer (9).
Wu discloses, however, a conductive feature (274) configured to not have a diffusion barrier layer (see para. [0033]), rather to be surrounded by an air gap (284).
Thus, it would have been obvious to incorporate the teachings of Wu into the teachings of Hong to eliminate the barrier layer and include an air gap between the conductive feature and surrounding dielectric layers and etch stop layers for the purpose of further minimizing diffusion and reducing resistance (Wu, para. [0033]).
Hong does not explicitly disclose an epitaxial source/drain feature disposed over the substrate second ILD comprising a first dopant species having an atomic radius equal to or greater than silicon and a second dopant species having an atomic mass less than 15.
Liu discloses, however, an epitaxial source/drain feature (82) disposed over a substrate (50, see Figure 23); a second ILD (108) disposed over the first ILD (86, see Figure 23), the second ILD (108) comprising a first dopant species (germanium, from implantation process 124, see para. [0067]) having an atomic radius equal to or greater than silicon (germanium has an atomic radius greater than silicon, see para. [0067]).
It would have been obvious to a person having ordinary skill in the art to incorporate the teachings of Liu into the teachings of Hong and Wu above to include the source/drain feature because it would be clear to a person having ordinary skill in the art that the interconnection/via structure disclosed by Hong may be used in a transistor device, such as that of Liu. Further, it would have been obvious to incorporate the teachings of Liu into the teachings of Hong and Wu above to include the dopants in the second ILD in order to form an expanded region, sealing the air gaps (Liu, para. [0065]).
Liu does not disclose a second dopant species having an atomic mass less than 15.
Wang discloses, however, a second dopant species having an atomic mass less than 15 (specifically, Wang discloses using helium, which has an atomic mass of under 15, as a dopant in an implantation process 240 for a dielectric material 150, where the second ILD is considered to be the top portion of 150 of Wang, see Figure 9 and col. 6, line 43 to col. 7 line 38).
It would have been obvious to one having ordinary skill in the art to incorporate the teachings of Wang into the teachings of Hong, Wu, and Liu to include the second dopant species for the purpose of modifying the characteristics of the dielectric layer such as etch rate or hardness according to the desired requirements of the dielectric layer (see Wang, col. 6, line 43 to col. 7 line 38).
Regarding claim 2, Liu discloses wherein the first dopant species (germanium, 124 of Liu) comprise germanium (Ge), argon (Ar), xenon (Xe), silicon (Si), arsenic (As), or the like, or a combination thereof (the dopant species comprises germanium).
Regarding claim 3, Wang discloses wherein the second dopant species (helium, implantation process 240) comprise helium (He), hydrogen (H), lithium (Li), beryllium (Be), or a combination thereof (the species comprises helium).
Regarding claim 4, the combination of Hong, Wu, Liu, and Wang discloses wherein the first dopant species (germanium, 124, Liu) are atomic species of germanium (Liu) and the second dopant species (helium, 240, Wang) are neutral radical species of helium (helium, see col. 6, line 43 to col. 7 line 38).
Regarding claim 5, the combination of Hong, Wu, Liu, and Wang discloses the first dopant species (germanium, 124, Liu) have a first depth (D1) in the second ILD (108 of Liu, D1 being between 0nm and 20nm) and the second dopant species (helium, 240, Wang) have a second depth in the second ILD (top portion of 150 of Wang), and the second depth is greater than the first depth (the depth of the helium implantation of Wang is ~1200 Angstroms, and the depth of the germanium of Liu is 0 to 20nm, which is 0 to 200 Angstroms, thus the second depth of Wang is greater than the first depth of Liu).
Regarding claim 8, Wang discloses wherein the first ILD (lower portion of 150) comprises dopant species of helium (specifically, Wang discloses using helium as a dopant in an implantation process 240 for a dielectric material 150, thus the helium would also be implanted in the lower portion of 150 which is considered the first ILD, see Figure 9 and col. 6, line 43 to col. 7 line 38).
It would have been obvious to one having ordinary skill in the art to incorporate the teachings of Wang into the teachings of Hong, Wu, and Liu to include the helium also in the first ILD for the purpose of modifying the characteristics of the dielectric layer such as etch rate or hardness according to the desired requirements of the dielectric layer (see Wang, col. 6, line 43 to col. 7 line 38).
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Hong, Wu, Liu, and Wang as applied to claim 1 above, and further in view of Dolejsi et al. (“Dolejsi” US 2023/0307291).
Regarding claim 7, Hong, Wu, Liu, and Wang do not disclose wherein the etch stop layer comprises dopant species of helium.
Dolejsi discloses, however, an etch stop layer (120) comprising a dopant species of helium (see para. [0047]).
It would have been obvious to one having ordinary skill in the art to incorporate the teachings of Dolejsi into the teachings of Hong, Wu, Liu, and Wang to include the dopant species of helium in the etch stop layer for the purpose of altering dielectric constant and etchability (Dolejsi, para. [0047]).
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Hong as applied to claim 9 above, and further in view of Liu et al. (“Liu” US 2021/0066500).
Regarding claim 10, Hong does not disclose a third ILD over the second ILD.
Liu discloses a third ILD (122) disposed over the second ILD (108, see Figure 23),
wherein the first conductive feature (top portion of 118 above the first ILD 86) further comprises a third portion extending into the third ILD (122, see portion of 118 extending into the third ILD 122 in Figure 23).
It would have been obvious to a person having ordinary skill in the art to incorporate the teachings of Liu into the teachings of Hong to include a third ILD and extending the first conductive feature therein for the purpose of extending electrical contact between conductive elements to different layers of the device.
Claims 14-18 and 23 are rejected under 35 U.S.C. 103 as being unpatentable over Hong as applied to claim 9 above, and further in view of Liu et al. (“Liu” US 2021/0066500) and Wang et al. (“Wang” US Patent No. 9,824,937).
Regarding claim 14, Hong does not disclose any doping of the ILD layers.
Liu discloses wherein the second ILD (108) comprises a first dopant species (germanium, from implantation process 124, see para. [0067]) having an atomic radius equal to or greater than silicon (germanium has an atomic radius greater than silicon, see para. [0067]).
It would have been obvious to a person having ordinary skill in the art to incorporate the teachings of Liu into the teachings of Hong above to include the dopants in the second ILD in order to form an expanded region, sealing the air gaps (Liu, para. [0065]).
Liu does not disclose a second dopant species having an atomic mass less than 15.
Wang discloses, however, a second dopant species having an atomic mass less than 15 (specifically, Wang discloses using helium, which has an atomic mass of under 15, as a dopant in an implantation process 240 for a dielectric material 150, see Figure 9 and col. 6, line 43 to col. 7 line 38).
It would have been obvious to one having ordinary skill in the art to incorporate the teachings of Wang into the teachings of Hong and Liu to include the second dopant species for the purpose of modifying the characteristics of the dielectric layer such as etch rate or hardness according to the desired requirements of the dielectric layer (see Wang, col. 6, line 43 to col. 7 line 38).
Regarding claim 15, Liu discloses wherein the first dopant species (germanium, 124 of Liu) comprise germanium (Ge), argon (Ar), xenon (Xe), silicon (Si), arsenic (As), or the like, or a combination thereof (the dopant species comprises germanium).
Regarding claim 16, Wang discloses wherein the second dopant species (helium, implantation process 240) comprise helium (He), hydrogen (H), lithium (Li), beryllium (Be), or a combination thereof (the species comprises helium).
Regarding claim 17, the combination of Hong, Liu, and Wang discloses wherein the first dopant species (germanium, 124, Liu) are atomic species of germanium (Liu) and the second dopant species (helium, 240, Wang) are neutral radical species of helium (helium, see col. 6, line 43 to col. 7 line 38).
Regarding claim 18, the combination of Hong, Liu, and Wang discloses the first dopant species (germanium, 124, Liu) have a first depth (D1) in the second ILD (108 of Liu, D1 being between 0nm and 20nm) and the second dopant species (helium, 240, Wang) have a second depth in the second ILD (150 of Wang), and the second depth is greater than the first depth (the depth of the helium implantation of Wang is ~1200 Angstroms, and the depth of the germanium of Liu is 0 to 20nm, which is 0 to 200 Angstroms, thus the second depth of Wang is greater than the first depth of Liu).
Regarding claim 23, Liu discloses wherein a top surface of the third portion of the first conductive feature (top portion of 118 extending into the third ILD 122) is higher than a top surface of the second ILD (108, top surface of extended portion 130) by 0.5 nm to 2 nm (Figure 23 shows dimension D1, which denotes an implantation depth, but also clearly shows the amount of the conductive feature that extends above the top layer of the second ILD 108, which is between 0 and 20nm, see para. [0068], such as 5nm, it is also clear that the distance the conductive feature extends above the second ILD extended portions 130 is about half the distance D1, thus is around 2.5nm, thus, the claimed range almost overlap).
However, it would have been obvious to one having ordinary skill in the art under routine optimization and experimentation to have the third portion of the first conductive feature higher than the top surface of the second ILD by 0.5nm to 2nm because “[t]he normal desire of scientists or artisans to improve upon what is already generally known provides the motivation to determine where in a disclosed set of percentage ranges is the optimum combination of percentages” See MPEP 2144.05(II).
Specifically, one having ordinary skill in the art would be motivated to optimize the distance therebetween under routine experimentation/optimization because a certain distance n can be altered based on criteria such as, but not limited to, implantation species, depth, angle, etc., which causes the extended feature (130 of Liu) of the second ILD (108), which is for sealing the air gaps to prevent subsequently deposited material from entering the air gaps and potentially causing issues. Additionally, the extension of the conductive feature into the upper third ILD by a sufficient distance and the extended portions extending to a sufficient distance according to one having ordinary skill in the art would anchor the conductive feature due to the increased pressure contact, making the device more durable. For example, one having ordinary skill in the art would be able to determine during experimentation sufficient anchoring of the conductive feature and sealing of the airgaps by varying the distance between the upper surface of the second ILD’s extended portions and the top surface of the conductive feature. Thus, it would have been obvious to one having ordinary skill in the art to determine the optimal distance based on these criteria under routine optimization.
Claims 21-22 and 25 are rejected under 35 U.S.C. 103 as being unpatentable over Su et al. (“Su” US 2022/0310441) and Wu et al. (“Wu” US 2020/0411415).
Regarding claim 21, Su discloses a semiconductor device structure (Figure 15A), comprising:
a first interlayer dielectric (ILD) (34) disposed over a substrate (24, see Figure 15A);
a second ILD (58) disposed over the first ILD (34, see Figure 15A);
an etch stop layer (56) disposed between and in contact with the first and second ILDs (34, 58, see Figure 15A);
a first conductive feature (68/76) being disposed in and separated from the second ILD (58) by a first air gap (74, see Figure 15A);
the first conductive feature (68/76) being further separated from the etch stop layer (56) by a second [air] gap (separated by the gap occupied by the diffusion barrier layer 66, see Figure 15A); and
a second conductive feature (50) being disposed in and separated from the first ILD (34) by a third air gap (52, see Figure 15A), and the second conductive feature (50) having a top in contact with a bottom of the first conductive feature (68/76, the second conductive feature 50 is in physical contact with the first conductive feature 68/76 through metal cap 54, see Figure 15A), wherein the third air gap (52) is physically separated from the first air gap (74) and the second [air] gap (space occupied by diffusion barrier layer 66) by the etch stop layer (56, see Figure 15A).
Su does not disclose that the second gap, the area/layer between the first conductive feature and the surrounding elements, is an air gap. Rather, it is occupied/filled by a diffusion barrier layer (66).
Wu discloses, however, a conductive feature (274) configured to not have a diffusion barrier layer (see para. [0033]), rather to be surrounded by an air gap (284).
Thus, it would have been obvious to incorporate the teachings of Wu into the teachings of Su to eliminate the barrier layer and include an air gap between the conductive feature and surrounding dielectric layers and etch stop layers for the purpose of further minimizing diffusion and reducing resistance (Wu, para. [0033]).
Regarding claim 22, Su discloses wherein the first air gap (74) is different in size than the third air gap (52, see para. [0048] which discloses that the width of the air spacer 52 may be different than the width of the air spacer 74, additionally, the Examiner also considers the gaps being different in size due to their different longitudinal lengths in Figure 15A).
Regarding claim 25, Su further discloses a intermetal dielectric (IMD) layer (78) disposed over the second ILD (58), wherein a portion of the first conductive feature (68/76) is protruded into the IMD layer (78, see Figure 15A).
Response to Arguments
Applicant’s amendments to claim 23 overcome the 112(b) rejection of claim 23. The 112(b) rejection of claim 23 is withdrawn.
Applicant’s arguments with respect to the prior art rejections of claims 1, 9, and 21 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Genevieve G Bullard-Connor whose telephone number is (571)270-0609. The examiner can normally be reached Mon-Fri, 9am-5pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at 571-270-7877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Genevieve G Bullard-Connor/Examiner, Art Unit 2899 /DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899
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