Prosecution Insights
Last updated: April 19, 2026
Application No. 18/100,289

DRAM Transistor Including Pillars Formed Using Low-Temperature Ion Implant

Non-Final OA §102§103
Filed
Jan 23, 2023
Examiner
ANDERSON, WILLIAM H
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Applied Materials, Inc.
OA Round
3 (Non-Final)
86%
Grant Probability
Favorable
3-4
OA Rounds
2y 8m
To Grant
99%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allow Rate
169 granted / 197 resolved
+17.8% vs TC avg
Moderate +15% lift
Without
With
+14.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
49 currently pending
Career history
246
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
46.9%
+6.9% vs TC avg
§102
26.7%
-13.3% vs TC avg
§112
23.3%
-16.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 197 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 3/5/2026 has been entered. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Rejection Note: Italicized claim limitations indicate limitations that are not explicitly disclosed in the primary reference, but disclosed in the secondary reference(s). Claims 1, 3-4, 7-10, 13, and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Kye (US 20170069726 A1) in view of Liu (US 20200279944 A1). Regarding claim 1, Kye discloses a method of forming a device (Fig. 2I), comprising: forming a plurality of bridge layers (13, illustrated as a single layer; [0044]: “each of the first doping region 12 and the second doping region 13 may have a low concentration part and a high concentration part”) in a substrate (11) by directing first ions into the substrate ([0043]: “formed by a doping technique such as implantation and plasma doping”) while the substrate is at a low temperature, wherein the first ions are directed into the substrate ([0043]: “formed in the substrate”) in a series of implants (there must be some type of series to arrive at the cited multi-concentration parts of layers 13); annealing the plurality of bridge layers; forming a shallow trench isolation layer (16) directly atop the plurality of bridge layers (16 is directly atop 13); patterning an opening (21) through the shallow trench isolation layer (fully through) to expose an upper surface of the plurality of bridge layers (13 is directly exposed by opening 21); forming a contact (29) by directing second ions ([0068]: “a doping process”) through the shallow trench isolation layer and into the upper surface of the plurality of bridge layers while the substrate is at the low temperature; and forming a pillar (Fig. 2N: pillar C2) over the contact. Illustrated below is Fig. 2I of Kye. PNG media_image1.png 363 324 media_image1.png Greyscale Kye discloses forming the bridge layers includes a series of implants (cited above) but fails to provide extensive details regarding this method step. Thus, Kye fails to teach “forming a plurality of bridge layers in a substrate by directing first ions into the substrate while the substrate is at a low temperature, wherein the first ions are directed into the substrate in a series of implants; annealing the plurality of bridge layers;” and “forming a contact by directing second ions through the shallow trench isolation layer and into the upper surface of the plurality of bridge layers while the substrate is at the low temperature;”. Liu discloses a method (Fig. 6): forming a plurality of bridge layers (219/213/217) in a substrate (270) by directing first ions into the substrate ([0020]: “formed by implanting dopants” with respect to 217; [0022]: “dopant” with respect to 213; [0031]: “an ion implantation process which introduces first species” with respect to 219) while the substrate is at a low temperature ([0034]: “from about −100° C. to about 500° C”; this range of temperatures is lower than a subsequent anneal temperature, [0047]: “the annealing temperature may be about 850° C. or greater”), wherein the first ions are directed into the substrate in a series of implants ([0020]: “formed by implanting dopants”; [0022]: “dopant”; [0031]: “an ion implantation process”); annealing the plurality of bridge layers ([0038]: “subsequent annealing processes”); [and] forming a contact (221) by directing second ions ([0036]: “second species”) through the shallow trench isolation layer (through opening 232 of layer 230) and into the upper surface of the plurality of bridge layers (221 is within substrate 270 at surface 215) while the substrate is at the low temperature (221 uses techniques similar to 219, and reasonably uses similar method conditions; [0038] “an ion implantation process” for 221; [0038]: “controlled by changing…substrate temperature” for 221; [0034]: “from about −100° C. to about 500° C” for the conditions of 219 similarly applied to 221). Modifying the method of Kye by incorporating the implant conditions of Liu when: forming the plurality of bridge layers; and when forming the contact would arrive at the claimed method configuration. A person of ordinary skill in the art before the effective filing date would have had a reasonable expectation of success doing so because in each situation, a contact is formed by implanting the contact ions into previously implanted bridge layers (Kye: Fig. 2I contact 29 and layers 13; [0043]: “formed by a doping technique such as implantation and plasma doping”. Liu: Fig. 6: contact 221 and layers 219/213/217; [0020]: “structures 292 may be formed by implanting dopants”). Liu provides a teaching to motivate one of ordinary skill in the art before the effective filing date to incorporate the implant conditions in that it would reduce contact resistance of the resultant device ([0036]: “contact resistance between the respective epitaxial source/drain structure 292 and a conductive feature that is subsequently formed can be reduced”). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to have a method with the claimed implant conditions because it would reduce contact resistance in the device, and thereby improve operational characteristics. MPEP 2143 (I)(G). Illustrated below is Fig. 6 of Liu. PNG media_image2.png 499 568 media_image2.png Greyscale Regarding claim 3, Kye in view of Liu discloses the method of claim 1 (Liu: Fig. 6), wherein each implant of the series of implants is performed at a different implant energy ([0035] “depth… can be controlled by changing the implantation energy”; each implant is illustrated with a different depth). Regarding claim 4, Kye in view of Liu discloses the method of claim 1 (Kye: Fig. 7A), further comprising forming a gate (Pg) along the pillar (indirectly along). Regarding claim 7, Kye in view of Liu discloses the method of claim 1 (Liu: Fig. 6), further comprising maintaining the substrate at a temperature less than 0°C during the series of implants and during the formation of the contact (the cited range in the claim 1 rejection includes temperatures less than 0°C; [0034]: “from about −100° C. to about 500° C”). Regarding claim 9, Kye in view of Liu discloses the method of claim 1 (Liu: Fig. 6), further comprising forming the substrate and the plurality of bridge layers from silicon (Liu: [0015]: “the semiconductor substrate 270 may include an elemental semiconductor including silicon”; similarly, Kye: [0041]: “a silicon substrate, a silicon germanium (SiGe) substrate or an SOI (Silicon On Insulator) substrate”). Regarding independent claim 10, Kye discloses a method of forming a dynamic random-access memory device (Fig. 2I: [0138]: “DRAM”), comprising: forming a plurality of bridge layers (13, illustrated as a single layer; [0044]: “each of the first doping region 12 and the second doping region 13 may have a low concentration part and a high concentration part”) in a substrate (11) by directing first ions into the substrate ([0043]: “formed by a doping technique such as implantation and plasma doping”) while the substrate is at a low temperature, wherein the first ions are directed into the substrate ([0043]: “formed in the substrate”) in a series of implants (there must be some type of series to arrive at the cited multi-concentration parts of layers 13) each performed at a different implant energy; annealing the plurality of bridge layers; forming a shallow trench isolation layer (16) directly atop the plurality of bridge layers (16 is directly atop 13); patterning an opening (21) through the shallow trench isolation layer (fully through) to expose an upper surface of the plurality of bridge layers (13 is directly exposed by opening 21); forming a contact (29) by directing second ions ([0068]: “a doping process”) through the shallow trench isolation layer and into the upper surface of the plurality of bridge layers while the substrate is at the low temperature; and forming a pillar (Fig. 2N: pillar C2) over the contact. Kye discloses forming the bridge layers includes a series of implants (cited above) but fails to provide extensive details regarding this method step. Thus, Kye fails to teach “forming a plurality of bridge layers in a substrate by directing first ions into the substrate while the substrate is at a low temperature, wherein the first ions are directed into the substrate in a series of implants each performed at a different implant energy; annealing the plurality of bridge layers;” and “forming a contact by directing second ions through the shallow trench isolation layer and into the upper surface of the plurality of bridge layers while the substrate is at the low temperature;”. Liu discloses a method (Fig. 6): forming a plurality of bridge layers (219/213/217) in a substrate (270) by directing first ions into the substrate ([0020]: “formed by implanting dopants” with respect to 217; [0022]: “dopant” with respect to 213; [0031]: “an ion implantation process which introduces first species” with respect to 219) while the substrate is at a low temperature ([0034]: “from about −100° C. to about 500° C”; this range of temperatures is lower than a subsequent anneal temperature, [0047]: “the annealing temperature may be about 850° C. or greater”), wherein the first ions are directed into the substrate in a series of implants ([0020]: “formed by implanting dopants”; [0022]: “dopant”; [0031]: “an ion implantation process”) each performed at a different implant energy ([0035] “depth… can be controlled by changing the implantation energy”; each implant is illustrated with a different depth); annealing the plurality of bridge layers ([0038]: “subsequent annealing processes”); [and] forming a contact (221) by directing second ions ([0036]: “second species”) through the shallow trench isolation layer (through opening 232 of layer 230) and into the upper surface of the plurality of bridge layers (221 is within substrate 270 at surface 215) while the substrate is at the low temperature (221 uses techniques similar to 219, and reasonably uses similar method conditions; [0038] “an ion implantation process” for 221; [0038]: “controlled by changing…substrate temperature” for 221; [0034]: “from about −100° C. to about 500° C” for the conditions of 219 similarly applied to 221). Modifying the method of Kye by incorporating the implant conditions of Liu when: forming the plurality of bridge layers; and when forming the contact would arrive at the claimed method configuration. A person of ordinary skill in the art before the effective filing date would have had a reasonable expectation of success doing so because in each situation, a contact is formed by implanting the contact ions into previously implanted bridge layers (Kye: Fig. 2I contact 29 and layers 13; [0043]: “formed by a doping technique such as implantation and plasma doping”. Liu: Fig. 6: contact 221 and layers 219/213/217; [0020]: “structures 292 may be formed by implanting dopants”). Liu provides a teaching to motivate one of ordinary skill in the art before the effective filing date to incorporate the implant conditions in that it would reduce contact resistance of the resultant device ([0036]: “contact resistance between the respective epitaxial source/drain structure 292 and a conductive feature that is subsequently formed can be reduced”). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to have a method with the claimed implant conditions because it would reduce contact resistance in the device, and thereby improve operational characteristics. MPEP 2143 (I)(G). Regarding claim 13, Kye in view of Liu discloses the method of claim 10 (Liu: Fig. 6), further comprising maintaining the substrate at a temperature between 0°C and -100°C during the series of implants and during the formation of the contact the cited range in the claim 10 rejection includes temperatures between 0°C and -100°C; [0034]: “from about −100° C. to about 500° C”). Regarding claim 15, Zhu in view of Liu discloses the method of claim 10, further comprising forming the substrate and the plurality of bridge layers from silicon ([0017]: “various semiconductor materials such as single crystal silicon”). Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Kye in view of Liu as applied to claim 1 above, and further in view of Zhu (US 20210391330 A1). Regarding claim 8, Kye in view of Liu discloses the method of claim 1 (Kye: Fig. 2N), but fails to teach the claimed method of forming the pillar “wherein forming the pillar comprises epitaxially growing silicon from the upper surface of the plurality of bridge layers”. Zhu discloses a method forming a pillar (Fig. 8), wherein forming the pillar comprises epitaxially growing silicon ([0048]: “a semiconductor material is epitaxially grown on a top surface of the active pillars…Si…SiGe”) from the upper surface of the bridge layer ([0048]: “the semiconductor material will only be epitaxially grown on the active pillars”). Modifying the method of Kye in view of Liu by forming the pillar using the epitaxial method of Zhu would arrive at the claimed method configuration. A person of ordinary skill in the art before the effective filing date would have had a reasonable expectation of success doing so because in each situation a conductive column is formed upon a silicon surface (Liu: [0015]: “the semiconductor substrate 270 may include an elemental semiconductor including silicon”; similarly, Kye: [0041]: “a silicon substrate, a silicon germanium (SiGe) substrate or an SOI (Silicon On Insulator) substrate”; Zhu: [0048]: “a semiconductor material is epitaxially grown…Si…SiGe”). Zhu provides a teaching to motivate one of ordinary skill in the art before the effective filing date to include the claimed method of forming the pillar in that it would enhance control of the manufacturing process, by forming the pillar material only where it is needed ([0048]: “the semiconductor material will only be epitaxially grown on”). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to have the claimed method of forming the pillar because it would enhance control of the manufacturing process. MPEP 2143 (I)(G). Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Kye in view of Liu as applied to claim 10 above, and further in view of Zhu. Regarding claim 14, Kye in view of Liu discloses the method of claim 10 (Kye: Fig. 2N), but fails to teach the claimed method of forming the pillar “wherein forming the pillar comprises epitaxially growing silicon from the upper surface of the plurality of bridge layers”. Zhu discloses a method forming a pillar (Fig. 8), wherein forming the pillar comprises epitaxially growing silicon ([0048]: “a semiconductor material is epitaxially grown on a top surface of the active pillars…Si…SiGe”) from the upper surface of the bridge layer ([0048]: “the semiconductor material will only be epitaxially grown on the active pillars”). Modifying the method of Kye in view of Liu by forming the pillar using the epitaxial method of Zhu would arrive at the claimed method configuration. A person of ordinary skill in the art before the effective filing date would have had a reasonable expectation of success doing so because in each situation a conductive column is formed upon a silicon surface (Liu: [0015]: “the semiconductor substrate 270 may include an elemental semiconductor including silicon”; similarly, Kye: [0041]: “a silicon substrate, a silicon germanium (SiGe) substrate or an SOI (Silicon On Insulator) substrate”; Zhu: [0048]: “a semiconductor material is epitaxially grown…Si…SiGe”). Zhu provides a teaching to motivate one of ordinary skill in the art before the effective filing date to include the claimed method of forming the pillar in that it would enhance control of the manufacturing process, by forming the pillar material only where it is needed ([0048]: “the semiconductor material will only be epitaxially grown on”). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to have the claimed method of forming the pillar because it would enhance control of the manufacturing process. MPEP 2143 (I)(G). Allowable Subject Matter Claim 21 is allowed. Claims 5, 6, and 12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: The primary reason for the allowable subject matter of claim 5 is the inclusion of the limitation “forming a doped storage node in the pillar, wherein the doped storage node is located above the gate” in combination with the other limitations in the claim. For example, prior art of record fails to teach or be reasonably combined to render obvious the claimed limitations “doped storage node” and the configuration “in the pillar” when also considering the required method step configurations of the “bridge layers” and the “shallow trench isolation layer” in combination with all other limitations in claims 5, 4, and 1. Kye discloses storage nodes but fails to teach these nodes are combinable in the way claimed with the separately disclosed pillar. The primary reason for the allowable subject matter of claim 6 is the inclusion of the limitation “wherein no annealing process is performed between formation of the contact and formation of the pillar” in combination with the other limitations in the claim. For example, prior art of record fails to teach or be reasonably combined to render obvious the claimed limitations “no annealing process” in combination with all other limitations in claims 6 and 1. The primary reason for the allowable subject matter of claim 12 is the inclusion of the limitation “forming a doped storage node in the pillar, wherein the doped storage node is located above a gate” in combination with the other limitations in the claim. For example, prior art of record fails to teach or be reasonably combined to render obvious the claimed limitations “doped storage node” and the configuration “in the pillar” when also considering the required method step configurations of the “bridge layers” and the “shallow trench isolation layer” in combination with all other limitations in claims 5, 4, and 1. Kye discloses storage nodes but fails to teach these nodes are combinable in the way claimed with the separately disclosed pillar. The primary reason for the allowable subject matter of claim 21 is the inclusion of the limitation “wherein no annealing process is performed between formation of the contact and formation of the pillar” in combination with the other limitations in the claim. For example, prior art of record fails to teach or be reasonably combined to render obvious the claimed limitations “no annealing process” in combination with all other limitations in claim 21. Response to Arguments Applicant's arguments filed 3/5/2026 have been fully considered but they are not persuasive. Applicant argues: Applicant argues with respect to amended independent claims 1 and 10 that “the cited references, whether taken alone or in combination, fail to disclose, teach, or suggest at least the following highlighted limitation(s)…”. Remarks at pg. 5. Examiner’s reply: Applicant’s arguments, see pg. 5, filed 3/5/2026, with respect to the rejection(s) of claim(s) 1 and 10 under 35 U.S.C. 102 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Kye. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILLIAM H ANDERSON whose telephone number is (571)272-2534. The examiner can normally be reached Monday-Friday, 8:00-5:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached at (571) 272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /WILLIAM H ANDERSON/ Examiner, Art Unit 2817
Read full office action

Prosecution Timeline

Jan 23, 2023
Application Filed
Aug 21, 2025
Non-Final Rejection — §102, §103
Sep 04, 2025
Applicant Interview (Telephonic)
Sep 04, 2025
Examiner Interview Summary
Nov 06, 2025
Response Filed
Nov 24, 2025
Final Rejection — §102, §103
Mar 05, 2026
Request for Continued Examination
Mar 16, 2026
Response after Non-Final Action
Mar 18, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
86%
Grant Probability
99%
With Interview (+14.9%)
2y 8m
Median Time to Grant
High
PTA Risk
Based on 197 resolved cases by this examiner. Grant probability derived from career allow rate.

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