DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Regarding claims 4 and 15 rejected under 35 U.S.C. 112(b), applicant amendment has been fully considered. The amendment overcomes the 35 U.S.C. 112(b) rejections, hence 35 U.S.C. 112(b) rejection is withdrawn for claims 4 and 15.
Applicant’s arguments with respect to claim 1 has been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. The office now relies on new reference Huangfu (US 20190348479 A1), as necessitated by the applicant’s amendment, which teaches the amended “the metal pattern is electrically insulated from electrical components”.
Applicant’s arguments with respect to claim 12 have been considered but they are not persuasive. Applicant argues that Ge does not teach the limitation “the common voltage supply line includes an opening portion, and the metal pattern is located inside the opening portion”, because Applicant contends that the cited opening 161 of Ge is disposed between adjacent pixels in the display area rather than in the peripheral area, and therefore is not suggestive of modifying the common-voltage supply line in the peripheral area as taught by Obinata. However, the rejection does not rely on Ge alone to teach the entire claimed peripheral-area arrangement. Rather, Obinata is relied upon for teaching the claimed peripheral-area common-voltage supply line, while Ge is relied upon for teaching the additional structural relationship that the common-voltage conductor includes an opening/slit portion and that a metal pattern is disposed within that opening/slit portion while being spaced apart from the surrounding common-voltage conductive portions. Thus, Applicant’s argument is directed to Ge in isolation and does not address the combined teachings of the applied references.
More specifically, Obinata teaches a display panel having a display area DA and a non-display area NDA surrounding the display area, and teaches that each sensor wiring line L is drawn out to the non-display area NDA (see Obinata ¶ [0026]), where common voltage Vcom is applied via the sensor wiring line L. Accordingly, Obinata teaches the claimed common voltage supply line disposed on the substrate in the peripheral area.
Further, Ge etches that a common-voltage arrangement may include Vcom slits/opening portions, and further teaches shield lines disposed in relation to those slit/opening portions. Thus, Ge teaches the claimed structural concept of a metal pattern located inside an opening portion of a common-voltage conductive arrangement, with the metal pattern being spaced apart from the surrounding common-voltage conductive portions that define the opening. Ge also teaches that this arrangement is used to reduce undesirable electric-field effects. Therefore, Ge is properly relied upon for the claimed opening portion/metal pattern inside the opening portion relationship, not merely for the specific location of opening 161 discussed by Applicant.
Even assuming, arguendo, that Applicant is correct that Ge’s opening 161 is shown in a display-area context, that does not undercut the rejection. The rejection relies on the teaching of the structure and functional relationship in Ge, not on a requirement that Ge independently disclose that same relationship in the peripheral area. A person of ordinary skill in the art would have recognized that the same filed-control principle taught by Ge - namely, disposing a metal pattern within an opening/slit of a common voltage conductive structure to reduce undesirable electric-filed influence – would have been applicable to the peripheral common-voltage supply line taught by Obinata. The benefit taught by Ge is electrical in nature and is not limited to only precise display area embodiment emphasized by Applicant.
Applicant further argues that, because the office previously relied on portions of Obinata’s sensor wiring lines L in the non-display area NDA as corresponding to the claimed common-voltage supply line, Ge’s display area disclosure is not suggestive of modifying those non-display-area portions. This argument is like unpersuasive. The obviousness rejection does not require that Ge disclose the identical location as Obinata. It is sufficient that Obinata provides the peripheral/non-display common-voltage line, and Ge provides the teaching to form an opening/slit in a common-voltage conductor and position a metal pattern therein in order to reduce the undesirable electric-filed effects. Applying Ge’s known filed-control arrangement to Obinata’s peripheral common-voltage supply line would have been no more than the predictable use of prior-art elements according to their established functions.
Applicant’s arguments with respect to claim 19 has been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. The office now relies on new reference Kim (US 20190172790 A1) which teaches the amended claim 19 as explained below. Applicant also argues that the Oh’s paragraph 0099 teaches away from the claimed “the metal pattern is an alignment mark that aligns the cover window to a display panel”. Applicant’s teaching-away argument is not persuasive. Paragraph 0099 of Oh discusses eliminating a separate touchscreens panel attachment process by forming touch-related structures directly on the display panel. This disclosure does not discredit or discourage use of cover window or the use of an alignment feature during assembly.
Applicant’s arguments with respect to claim 20 has been considered but are moot because the arguments do not apply to the new ground(s) of rejection presented in this Office action, necessitated by the applicant's amendment, as explained in the rejection below.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Oh (US 20180061899 A1) in view of Huangfu (US 20190348479 A1).
Re: Independent Claim 1 (Currently Amended), Oh discloses a display apparatus comprising:
a display area in which a display element is arranged (Oh, Fig 1/Fig 2, active area AA in which light emitting element 120 are arranged)
a dam part disposed on a substrate in the peripheral area to surround the display area (Oh, Fig. 1, dams 160 formed on substrate surrounding active area AA);
an encapsulation layer disposed on the substrate in the display area and the peripheral area to encapsulate the display element (Oh, Fig 2 and Fig 4, encapsulation unit 140 disposed on the sub-pixels in display/active area AA. 140 is also disposed over dam 160 which is in peripheral area. surrounding the display area);
an organic insulating layer (Oh, Fig 4, ¶ [0093], organic insulating layer is stack of 166+196+168) disposed on the encapsulation layer and extending from the display area to the peripheral area to cover the dam part (Oh, ¶ [0094], layer 166+196+168 is disposed on encapsulation layer 140, and extends across the region above the dams into the boundary/peripheral region, evidencing a continuous layer from active-area side over the dams into the boundary/peripheral side);
and a metal pattern disposed on the organic insulating layer and overlapping the dam part in a plan view (Oh, Fig 4, ¶ [0090], metal patterns i.e., pad cover electrode 174/184 + routing lines 156/186; and 156/186 are formed from a conductive metal layer on the compensation film 196),
While Oh doesn’t explicitly disclose:
and a peripheral area adjacent to the display area, however, Oh teaches in Fig.1, pad area PA + dam area 160 together. It would be obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to call this area altogether peripheral area in order to include pixels and its driving circuits in display area and the dams surrounding the active area and to form a boundary for the at least one organic encapsulation layer (Oh, [0031]).
Oh is further silent regarding
wherein the metal pattern is electrically insulated from electrical components.
However, Huangfu teaches wherein the metal pattern is electrically insulated from electrical components (Huangfu, in Fig. 4A and ¶ [0060], teaches a substrate/display device including work area 103 and a non-work area 101 outside the work area, wherein the non-work area includes a peripheral circuit region 102 adjacent the work area and a peripheral circuit 13 disposed in the peripheral circuit region 102, and further teaches a common electrode lead 4 disposed in the non-work area, where the orthographic projection of common electrode lead 4 at least partially overlaps the orthographic projection of peripheral circuit region 102, and common electrode lead 4 is insulated from peripheral circuit 13. Huangfu further teaches an interlayer insulating layer disposed between peripheral circuit 13 and common electrode lead 4, covering peripheral circuit 13 so as to electrically insulate peripheral circuit 13 from common electrode lead 4. Thus, Huangfu teaches a metal pattern that overlaps a peripheral circuit region in plan view while being electrically insulated from electrical components, namely peripheral circuit 13). Oh and Huangfu disclose display devices, hence analogous art. It would be obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to provide Oh’s metal pattern in the electrically insulated arrangement taught by Huangfu in order to allow the metal pattern to overlap a peripheral region circuit area while remaining insulated from peripheral electrical components and thereby reduce peripheral region width/bezel (Huangfu, ¶ [0060]).
Re: Claim 2 (Original), Oh discloses all the limitations of claim 1 on which this claim depends.
Oh further discloses,
wherein the dam part includes: a first dam (Oh, Fig 3/ Fig 4, dam 162);
and a second dam spaced apart from the first dam in a direction of the display area (Oh, Fig 3/ Fig 4, dam 164 spaced apart from 162 and positioned near AA), and the organic insulating layer fills at least a portion of a valley area between the first dam and the second dam (Oh, Fig 4, 196 covers the dams 160 and is shown as a continuous coating across dam/boundary region. A continuous planarization film that covers both raised dam features will necessarily occupy and fill at least a portion of the recessed region (valley) between dams 162 and 164).
Re: Claim 3 (Original), Oh discloses all the limitations of claim 2 on which this claim depends.
Oh further discloses,
wherein the metal pattern overlaps the first dam or the valley area between the first dam and the second dam in a plan view (Oh, Fig. 4, routing metal lines 156 overlaps first dam 162 in plan view).
Re: Claim 18 (Original), Oh discloses all the limitations of claim 1 on which this claim depends.
Oh further discloses,
further comprising: a first touch conductive layer disposed on the encapsulation layer (Oh, Fig 3/Fig.4, touch driving lines 152 disposed on the encapsulation layer 140);
and a second touch conductive layer disposed on the first touch conductive layer (Oh, Fig. 3/Fig.4, ¶ [0080] touch sensing lines 154 disposed on 152; since 154 and 152 are disposed on the touch buffer film, they are patterned in stacked fashion),
wherein the organic insulating layer is located between the first touch conductive layer and the second touch conductive layer (Oh, Fig 4, organic insulating layer 168 is in between 154 and 152).
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Oh (US 20180061899 A1) in view of Huangfu (US 20190348479 A1) further in view of Gwon (US 20200411598 A1).
Re: Claim 4 (Currently Amended), Oh and Huangfu disclose all the limitations of claim 2 on which this claim depends.
Oh further teaches,
the encapsulation layer includes at least one inorganic encapsulation layer and at least one organic encapsulation layer (Oh, Fig. 4, encapsulation layer 140 includes inorganic encapsulation layer 142/146 and organic encapsulation layer 144),
the at least one organic encapsulation layer extends from the display area to the second dam (Oh, Fig. 4, 144 extends from over the display area to the inner/display-side dam 164), and the metal pattern overlaps the at least one organic encapsulation layer in a plan view (Oh, Fig. 4, metal routing lines 156 overlap 144 in plan view).
Oh and Huangfu are silent regarding,
wherein the dam part includes at least one subdam spaced apart from the second dam in a direction of the display area.
However, Gwon teaches wherein the dam part includes at least one subdam spaced apart from the second dam in a direction of the display area (Gwon, Fig 4, ¶ [0056], teaches providing at least one sub-dam 110b (part of the dam 1101) is spaced apart from the second dam 1102 direction towards display area) to improve ink/encapsulant containment and step coverage in the transition region).
Oh, Huangfu and Gwon disclose display device, hence analogous art. It would be obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to implement Gwon's subdam structure in the display structure of Oh in view of and Huangfu in order to prevent the organic encapsulation layer from spreading to the non-active area (Gwon, ¶ [0056]).
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Oh (US 20180061899 A1) in view of Huangfu (US 20190348479 A1) further in view of Du (US 20210202583 A1).
Re: Claim 5 (Original), Oh and Huangfu disclose all the limitations of claim 2 on which this claim depends.
Oh and Huangfu are silent regarding,
wherein a thickness of the organic insulating layer in the display area is about 0.7 µm or more (Du, ¶ [0042] teaches display region 10 planarization (which is organic as taught by Du in ¶ [0102]) thickness 0-1.5 µm and identifies the film as organic, thus teaching organic insulating layer in the display area is > 0.7 µm), and a thickness of the organic insulating layer in the valley area is about 1.4 µm or more (Oh teaches the thickness in valley>over dams d2>d1. Du's non-pixel region thickness 3-3.5 µm (Du, ¶ [0043]) comfortably exceeds 1.4 µm, satisfying the limitation).
Oh, Huangfu and Du disclose display device, hence analogous art. It would be obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to implement, in the valley between first and second dams of Oh in view of Huangfu, an organic insulating/planarization layer with display region thickness >0.7 µm and valley region thickness >1.4 µm, by selecting thickness within the explicit ranges taught by Du for organic planarization layers in display vs. non-display areas in order to effectively improve the flatness of the planarization layer (Du, ¶[0101]).
Claims 6-7 are rejected under 35 U.S.C. 103 as being unpatentable over Oh (US 20180061899 A1) in view of Huangfu (US 20190348479 A1) further in view of in view of Kim (US 20200136087 A1).
Re: Claim 6 (Original), Oh and Huangfu disclose all the limitations of claim 1 on which this claim depends.
Oh and Huangfu are silent regarding,
at least one inorganic insulating layer disposed on the substrate in the display area and the peripheral area;
and an outer dam disposed on the substrate in the peripheral area and covering an end of the at least one inorganic insulating layer.
However, Kim teaches at least one inorganic insulating layer (Kim, Fig 3, ¶ [0059], Kim teaches interlayer inorganic insulating layer 115) disposed on the substrate in the display area and the peripheral area (115 is formed on the substrate and extending across both the display area and the peripheral area);
and an outer dam disposed on the substrate in the peripheral area and covering an end of the at least one inorganic insulating layer (Kim, Fig 3, outer dam 190 positioned over the terminal region and the peripheral dielectric stack (e.g., the end/edge of the layer 115, thereby covering an end of the inorganic insulating layer).
Oh, Huangfu and Kim disclose display device, hence analogous art. It would be obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to include Kim's outer dam structure in the display structure of Oh in order to reduce the spread of a crack that may occur in the substrate to the display area (Kim, ¶ [0112]).
Re: Claim 7 (Original), Oh, Huangfu and Kim disclose all the limitations of claim 6 on which this claim depends.
Kim further discloses,
wherein the at least one inorganic insulating layer includes a hole or a groove overlapping the outer dam in a plan view (Kim, Fig. 3, ¶ [0106], teaches Slit SL formed in insulating layer 115. The outer dam 190 is disposed in the peripheral area, and the slit SL is directly under dam 190, so their x-y projections overlap in plan view).
Claims 8, 16 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Oh (US 20180061899 A1) in view of Huangfu (US 20190348479 A1) further in view of Obinata (US 20190302557 A1).
Re: Claim 8 (Original), Oh and Huangfu disclose all the limitations of claim 1 on which this claim depends.
Oh and Huangfu are silent regarding,
further comprising: a common voltage supply line disposed on the substrate in the peripheral area, wherein the metal pattern and the common voltage supply line are spaced apart from each other in a plan view.
However, Obinata teaches
further comprising: a common voltage supply line disposed on the substrate in the peripheral area (Obinata teaches, in ¶ [0035], the sensor electrode Rx functions as the common electrode and that the common voltage (Vcom) is applied via the sensor wiring line L (i.e., a common voltage supply line). Also, in ¶ [0026], Obinata teaches those wiring lines are drawn out to the non-display (peripheral) area and connected to the driver on the substrate),
wherein the metal pattern and the common voltage supply line are spaced apart from each other in a plan view (Oh provides the metal pattern in the periphery (routing lines 156/186 on 196 above/near dams). Obinata teaches, in ¶ [0032], dummy wiring D21 is spaced from sensor wiring line L2, evidencing standard layout practice to keep distinct metal patterns laterally separated).
Oh, Huangfu and Obinata disclose display device, hence analogous art. It would be obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention integrating Oh's in-cell touch OLED would have been motivated to provide Vcom distribution using Obinata's sensor wiring line L approach routed to the frame/NDA to supply common voltage and to maintain lateral spacing between the common voltage line and unrelated metal patterns (such as Oh's pad-cover electrodes 174/184) in order inhibit capacitor (¶ [0085]).
Re: Claim 16 (Currently Amended), Oh, Huangfu and Obinata disclose all the limitations of claim 8 on which this claim depends.
Oh and Obinata further teach,
wherein the dam part includes: a first dam (Oh, Fig 3, first dam 162); and a second dam (second dam 164) spaced apart from the first dam in a direction of the display device (Oh, Fig 3/ Fig 4, dam 164 spaced apart from 162 and positioned near AA), and the first dam covers an outer boundary of the common voltage supply line (Given Oh already places the first dam 162 as the outer/peripheral dam and Obinata places the common voltage line L in the same peripheral belt, it would have been obvious for a person of ordinary skill in the art to locate the common voltage line just inboard of the first dam and to extend /position the first dam so that it covers the line's outer edge/boundary).
It would be obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to arrange the first dam of Oh to cover the outer boundary of the peripheral common voltage line in order to inhibit capacitor by overlapping the opening with the metallic wiring Obinata (¶ [0085]).
Re: Claim 20 (Currently Amended), Oh, Huangfu and Obinata disclose all the limitations of claim 8 on which this claim depends.
Huangfu further teaches,
a distance from the metal pattern to a nearest edge of the substrate is greater than a distance from the common voltage supply line to the nearest edge of the substrate (Huangfu teaches, in Fig. 4A and ¶ [0058], a substrate working region 103, a non-working region 101 outside the working region, and an outer profile edge 12 of the base substrate, where the non-working region includes a peripheral circuit region 102 neat the working region and a non-circuit region away from the working region. Huangfu further, in ¶ [0060], teaches a common electrode lead 4 in the non-working region and teaches that the common electrode lead 4 may be arranged along a portion of the outer profile edge 12 of the base substrate. Hunagfu also teaches that this arrangement narrows the bezel, and reduces resistance, power consumption and generated Joule heat. Accordingly, it would be obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to arrange the common voltage supply line of the Oh/Obinata display apparatus on the outer-edge side of the peripheral region as taught by BOE, while Oh’s metal pattern remains in the more inward dam-overlap region, in order to reduce peripheral-region width/bezel and reduce resistance and hear of the common-voltage line. In such a modification arrangement, because the common voltage supply line is disposed nearer the outer substrate edge and the metal pattern remains over the more inward dam region, the distance from the metal pattern to the nearest edge of the substrate would be greater than the distance from the common voltage supply line to the nearest edge of the substrate. Determining the exact relative spacing between those peripheral structures would have been no more than routine optimization of a recognized peripheral-layout variable once the common-voltage line is positioned along the outer-edge side of the peripheral region).
Claims 9-11 are rejected under 35 U.S.C. 103 as being unpatentable over Oh (US 20180061899 A1) in view of Huangfu (US 20190348479 A1) further in view of in view of Obinata (US 20190302557 A1) and further in view of Lee (US 20140097420 A1).
Re: Claim 9 (Original), Oh, Huangfu and Obinata disclose all the limitations of claim 8 on which this claim depends.
Oh, Huangfu and Obinata are silent regarding,
wherein the common voltage supply line includes a plurality of conductive lines disposed on different layers.
However, Lee teaches wherein the common voltage supply line includes a plurality of conductive lines disposed on different layers (Lee, Fig 4, ¶ [0057], common voltage line 400 includes gate common voltage line 410 and data common voltage line 420).
Oh, Huangfu, Obinata and Lee disclose display device, hence analogous art. It would be obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to adapt Lee's multilayer common voltage architecture to Oh's peripheral common voltage line in view of Huangfu and Obinata in order to reduce IR drop, thus improving picture quality (Lee, ¶ [0065]).
Re: Claim 10 (Original), Oh, Huangfu, Obinata and Lee disclose all the limitations of claim 9 on which this claim depends.
Lee further teaches,
further comprising: a pixel circuit arranged in the display area and including: a thin film transistor; and a storage capacitor (Lee, Fig. 1-3, ¶ [0045], in display region, pixel PX includes a switching TFT Qs, a driving TFT Qd, and a storage capacitor Cst),
wherein at least one of the plurality of conductive lines and a source electrode or a drain electrode of the thin film transistor include a same material (In ¶ [0054], Lee teaches data line 171 for transmitting data signals, a source electrode 176, which may be a part of the data line 171, i.e., the source electrode is formed in the same conductive stack/material as the data line. Lee also states in ¶ [0069], that data common voltage line 420 is "formed on the same layer as the data line 171". Since source electrode 176 is part of the data line 171and 420 is on the data line layer, a person of ordinary skill in the art would understand that data common voltage line 420 and the TFT S/D share the same conductor/material, satisfying "include a same material").
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Re: Claim 11 (Original), Oh, Huangfu, Obinata and Lee disclose all the limitations of claim 9 on which this claim depends.
Lee further teaches,
further comprising: a pixel circuit arranged in the display area and including: a thin film transistor; and a storage capacitor (Lee, Fig. 1-3, ¶ [0045], in display region, pixel PX includes a switching TFT Qs, a driving TFT Qd, and a storage capacitor Cst);
and a connection electrode electrically connecting a source electrode or a drain electrode of the thin film transistor to a pixel electrode of the display element (Lee, pixel electrode 191 is connected to the driving TFT Qd (with drain electrode 177), which necessarily includes a conductive connection member between the TFT's drain electrode 177 and the pixel electrode 191. This conductive member is a "connection electrode" CE, shown in annotated Fig. Lee Fig 3 (annotated)),
wherein at least one of the plurality of conductive lines and the connection electrode include a same material (Lee teaches, in ¶ [0069], that data common voltage line 420 on the same layer as the data line 171 (and the S/D metals), while also stating source 176 is part of data line 171 and drain 177 is formed on that same S/D layer; the conductive member that connects the drain to the pixel electrode is on that data-metal layer, i.e., the same material stack used for that data common voltage line 420. Thus, at least one of the common-voltage conductive lines (the data-layer line 420) and the connection electrode share the same material).
Claims 12-15 are rejected under 35 U.S.C. 103 as being unpatentable over Oh (US 20180061899 A1) in view of Obinata (US 20190302557 A1) further in view of Ge (US 20120313881 A1).
Re: Independent Claim 12 (Currently Amended), Oh discloses a display apparatus comprising:
a display area in which a display element is arranged (Oh, Fig 1/Fig 2, active area AA in which light emitting element 120 are arranged)
a dam part disposed on a substrate in the peripheral area to surround the display area (Oh, Fig. 1, dams 160 formed on substrate surrounding active area AA);
an encapsulation layer disposed on the substrate in the display area and the peripheral area to encapsulate the display element (Oh, Fig 2 and Fig 4, encapsulation unit 140 disposed on the sub-pixels in display/active area AA. 140 is also disposed over dam 160 which is in peripheral area. surrounding the display area);
an organic insulating layer (Oh, Fig 4, ¶ [0093], organic insulating layer is stack of 166+196+168) disposed on the encapsulation layer and extending from the display area to the peripheral area to cover the dam part (Oh, ¶ [0094], layer 166+196+168 is disposed on encapsulation layer 140, and extends across the region above the dams into the boundary/peripheral region, evidencing a continuous layer from active-area side over the dams into the boundary/peripheral side);
and a metal pattern disposed on the organic insulating layer and overlapping the dam part in a plan view (Oh, Fig 4, ¶ [0090], metal patterns i.e., pad cover electrode 174/184 + routing lines 156/186; and 156/186 are formed from a conductive metal layer on the compensation film 196),
While Oh doesn’t explicitly disclose:
and a peripheral area adjacent to the display area, however, Oh teaches in Fig.1, pad area PA + dam area 160 together. It would be obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to call this area altogether peripheral area in order to include pixels and its driving circuits in display area and the dams surrounding the active area and to form a boundary for the at least one organic encapsulation layer (Oh, [0031]).
Oh is further silent regarding,
a common voltage supply line disposed on the substrate in the peripheral area, wherein the metal pattern and the common voltage supply line are spaced apart from each other in a plan view.
However, Obinata teaches
a common voltage supply line disposed on the substrate in the peripheral area (Obinata teaches, in ¶ [0035], the sensor electrode Rx functions as the common electrode and that the common voltage (Vcom) is applied via the sensor wiring line L (i.e., a common voltage supply line). Also, in ¶ [0026], Obinata teaches those wiring lines are drawn out to the non-display (peripheral) area and connected to the driver on the substrate),
wherein the metal pattern and the common voltage supply line are spaced apart from each other in a plan view (Oh provides the metal pattern in the periphery (routing lines 156/186 on 196 above/near dams). Obinata teaches, in ¶ [0032], dummy wiring D21 is spaced from sensor wiring line L2, evidencing standard layout practice to keep distinct metal patterns laterally separated).
Oh and Obinata disclose display device, hence analogous art. It would be obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention integrating Oh's in-cell touch OLED would have been motivated to provide Vcom distribution using Obinata's sensor wiring line L approach routed to the frame/NDA to supply common voltage and to maintain lateral spacing between the common voltage line and unrelated metal patterns (such as Oh's pad-cover electrodes 174/184) in order inhibit capacitor (¶ [0085]).
Both Oh and Obinata are silent regarding,
the common voltage supply line includes an opening portion, and the metal pattern is located inside the opening portion.
However, Ge teaches the common voltage supply line includes an opening portion, and the metal pattern is located inside the opening portion (Ge, Fig 1D, ¶ [0054], Ge teaches Vcom 1003 with a Vcom opening 161, and shield lines 1001 are disposed within/over the Vcom slits 1003, i.e., metal patterns located in the opening of common voltage supply line).
Oh, Obinata and Ge disclose display device, hence analogous art. It would be obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Obinata's peripheral common voltage supply line L to introduce and opening (slit) in the Vcom network and place a metal pattern (e.g., shield line) inside that opening as taught by Ge in order to help reduce or eliminate an electric field from affecting a pixel material (Ge, abstract).
Re: Claim 13 (Original), Oh, Obinata and Ge disclose all the limitations of claim 12 on which this claim depends.
Ge further discloses,
wherein the opening portion includes a plurality of opening portions (Ge, ¶ [0054], Ge teaches multiple Vcom slits 1003).
Re: Claim 14 (Original), Oh, Obinata and Ge disclose all the limitations of claim 12 on which this claim depends.
Ge further discloses,
wherein the opening portion contacts an outer boundary of the common voltage supply line (Ge, ¶ [0055], Ge teaches Vcom openings 1003 in plan view and makes clear that Vcom can have an open slit between two adjacent edges of common electrode Vcom, i.e., openings contact the outer boundary of the common voltage supply line).
Re: Claim 15 (Currently Amended), Oh, Obinata and Ge disclose all the limitations of claim 12 on which this claim depends.
Obinata further discloses,
wherein a width of the opening portion is greater than a width of the metal pattern along a same axis (Obinata, Fig 7-9, ¶ [0076], Obinata defines the opening OP and states the opening OP has a width WOP; the metallic wiring line ML2 has a width WM2 in a position overlapping the opening OP, and the width WM2 is less than the width WOP along the same axis (X direction)).
Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Oh (US 20180061899 A1) in view of Huangfu (US 20190348479 A1) further in view of Obinata (US 20190302557 A1) and further in view of Ge (US 20120313881 A1).
Re: Claim 17 (Original), Oh, Huangfu and Obinata disclose all the limitations of claim 16 on which this claim depends.
Oh, Huangfu and Obinata are silent regarding,
wherein the common voltage supply line includes an opening portion overlapping a valley area between the first dam and the second dam in a plan view, and the metal pattern is located inside the opening portion.
However, Oh and Ge together teach wherein the common voltage supply line includes an opening portion (Ge, Fig 10, ¶ [0054], Ge teaches Vcom 1003 with a Vcom opening 161, and shield lines 1001 are disposed within/over the Vcom slits 1003, i.e., metal patterns located in the opening of common voltage supply line) overlapping a valley area between the first dam and the second dam in a plan view (Oh, Figs 5A-5C/6, Oh teaches first dam 162 and second dam 164 and shows conductors traverse that inter-dam space, with organic insulating layer 196 covering dams 160 to stablize the crossing. A person of ordinary skill in the art placing an opening in the Vcom supply path as taught by Ge would position it where the line crosses the dam region, i.e., so the opening overlaps the plan-view valley between dams 162 and 164), and the metal pattern is located inside the opening portion (Ge, Fig 10, ¶ [0054], Ge teaches Vcom 1003 with a Vcom opening 161, and shield lines 1001 are disposed within/over the Vcom slits 1003, i.e., metal patterns located in the opening of common voltage supply line).
It would be obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to configure the Vcom supply to include opening as taught by Ge that overlaps the valley between the first dam and second dam of Oh and to locate a metal pattern inside the opening in order to help reduce or eliminate an electric field from affecting a pixel material (Ge, Abstract).
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Oh (US 20180061899 A1) in view of Huangfu (US 20190348479 A1) and further in view of Kim (US 20190172790 A1).
Re: Claim 19 (Currently Amended), Oh and Huangfu disclose all the limitations of claim 1 on which this claim depends.
Oh and Huangfu are silent regarding,
a cover window disposed facing the substrate, wherein: the display element, the dam part, the encapsulation layer, the organic insulating layer and the metal pattern are disposed between the substrate and the cover window, the metal pattern is an alignment mark that aligns the cover window to a display panel, and the display panel includes the display element, the dam part, the encapsulation layer, the organic insulating layer, and the metal pattern.
However, Kim teaches
a cover window disposed facing the substrate, wherein: the display element, the dam part, the encapsulation layer, the organic insulating layer and the metal pattern are disposed between the substrate and the cover window, the metal pattern is an alignment mark that aligns the cover window to a display panel, and the display panel includes the display element, the dam part, the encapsulation layer, the organic insulating layer, and the metal pattern (Kim teaches, in Figs. 9-10 and ¶¶ [0103]- [0104], a display device including a display panel DP, and a window WD on the touch sensor TS. Kim further teaches, in Figs. 5-6 and ¶ [0070], that the display panel DP includes a substrate SUB with a display region DA and a non-display region NDA, and that alignment marks AM are on the substrate in the non-display region. Thus, Kim teaches a cover window disposed facing the substrate, with the display panel structures beneath the window and therefore disposed between the substrate and the cover window. Kim further teaches, in ¶ [0042] that the alignment marks AM are used as identification marks for alignment in a process of combining the display panel DP and the window WD, and that the alignment marks may include a plurality of metal patterns (see ¶ [0089]). Therefore, Kim teaches that a metal pattern serves as an alignment mark for aligning the cover window to the display panel.
Oh, Huangfu and Kim disclose display devices, hence analogous art. It would be obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Oh’s display apparatus to further include the cover-window / alignment-mark arrangement taught by Kim, thus, in the resulting combination, Oh supplies the claimed display element, dam part, encapsulation layer, organic insulating layer, and metal pattern on the substrate, and Kim supplies the cover window disposed facing the substrate and the teaching that the metal pattern is an alignment mark used to align the cover window to the display panel in order to facilitate accurate alignment when combining the cover window with the display panel and thereby reduce dead space/bezel area.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/BIPANA ADHIKARI DAWADI/Examiner, Art Unit 2898
/JESSICA S MANNO/SPE, Art Unit 2898
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