DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 01 March 2023, 06 April 2023, 04 March 2024, 17 April 2024, and 06 August 2025 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Claim Objections
Claim 44 is objected to because of the following informalities:
Claim 44: “one or more metrology measurements” in lines 1-2 should be “the one or more metrology measurements” as this limitation has been mentioned previously in claim 43.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 14, 44, 46, 48, and 50 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 14, “the intermittent illumination” in lines 2-3 lacks proper antecedent basis.
Regarding claim 44, “one or more metrology measurements” in lines 1-2 is unclear as this limitation has been mentioned previously in claim 43, on which claim 44 is dependent. Is this limitation referring to the same metrology measurements mentioned previously or different metrology measurements? In light of the specification, the Examiner is interpreting this limitation to be referring to the same metrology measurements mentioned previously. Additionally, “an interface” in line 3 is unclear as this limitation has been mentioned previously in claim 43. Is this limitation referring to the same interface mentioned previously or a different interface? In light of the specification, the Examiner is interpreting this limitation to be referring to the same interface mentioned previously.
Regarding claim 46, “the one or more metrology measurements in lines 1-2 is unclear as this limitation has been mentioned previously in claim 43, on which claim 46 is dependent. Is this limitation referring to the same metrology measurements mentioned previously or different metrology measurements? In light of the specification, the Examiner is interpreting this limitation to be referring to the same metrology measurements mentioned previously. Additionally, “an interface” in line 3 is unclear as this limitation has been mentioned previously in claim 43. Is this limitation referring to the same interface mentioned previously or a different interface? In light of the specification, the Examiner is interpreting this limitation to be referring to the same interface mentioned previously.
Regarding claim 48, “the at least one of the high-k layer or the interfacial dipole engineering layer” lacks proper antecedent basis as this limitation has not been mentioned previously.
Regarding claim 50, “the one or more metrology measurements” in lines 1-2 and line 8 are unclear as these limitations have been mentioned previously in claim 43, on which claim 50 is dependent. Are these limitations referring to the same metrology measurements mentioned previously or different metrology measurements? In light of the specification, the Examiner is interpreting these limitations to be referring to the same metrology measurements mentioned previously.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-4, 10, 15, 21, 23-27, 33, 38, 43-45, and 49 are rejected under 35 U.S.C. 102(a)(1) and (a)(2) as being anticipated by Adler (USPGPub 20220364850 A1).
Regarding claim 1, Adler teaches a metrology system, comprising: an illumination source (4100) to generate an illumination beam (4110) (see figure 20, laser source 4100 generating laser beam 4110; and ¶237, a laser source 4100 (e.g., a pulsed laser source such a Ti:sapphire laser) may be 4100 used to generate a laser beam 4110); an illumination sub-system including one or more optical elements (4130) configured to direct the illumination beam (4110) to a sample (4302) (see figure 20, focusing optics 4130 and sample 4302; and ¶237, focusing optics 4130 may focus the laser beam 4110 on the sample 4302), wherein the sample (4302) includes an inversion-symmetric substrate and one or more films disposed on the inversion-symmetric substrate (¶223, Second-harmonic generation generally involves a non-centrosymmetric material, an interface or a defect: some property of the sample that breaks inversion symmetry of the sample (e.g., at a point or in a region where interaction with incident light occurs). In a material such as silicon, which is centrosymmetric, second harmonic generation occurs at interfaces and defects where the inversion symmetry is broken; and ¶124, The systems and methods described herein can be configured to determine threshold energy for a variety of interfaces such as for example, between two different semiconductors, between a semiconductor and a metal, between a semiconductor and a dielectric, etc.); a filter (4230) configured to block a wavelength of the illumination beam (4110) and pass a wavelength associated with a second harmonic of the illumination beam (4400) (see figure 20, filter 4230; and ¶239, the spectral filter 4230 may be used to block, filter out or eliminate light having wavelengths different from a second harmonic of the beam 4400); a detector (4201/4210) to capture second harmonic generation (SHG) light associated with the second harmonic of the illumination beam (4400) (see figure 20, detectors 4201 and 4210; and ¶239, the detector 4201, 4210 may comprise a photomultiplier tube (e.g., for measuring intensity of the SHG light)); and a controller communicatively coupled to the detector (4201/4210), the controller including one or more processors configured to execute program instructions causing the one or more processors to: receive metrology data from the detector associated with the SHG light from an interface between the inversion-symmetric substrate and the one or more films (¶18, a system for characterizing a sample using second harmonic generation comprises at least one optical source configured to direct a light beam onto a sample to produce second harmonic generation (SHG) signals, an optical detection system comprising at least one optical detector configured to receive the SHG signals emitted from said sample and generate detected SHG signals, one or more hardware processors (e.g., hardware processors, processing electronics, microprocessors, and the like) in communication with the optical detection system, the one or more hardware processors configured to receive at least one detected SHG signal and determine a geometric feature of the sample or a variation in a geometric feature of the sample based on the at least one detected SHG signal; and ¶249, the SHG-CD system may comprise a non-transitory memory configured to store data and machine executable instructions and a processor (e.g., a hardware processor, processing electronics, a microprocessor, and the like) configured to execute the machine-readable instructions to perform one or more processes associated with monitoring a sample that includes one or more device); and generate one or more metrology measurements associated with the one or more films based on the metrology data (¶258, the separate SHG signals may be used in the analysis of the device under test (e.g., to refine the dimensional measurements)).
Regarding claim 2, Adler teaches the metrology system of claim 1, wherein the metrology measurement comprises: at least one of layer thickness, layer composition, presence of defects, charge/trap states, stress/strain, charge mobility, or surface/interface roughness associated with at least one of the one or more films (¶130, the systems and methods described herein can be used to detect defects or contaminants in the sample as discussed above; and see remainder of ¶130 for further details).
Regarding claim 3, Adler teaches the metrology system of claim 1, wherein the interface between the inversion-symmetric substrate and the one or more films is associated with a gate region of a field effect transistor (FET) (¶91, The example FinFET structure may include some combination of a silicon substrate 4540, a vertical “Fin” of silicon 4510, an oxide layer covering the Fin 4520 and a conductive gate contact 4530).
Regarding claim 4, Adler teaches the metrology system of claim 3, wherein the FET comprises: at least one of a metal-oxide-semiconductor FET (MOSFET), a planar FET, a FinFET, a gate-all-around (GAA) nanosheet FET, a fork-sheet FET, a complimentary GAA FET, a ferroelectric FET, or a 2D FET (¶91, The example FinFET structure may include some combination of a silicon substrate 4540, a vertical “Fin” of silicon 4510, an oxide layer covering the Fin 4520 and a conductive gate contact 4530).
Regarding claim 10, Adler teaches the metrology system of claim 1, wherein the one or more processors are further configured to execute program instructions causing the one or more processors to: control one or more process tools for fabricating at least a portion of the sample (4302) based on the one or more metrology measurements (¶249, the SHG-CD system may comprise a non-transitory memory configured to store data and machine executable instructions and a processor (e.g., a hardware processor, processing electronics, a microprocessor, and the like) configured to execute the machine-readable instructions to perform one or more processes associated with monitoring a sample that includes one or more device; and ¶13, These results (e.g., determined features) may also be used to alert manufacturing personnel of process variations, communicate with in-line fabrication tools and/or provide feedback or feed forward for adjustments to the semiconductor device fabrication process as described previously).
Regarding claim 15, Adler teaches the metrology system of claim 1, wherein a wavelength of the illumination beam (4110) is tunable (¶258, a light source may comprise a tunable wavelength laser source), wherein the metrology data from the detector (4201/4210) associated with the second harmonic of the illumination beam (4400) comprises: wavelength-resolved measurements of the SHG light in response to illuminating the sample (4302) with the illumination beam (4110) having two or more wavelengths, wherein at least one of the one or more metrology measurements are generated based on the wavelength-resolved measurements of the SHG light (¶17, different detectors or sensors with different spectral responses or filters having different wavelength spectrums may be used to sample different wavelengths and possibly obtain different intensity values for different wavelengths. Having information on the relative strengths of different wavelengths may assist in determining changes in the SHG output as well as the changes in the device or sample; and see ¶258 for further details).
Regarding claim 21, Adler teaches the metrology system of claim 1, further comprising: a first polarizer (4120) to control a polarization of the illumination beam (4110) incident on the sample (4302) (see figure 20, polarizer 4120 (i.e. first polarizer); and ¶237, a polarizer 4120 may select the polarization of the laser beam 4110); and a second polarizer (4220) to control a polarization of light incident on the detector (4201/4210) (figure 20, polarizer 4220 (i.e. second polarizer); and ¶239, the polarizer 4220 may be used to select a polarization of the detected light).
Regarding claim 23, Adler teaches the metrology system of claim 1, wherein the detector (4201/4210) comprises: at least one of a photo-multiplier tube, a charge-coupled device, or a photodiode (¶239, the detector 4201, 4210 may comprise a photomultiplier tube (e.g., for measuring intensity of the SHG light)).
Regarding claim 24, Adler teaches a metrology system, comprising: a controller including one or more processors configured to execute program instructions (¶18, a system for characterizing a sample using second harmonic generation comprises at least one optical source configured to direct a light beam onto a sample to produce second harmonic generation (SHG) signals, an optical detection system comprising at least one optical detector configured to receive the SHG signals emitted from said sample and generate detected SHG signals, one or more hardware processors (e.g., hardware processors, processing electronics, microprocessors, and the like) in communication with the optical detection system, the one or more hardware processors configured to receive at least one detected SHG signal and determine a geometric feature of the sample or a variation in a geometric feature of the sample based on the at least one detected SHG signal; and ¶249, the SHG-CD system may comprise a non-transitory memory configured to store data and machine executable instructions and a processor (e.g., a hardware processor, processing electronics, a microprocessor, and the like) configured to execute the machine-readable instructions to perform one or more processes associated with monitoring a sample that includes one or more device) causing the one or more processors to: receive metrology data from a detector (4201/4210) associated with second harmonic generation (SHG) light (4400) from a sample (4302) in response to an illumination beam (4110) (¶18, a system for characterizing a sample using second harmonic generation comprises at least one optical source configured to direct a light beam onto a sample to produce second harmonic generation (SHG) signals, an optical detection system comprising at least one optical detector configured to receive the SHG signals emitted from said sample and generate detected SHG signals, one or more hardware processors (e.g., hardware processors, processing electronics, microprocessors, and the like) in communication with the optical detection system, the one or more hardware processors configured to receive at least one detected SHG signal and determine a geometric feature of the sample or a variation in a geometric feature of the sample based on the at least one detected SHG signal), wherein the sample (4302) includes an inversion-symmetric substrate and one or more films disposed on the inversion-symmetric substrate (¶223, Second-harmonic generation generally involves a non-centrosymmetric material, an interface or a defect: some property of the sample that breaks inversion symmetry of the sample (e.g., at a point or in a region where interaction with incident light occurs). In a material such as silicon, which is centrosymmetric, second harmonic generation occurs at interfaces and defects where the inversion symmetry is broken; and ¶124, The systems and methods described herein can be configured to determine threshold energy for a variety of interfaces such as for example, between two different semiconductors, between a semiconductor and a metal, between a semiconductor and a dielectric, etc.); and generate one or more metrology measurements associated with the one or more films based on the SHG light (4400) associated with an interface between the inversion-symmetric substrate and the one or more films (¶258, the separate SHG signals may be used in the analysis of the device under test (e.g., to refine the dimensional measurements)).
Regarding claim 25, Adler teaches the metrology system of claim 24, wherein the metrology measurement comprises: at least one of layer thickness, layer composition, presence of defects, charge/trap states, stress/strain, charge mobility, or surface/interface roughness associated with at least one of the one or more films (¶130, the systems and methods described herein can be used to detect defects or contaminants in the sample as discussed above; and see remainder of ¶130 for further details).
Regarding claim 26, Adler teaches the metrology system of claim 24, wherein the interface between the inversion-symmetric substrate and the one or more films is associated with a gate region of a field effect transistor (FET) (¶91, The example FinFET structure may include some combination of a silicon substrate 4540, a vertical “Fin” of silicon 4510, an oxide layer covering the Fin 4520 and a conductive gate contact 4530).
Regarding claim 27, Adler teaches the metrology system of claim 26, wherein the FET comprises: at least one of a metal-oxide-semiconductor FET (MOSFET), a planar FET, a FinFET, a gate-all-around (GAA) nanosheet FET, a fork-sheet FET, a complimentary GAA FET, a ferroelectric FET, or a 2D FET (¶91, The example FinFET structure may include some combination of a silicon substrate 4540, a vertical “Fin” of silicon 4510, an oxide layer covering the Fin 4520 and a conductive gate contact 4530).
Regarding claim 33, Adler teaches the metrology system of claim 24, wherein the one or more processors are further configured to execute program instructions causing the one or more processors to: control one or more process tools for fabricating at least a portion of the sample (4302) based on the one or more metrology measurements (¶249, the SHG-CD system may comprise a non-transitory memory configured to store data and machine executable instructions and a processor (e.g., a hardware processor, processing electronics, a microprocessor, and the like) configured to execute the machine-readable instructions to perform one or more processes associated with monitoring a sample that includes one or more device; and ¶13, These results (e.g., determined features) may also be used to alert manufacturing personnel of process variations, communicate with in-line fabrication tools and/or provide feedback or feed forward for adjustments to the semiconductor device fabrication process as described previously).
Regarding claim 38, Adler teaches the metrology system of claim 24, wherein the metrology data from the detector (4201/4210) associated with the second harmonic of the illumination beam comprises: wavelength-resolved measurements of the SHG light in response to illuminating the sample (4302) with the illumination beam (4110) having two or more wavelengths, wherein at least one of the one or more metrology measurements are generated based on the wavelength-resolved measurements of the SHG light (4400) (¶17, different detectors or sensors with different spectral responses or filters having different wavelength spectrums may be used to sample different wavelengths and possibly obtain different intensity values for different wavelengths. Having information on the relative strengths of different wavelengths may assist in determining changes in the SHG output as well as the changes in the device or sample; and see ¶258 for further details).
Regarding claim 43, Adler teaches a metrology method, comprising: directing an illumination beam (4110) at a sample (4302) (see figure 20, laser source 4100 generating laser beam 4110 and focusing optics 4130 and sample 4302; and ¶237, a laser source 4100 (e.g., a pulsed laser source such a Ti:sapphire laser) may be 4100 used to generate a laser beam 4110… focusing optics 4130 may focus the laser beam 4110 on the sample 4302), wherein the sample (4302) includes an inversion-symmetric substrate and one or more films disposed on the inversion-symmetric substrate (¶223, Second-harmonic generation generally involves a non-centrosymmetric material, an interface or a defect: some property of the sample that breaks inversion symmetry of the sample (e.g., at a point or in a region where interaction with incident light occurs). In a material such as silicon, which is centrosymmetric, second harmonic generation occurs at interfaces and defects where the inversion symmetry is broken; and ¶124, The systems and methods described herein can be configured to determine threshold energy for a variety of interfaces such as for example, between two different semiconductors, between a semiconductor and a metal, between a semiconductor and a dielectric, etc.); capturing metrology data based on second harmonic generation (SHG) light (4400) from the sample (4302) associated with an interface between the inversion-symmetric substrate and the one or more films (¶18, a system for characterizing a sample using second harmonic generation comprises at least one optical source configured to direct a light beam onto a sample to produce second harmonic generation (SHG) signals, an optical detection system comprising at least one optical detector configured to receive the SHG signals emitted from said sample and generate detected SHG signals, one or more hardware processors (e.g., hardware processors, processing electronics, microprocessors, and the like) in communication with the optical detection system, the one or more hardware processors configured to receive at least one detected SHG signal and determine a geometric feature of the sample or a variation in a geometric feature of the sample based on the at least one detected SHG signal; and ¶249, the SHG-CD system may comprise a non-transitory memory configured to store data and machine executable instructions and a processor (e.g., a hardware processor, processing electronics, a microprocessor, and the like) configured to execute the machine-readable instructions to perform one or more processes associated with monitoring a sample that includes one or more device); and generating one or more metrology measurements associated with the one or more films based on the metrology data (¶258, the separate SHG signals may be used in the analysis of the device under test (e.g., to refine the dimensional measurements)).
Regarding claim 44, Adler teaches the metrology method of claim 43, wherein generating one or more metrology measurements associated with the one or more films based on the SHG light associated with an interface between the inversion-symmetric substrate and the one or more films comprises: generating metrology measurements of at least one of layer thickness, layer composition, presence of defects, charge/trap states, stress/strain, charge mobility, or surface/interface roughness associated with at least one of the one or more films (¶130, the systems and methods described herein can be used to detect defects or contaminants in the sample as discussed above; and see remainder of ¶130 for further details).
Regarding claim 45, Adler teaches the metrology method of claim 43, wherein the interface between the inversion- symmetric substrate and the one or more films is associated with a gate region of at least one of a field effect transistor (FET), a metal-oxide-semiconductor FET (MOSFET), a planar FET, a FinFET, GAA nanosheet FET, a fork-sheet FET, a complimentary GAA FET, a ferroelectric FET, or a 2D FET (¶91, The example FinFET structure may include some combination of a silicon substrate 4540, a vertical “Fin” of silicon 4510, an oxide layer covering the Fin 4520 and a conductive gate contact 4530).
Regarding claim 49, Adler teaches the metrology method of claim 43, further comprising: controlling one or more process tools for fabricating at least a portion of the sample (4302) based on the one or more metrology measurements (¶249, the SHG-CD system may comprise a non-transitory memory configured to store data and machine executable instructions and a processor (e.g., a hardware processor, processing electronics, a microprocessor, and the like) configured to execute the machine-readable instructions to perform one or more processes associated with monitoring a sample that includes one or more device; and ¶13, These results (e.g., determined features) may also be used to alert manufacturing personnel of process variations, communicate with in-line fabrication tools and/or provide feedback or feed forward for adjustments to the semiconductor device fabrication process as described previously).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 5-7, 9, 28-30, 32, and 47-48 are rejected under 35 U.S.C. 103 as being unpatentable over Adler (USPGPub 20220364850 A1) in view of Adell et al. (USPGPub 20170067830 A1).
Regarding claims 5, 28, and 47, Adler teaches the one or more films (¶124, The systems and methods described herein can be configured to determine threshold energy for a variety of interfaces such as for example, between two different semiconductors, between a semiconductor and a metal, between a semiconductor and a dielectric, etc.). However, Adler fails to explicitly teach wherein the one or more films comprise: at least one of a high-k layer or an interfacial dipole engineering layer.
However, Adell teaches wherein the one or more films comprise: at least one of a high-k layer (212) or an interfacial dipole engineering layer (¶29, the structure 202 may include a semiconductor substrate 204 having isolation regions formed therein and a fin-shaped semiconductor structure protruding vertically above the isolation regions, which can be further processed to form fin-shaped field effect transistors (FinFETs). In these implementations, the high-k dielectric layer 212 may wrap around the fin-shaped semiconductor structure).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Adler to incorporate the teachings of Adell to further include a high-k layer because [h]igher dielectric constants of the high-k dielectrics provide higher gate capacitances for a given thickness of the gate dielectric. As a result, by using high-k dielectrics, for a given gate capacitance, the gate dielectric can have a higher physical thickness, thereby enabling reduced leakage currents (Adell, ¶6).
Regarding claims 6 and 29, Adler as modified by Adell teaches the metrology system of claims 5 and 28, wherein the one or more films comprise: at least one of Si3N4, Al2O3, Ta2O5, TiO2, ZrO2, or HfO2 (Adell, ¶30, the high-k dielectric layer 212 can be formed of Si.sub.3N.sub.4, Ta.sub.2O.sub.5, SrTiO.sub.3, ZrO.sub.2, HfO.sub.2, Al.sub.2O.sub.3, La.sub.2O.sub.3, Y.sub.2O.sub.3, HfSiO.sub.4 and LaAlO.sub.3, including non-stoichiometric versions of the above and various mixtures thereof, as well combinations or stacks or nanolaminates thereof, to name a few).
Regarding claims 7 and 30, Adler as modified by Adell teaches the metrology system of claims 5 and 28, wherein the inversion-symmetric substrate comprises: silicon (Adler, ¶9, An SHG-CD system directs light such as pulsed light (e.g., pulsed laser light) onto a sample, such as a silicon wafer comprising semiconductor devices or partially constructed semiconductor devices).
Regarding claims 9 and 32, Adler as modified by Adell teaches the metrology system of claims 5 and 28, wherein the one or more processors are further configured to execute program instructions causing the one or more processors to: control one or more process tools for fabricating the at least one of the high-k layer (Adell 212) or the interfacial dipole engineering layer based on the one or more metrology measurements (Adler, ¶249, the SHG-CD system may comprise a non-transitory memory configured to store data and machine executable instructions and a processor (e.g., a hardware processor, processing electronics, a microprocessor, and the like) configured to execute the machine-readable instructions to perform one or more processes associated with monitoring a sample that includes one or more device; and ¶13, These results (e.g., determined features) may also be used to alert manufacturing personnel of process variations, communicate with in-line fabrication tools and/or provide feedback or feed forward for adjustments to the semiconductor device fabrication process as described previously).
Regarding claim 48, Alder teaches the metrology method of claim 45, further comprising: controlling one or more process tools for fabricating the one or more films based on the one or more metrology measurements (Adler, ¶249, the SHG-CD system may comprise a non-transitory memory configured to store data and machine executable instructions and a processor (e.g., a hardware processor, processing electronics, a microprocessor, and the like) configured to execute the machine-readable instructions to perform one or more processes associated with monitoring a sample that includes one or more device; and ¶13, These results (e.g., determined features) may also be used to alert manufacturing personnel of process variations, communicate with in-line fabrication tools and/or provide feedback or feed forward for adjustments to the semiconductor device fabrication process as described previously). However, Adler fails to explicitly teach wherein the one or more films comprise: at least one of a high-k layer or an interfacial dipole engineering layer.
However, Adell teaches wherein the one or more films comprise: at least one of a high-k layer (212) or an interfacial dipole engineering layer (¶29, the structure 202 may include a semiconductor substrate 204 having isolation regions formed therein and a fin-shaped semiconductor structure protruding vertically above the isolation regions, which can be further processed to form fin-shaped field effect transistors (FinFETs). In these implementations, the high-k dielectric layer 212 may wrap around the fin-shaped semiconductor structure).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Adler to incorporate the teachings of Adell to further include a high-k layer because [h]igher dielectric constants of the high-k dielectrics provide higher gate capacitances for a given thickness of the gate dielectric. As a result, by using high-k dielectrics, for a given gate capacitance, the gate dielectric can have a higher physical thickness, thereby enabling reduced leakage currents (Adell, ¶6).
Claims 8 and 31 are rejected under 35 U.S.C. 103 as being unpatentable over Adler (USPGPub 20220364850 A1) in view of Adell et al. (USPGPub 20170067830 A1) as applied to claims 5 and 28 above, and further in view of Malkova et al. (USPGPub 20200292467 A1).
Regarding claims 8 and 31, Adler as modified by Adell teaches generating one of more metrology measurements (Adler, see ¶130 and ¶209). However, the combination fails to explicitly teach wherein at least one of the one or more metrology measurements comprises: at least one of a threshold voltage (Vt) or a value indicative of the threshold voltage (V).
However, Malkova teaches wherein at least one of the one or more metrology measurements comprises: at least one of a threshold voltage (Vt) or a value indicative of the threshold voltage (V) (¶10, The performance of a logic gate is commonly characterized in terms of electrical characteristics such as equivalent oxide thickness (EOT), leakage current, threshold voltage, leakage EOT, and breakdown voltage. During device processing it is important to monitor and control these parameters).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combination of Adler and Adell to incorporate the teachings of Malkova to further measure the threshold voltage of the device because, as stated in the sited art, it is important for determining the performance of the semiconductor device being measured (Malkova, ¶10).
Claims 11-14 and 34-37 are rejected under 35 U.S.C. 103 as being unpatentable over Adler (USPGPub 20220364850 A1) in view of Alles et al. (USPGPub 20060044641 A1).
Regarding claims 11 and 34, Adler teaches the metrology data from the detector (4201/4210) associated with the second harmonic (4400) of the illumination beam (¶18, a system for characterizing a sample using second harmonic generation comprises at least one optical source configured to direct a light beam onto a sample to produce second harmonic generation (SHG) signals, an optical detection system comprising at least one optical detector configured to receive the SHG signals emitted from said sample and generate detected SHG signals, one or more hardware processors (e.g., hardware processors, processing electronics, microprocessors, and the like) in communication with the optical detection system, the one or more hardware processors configured to receive at least one detected SHG signal and determine a geometric feature of the sample or a variation in a geometric feature of the sample based on the at least one detected SHG signal), However, Adler fails to explicitly teach wherein the metrology data from the detector associated with the second harmonic of the illumination beam comprises: temporally-resolved measurements of the SHG light in response to illuminating the sample with the illumination beam, wherein at least one of the one or more metrology measurements are generated based on the temporally-resolved measurements of the SHG light.
However, Alles teaches wherein the metrology data from the detector associated with the second harmonic of the illumination beam comprises: temporally-resolved measurements of the SHG light in response to illuminating the sample with the illumination beam, wherein at least one of the one or more metrology measurements are generated based on the temporally-resolved measurements of the SHG light (¶62, As shown in FIG. 4b, after the reflected fundamental signals 485 and SHG signals 480 are separated by a prism 470, the 400 nm wavelength SHG signals 480 are detected by a PMT 490 and measured by a photon counter with a 0.1 s temporal resolution).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Adler to incorporate the teachings of Alles to further include temporally-resolved measurements in order to detect and measure changes in the device over time.
Regarding claims 12 and 35, Adler as modified by Alles teaches the metrology system of claims 11 and 34, wherein at least one of the one or more metrology measurements is based on at least one of a saturation intensity of the SHG light, a slope of the intensity of the SHG light, or an intensity of the SHG light at a selected time (Adler, ¶9, These detectors can be configured to measure one or more of the intensity, angular distribution, or polarization of the SHG signal, or any combination thereof, by generating a detected SHG signal; ¶11, The signal can be monitored for changes to the SHG signal (e.g., changes associated with intensity, polarization, spatial distribution etc.) that may indicate changes in the production of the semiconductor devices; and see ¶34 for further details; and Alles, abstract, measuring intensities of the second harmonic generation signals from the reflection beam, and identifying an initial second harmonic generation intensity and a time evolution of second harmonic generation intensity from the measured second harmonic generation intensities so as to determine the at least one interface property of the layered structure).
Regarding claims 13 and 36, Adler as modified by Alles teaches the metrology system of claims 11 and 34, wherein the temporally-resolved measurements are associated with intermittent illumination of the sample (Adler 4302 | Alles 200) with the illumination beam (Alder 4110 | Alles 250) (Alles, ¶18, the method has a laser source emitting a beam of pulses that is directed into the layered structure to induce SHG signals, and an optical system for measuring intensities of the induced SHG signals; and see ¶62).
Regarding claims 14 and 37, Adler as modified by Alles teaches the metrology system of claims 11 and 34, wherein at least one of the one or more metrology measurements is based on intensity of the SHG light associated with the intermittent illumination of the sample (Adler 4302 | Alles 200) with the illumination beam (Alder 4110 | Alles 250) (Alles, ¶18, the method has a laser source emitting a beam of pulses that is directed into the layered structure to induce SHG signals, and an optical system for measuring intensities of the induced SHG signals).
Claims 16 and 39 are rejected under 35 U.S.C. 103 as being unpatentable over Adler (USPGPub 20220364850 A1) in view of Wang et al. (USPGPub 20200225151 A1).
Regarding claims 16 and 39, Adler teaches generating one of more metrology measurements (see ¶130 and ¶209). However, Adler fails to explicitly teach wherein at least one of the one or more metrology measurements includes a depth-dependent measurement.
However, Wang teaches wherein at least one of the one or more metrology measurements includes a depth-dependent measurement (¶51, hyperspectral imaging detectors 122 and 138 are configured to measure wavelength components by penetration depth (vertical detector), index of refraction, or another wavelength dependent property of the detector).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Adler to incorporate the teachings of Wang to further include depth-dependent measurements as different wavelengths are able to penetrate into different material, therefore allowing accurate detection of dimensions of the device.
Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Adler (USPGPub 20220364850 A1) in view of Adler (USPGPub 20220364850 A1) (different embodiment).
Regarding claim 17, Adler teaches SHG light associated with the interface between the inversion-symmetric substrate and the one or more films (¶18, a system for characterizing a sample using second harmonic generation comprises at least one optical source configured to direct a light beam onto a sample to produce second harmonic generation (SHG) signals, an optical detection system comprising at least one optical detector configured to receive the SHG signals emitted from said sample and generate detected SHG signals, one or more hardware processors (e.g., hardware processors, processing electronics, microprocessors, and the like) in communication with the optical detection system, the one or more hardware processors configured to receive at least one detected SHG signal and determine a geometric feature of the sample or a variation in a geometric feature of the sample based on the at least one detected SHG signal). However, Adler fails to explicitly teach one or more excitation sources to direct at least one of an additional illumination beam or an electric field to the sample to enhance the SHG light.
However, Adler (different embodiment) teaches one or more excitation sources (3060) to direct at least one of an additional illumination beam or an electric field to the sample to enhance the SHG light (see figure 15A, additional electromagnetic radiation source 3060; and ¶27, For such an approach, a metrology characterization tool is provided with an “additional” integrated light source (e.g., a UV flash lamp or laser) operating as a “pump” to induce a potential difference across heterointerface(s) in layered semiconductor device templates, together with a short or ultra-short pulsed laser (e.g., a femto-second solid state laser) operating as a “probe” light source).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Adler to incorporate the teachings of Adler (different embodiment) to further include an additional light source in order to induce a potential difference across heterointerface(s) in layered semiconductor device templates (Adler, ¶27), allowing the interface to be detected with more accuracy.
Claims 18 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Adler (USPGPub 20220364850 A1) in view of Adler (USPGPub 20220364850 A1) (different embodiment) as applied to claim 17 above, and further in view of Alles et al. (USPGPub 20060044641 A1).
Regarding claim 18, Adler as modified by Adler (different embodiment) teaches the wherein the metrology data from the detector associated with the second harmonic of the illumination beam comprises: measurements of the SHG light in response to illuminating the sample with at least one of the additional illumination beam or the electric field, wherein at least one of the one or more metrology measurements are generated based on the measurements of the SHG light (Adler, ¶18; and Adler (different embodiment), ¶27). However, the combination fails to explicitly teach wherein the metrology data from the detector associated with the second harmonic of the illumination beam comprises: temporally-resolved measurements.
However, Alles teaches metrology data from the detector associated with the second harmonic of the illumination beam comprises: temporally-resolved measurements (¶62, As shown in FIG. 4b, after the reflected fundamental signals 485 and SHG signals 480 are separated by a prism 470, the 400 nm wavelength SHG signals 480 are detected by a PMT 490 and measured by a photon counter with a 0.1 s temporal resolution).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combination of Adler and Adler (different embodiment) to further include temporally-resolved measurements in order to detect and measure changes in the device over time.
Regarding claim 20, Adler as modified by Adler (different embodiment) and Alles teaches the metrology system of claim 18, wherein the temporally-resolved measurement is associated with intermittent illumination of the sample with the illumination beam and the at least one of the additional illumination beam or the electric field (Alles, ¶18, the method has a laser source emitting a beam of pulses that is directed into the layered structure to induce SHG signals, and an optical system for measuring intensities of the induced SHG signals; and Adler (different embodiment), ¶191, For a flash lamp, energy per flash or power level during flash may be substrate material dependent. A flashlamp producing a total energy of 1 J to 10 kJ per flash would be appropriate for fully depleted silicon-on-insulator (FD-SOI). However a pulsed or constant UV source would be viable as well; and ¶192, When a laser is employed as source 3060, it may be any of a nanosecond, picosecond or femtosecond or faster pulse laser source).
Claim 22 is rejected under 35 U.S.C. 103 as being unpatentable over Adler (USPGPub 20220364850 A1) in view of Zhang (USPGPub 20220034791 A1).
Regarding claim 22, Adler teaches the first polarizer (4120) and the second polarizer (4220) being adjustable (¶9, the incident light pulses may be adjusted to improve (e.g., increase) the SHG signal from the sample, such as by selecting polarization, wavelength or intensity; and ¶13, the wavelength and/or polarization or other optical properties of the primary beam may also be varied). However, Adler fails to explicitly teach wherein an orientation of the polarizer is adjusted to maximize an intensity of the second harmonic of the illumination beam within a selected tolerance.
However, Zhang teaches wherein an orientation of the polarizer is adjusted to maximize an intensity of the second harmonic of the illumination beam within a selected tolerance (¶6, to ensure a precise measurement with methods in the prior art, strict alignment requirements must be met. For example, the sample position has to be fixated and flat, the angles of incidence and reflection are precisely controlled, and the polarization elements precisely rotate at certain steps and to a certain position. Without a tight tolerance for alignment of these measurement systems in the prior art, the calculated thickness or refractive index values are not accurate, or even meaningless).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Adler to incorporate the teachings of Zhang to have the polarizers adjusted only within a predetermined tolerance because [w]ithout a tight tolerance for alignment of these measurement systems in the prior art, the calculated thickness or refractive index values are not accurate, or even meaningless (Zhang, ¶6).
Claims 40 and 42 are rejected under 35 U.S.C. 103 as being unpatentable over Adler (USPGPub 20220364850 A1) in view of Adler (USPGPub 20220364850 A1) (different embodiment) and Alles et al. (USPGPub 20060044641 A1).
Regarding claim 40, Adler teaches wherein the metrology data from the detector associated with the second harmonic of the illumination beam comprises: measurements of the SHG light in response to illuminating the sample, wherein at least one of the one or more metrology measurements are generated based on the measurements of the SHG light (¶18). However, Adler fails to explicitly teach wherein the metrology data from the detector associated with the second harmonic of the illumination beam comprises: temporally-resolved measurements; and illuminating the sample with at least one of an additional illumination beam or an electric field.
However, Adler (different embodiment) teaches illuminating the sample (4032) with at least one of an additional illumination beam (3060) or an electric field (see figure 15A, additional electromagnetic radiation source 3060; and ¶27, For such an approach, a metrology characterization tool is provided with an “additional” integrated light source (e.g., a UV flash lamp or laser) operating as a “pump” to induce a potential difference across heterointerface(s) in layered semiconductor device templates, together with a short or ultra-short pulsed laser (e.g., a femto-second solid state laser) operating as a “probe” light source).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Adler to incorporate the teachings of Adler (different embodiment) to further include an additional light source in order to induce a potential difference across heterointerface(s) in layered semiconductor device templates (Adler, ¶27), allowing the interface to be detected with more