Prosecution Insights
Last updated: April 19, 2026
Application No. 18/128,484

ATOMIC LAYER DEPOSITION OF SILICON-CARBON-AND-NITROGEN-CONTAINING MATERIALS

Final Rejection §102§103
Filed
Mar 30, 2023
Examiner
KAO, SOPHIA WEI-CHUN
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Applied Materials, Inc.
OA Round
2 (Final)
96%
Grant Probability
Favorable
3-4
OA Rounds
3y 2m
To Grant
99%
With Interview

Examiner Intelligence

Grants 96% — above average
96%
Career Allow Rate
75 granted / 78 resolved
+28.2% vs TC avg
Minimal +5% lift
Without
With
+4.7%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
19 currently pending
Career history
97
Total Applications
across all art units

Statute-Specific Performance

§103
48.4%
+8.4% vs TC avg
§102
29.6%
-10.4% vs TC avg
§112
20.0%
-20.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 78 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) submitted on 12/15/2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Response to Amendment and Arguments Applicant’s amendment and arguments with respect to claim 1, claim 12 and claim 19 have been fully considered but are moot. The amendments materially changed the scope of the claims and necessitated a new search of the prior art. Upon conducting this new search, additional relevant references are identified and the grounds of rejection have been modified in response to applicant’s amendments to the claims as shown below. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim 19 is rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Pore (US- 2019/0279866-A1, hereinafter Pore) Regarding Claim 19. Pore teaches A semiconductor processing method comprising: providing a first precursor to a semiconductor processing chamber, wherein a substrate is disposed within a processing region of the semiconductor processing chamber, wherein the substrate defines a feature; contacting the substrate with the first precursor, wherein the contacting forms a first portion of a silicon-carbon-and-nitrogen-containing material within the feature defined on the substrate; (See Pore [0037-0041] Fig.1 step #140 to form first SiN material) purging the semiconductor processing chamber; (Pore [0034] the reaction chamber may be purged between precursor pulses.) providing a second precursor to the semiconductor processing chamber, wherein the second precursor comprises a silicon-containing precursor or a carbon-and-nitrogen-containing precursor; and contacting the substrate with the second precursor, wherein the contacting forms the silicon-carbon-and-nitrogen-containing material within the featured defined on the substrate, (See Pore [0037-0041] Fig.1 step #110 to form SiCN material) and wherein the silicon-carbon-and-nitrogen-containing material is characterized by an oxygen content less than or about 50 at.%. (Every ALD SiCN film produced by Pore’s process has an oxygen content far below 50%.) Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-4, 7-12, 18 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Pore (US- 2019/0279866A1, hereinafter Pore), and further in view of Noh et. al. (US- 2022/0119939A1, hereinafter Noh) Regarding Claim 1. Pore teaches in Fig. 1 and step 102 A semiconductor processing method comprising: providing a first precursor to a semiconductor processing chamber, wherein a substrate is disposed within a processing region of the semiconductor processing chamber, wherein the substrate defines a feature; contacting the substrate with the first precursor, wherein the contacting forms a first portion of a silicon-carbon-and-nitrogen-containing material on the substrate; (See Pore [0037-0041] Fig.1 step #140 to form first SiN material) providing a second precursor to the semiconductor processing chamber; and contacting the substrate with the second precursor, wherein the contacting forms the silicon-carbon-and-nitrogen-containing material on the substrate via an atomic laver deposition, (See Pore [0037-0041] Fig.1 step #110 to form SiCN material) Pore does not explicitly disclose wherein the silicon-carbon-and-nitrogen-containing material is void free. However, Noh teaches that introducing an inhibitor molecule into the ALD cycle prevents pinch-off and achieves ~100% step coverage at aspect ratio up to 25:1 in HAR gap fill application (Noh Figs. 5-8 [0081]). It would have been obvious to one of ordinary skill in the art at the effective filing date of the claimed invention to modify Pore’s semiconductor device with the teachings of Noh, as identified above, in order to achieve void-free SiCN gap fill to have better control of film deposition process. . Regarding Claim 2. Pore modified by Noh teaches The semiconductor processing method of claim 1, Pore teaches that ALD of SiCN maintains conformality on features with aspect ratios of at least about 6 and Noh further teaches wherein the feature is characterized by an aspect ratio of greater than or about 10:1. (Noh Fig. 5-8 shows aspect ratio of 20:1-25:1) These limitations would have been obvious to one of ordinary skill in the art at the time of the invention because it is a matter of determining optimum process conditions by routine experimentation with a limited number of species of result effective variables. These claims are prima facie obvious without showing that the claimed ranges achieve unexpected results relative to the prior art range. Regarding Claim 3. Pore modified by Noh teaches The semiconductor processing method of claim 1, Pore further teaches wherein either the first precursor or the second precursor comprises a silicon-containing precursor. (Pore Abstract and Fig 1) Regarding Claim 4. Pore modified by Noh teaches The semiconductor processing method of claim 3, Pore further teaches wherein the silicon-containing precursor further comprises a halogen. ([0045]) Regarding Claim 7. Pore modified by Noh teaches The semiconductor processing method of claim 1, Pore further teaches in Fig.5 and in related text further comprising: providing an inert precursor to the semiconductor processing chamber; generating plasma effluents of the inert precursor; and contacting the silicon-carbon-and-nitrogen-containing material with plasma effluents of the inert precursor. ([006] [0075] Fig 5, step 116) Regarding Claim 8. Pore modified by Noh teaches The semiconductor processing method of claim 7, Pore further teaches wherein the inert precursor comprises argon, helium, or nitrogen. (Fig 5, step 116 [006] [0075] the noble gas can be argon (Ar). ) Regarding Claim 9. Pore modified by Noh teaches The semiconductor processing method of claim 1, Pore modified by Noh does not explicitly disclose further comprising: prior to providing the first precursor, providing an inhibitor to the semiconductor processing chamber; and contacting the substrate with the inhibitor. However, Noh teaches further comprising: prior to providing the first precursor, providing an inhibitor to the semiconductor processing chamber; and contacting the substrate with the inhibitor. (NOH claim 1, substrate is sequentially exposed to a vapor of an inhibitor, followed by a vapor of a precursor) It would have been obvious to one of ordinary skill in the art at the effective filing date of the claimed invention to modify the combination of Pore and Noh with the teachings of Noh, as identified above, in order to improve the step coverage in the film deposition process. Regarding Claim 10. Pore modified by Noh teaches The semiconductor processing method of claim 9, Noh also teaches wherein the inhibitor comprises a hydrocarbon. (Noh [0127] “the disclosed carbon based inhibitors include acetylene and alkene.”) It would have been obvious to one of ordinary skill in the art at the effective filing date of the claimed invention to modify the combination of Pore and Noh with the teachings of Noh, as identified above, in order to improve the step coverage in the film deposition process and to have better control of film deposition in desired region. Regarding Claim 11. Pore modified by Noh teaches The semiconductor processing method of claim 1, Pore further teaches wherein a temperature in the semiconductor processing chamber is maintained less than or about 600° C. (Pore Claim 4 the thin film is deposited at a temperature of 300 to 600° C.) Regarding Claim 12. Pore teaches in Fig.5A-5C, Fig.6, process 500 and in related text: A semiconductor processing method comprising: providing a first precursor to a semiconductor processing chamber, wherein a substrate is disposed within a processing region of the semiconductor processing chamber, contacting the substrate with the first precursor, wherein the contacting forms a first portion of a silicon-carbon-and-nitrogen-containing material on the substrate; (See Pore [0037-0041] Fig.1 step #140 to form first SiN material) halting a flow of the first precursor; purging the semiconductor processing chamber; (Pore [0034] the reaction chamber may be purged between precursor pulses.) providing a second precursor to the semiconductor processing chamber; and contacting the substrate with the second precursor, wherein the contacting forms the silicon-carbon-and-nitrogen-containing material on the substrate via an atomic laver deposition, (See Pore [0037-0041] Fig.1 step #110 to form SiCN material) Pore does not explicitly disclose wherein the silicon-carbon-and-nitrogen-containing material is void free. and wherein the substrate defines a feature characterized by an aspect ratio of greater than or about 10:1; However, Noh teaches that introducing an inhibitor molecule into the ALD cycle prevent pinch-off and achieves ~100% step coverage at AR up to 25:1 in HAR gap fill application (Figs. 5-8) ([0081]). It would have been obvious to one of ordinary skill in the art at the effective filing date of the claimed invention to modify Pore’s semiconductor device with the teachings of Noh, as identified above, in order to achieve void-free SiCN gap fill to have better control of film deposition process. Pore teaches that ALD of SiCN maintains conformality on features with aspect ratios of at least about 6 and Noh further teaches wherein the feature is characterized by an aspect ratio of greater than or about 10:1. (Noh Fig. 5-8 shows aspect ratio of 20:1-25:1) These limitations would have been obvious to one of ordinary skill in the art at the time of the invention because it is a matter of determining optimum process conditions by routine experimentation with a limited number of species of result effective variables. These claims are prima facie obvious without showing that the claimed ranges achieve unexpected results relative to the prior art range. . Regarding Claim 18. Pore modified by Noh teaches The semiconductor processing method of claim 12, Pore further teaches in Fig.5 and in related text further comprising: providing an inert precursor to the semiconductor processing chamber; generating plasma effluents of the inert precursor; and contacting the silicon-carbon-and-nitrogen-containing material with plasma effluents of the inert precursor, wherein the contacting densifies the silicon-carbon-and-nitrogen-containing material. ([006][0075] Fig 5, step 116) Regarding Claim 20. Pore teaches The semiconductor processing method of claim 19, Pore does not explicitly disclose further comprising: prior to providing the first precursor, providing an inhibitor to the semiconductor processing chamber; generating plasma effluents of the inhibitor; and contacting the substrate with the plasma effluents of the inhibitor, wherein the contacting removes active sites from a portion of substrate or deposits a carbon residue on a portion of the substrate. However, Noh teaches the method further comprising: prior to providing the first precursor, providing an inhibitor to the semiconductor processing chamber; generating plasma effluents of the inhibitor; and contacting the substrate with the plasma effluents of the inhibitor, wherein the contacting removes active sites from a portion of substrate or deposits a carbon residue on a portion of the substrate (Noh claim 1, substrate is sequentially exposed to a vapor of an inhibitor, followed by a vapor of a precursor) It would have been obvious to one of ordinary skill in the art at the effective filing date of the claimed invention to modify Pore with the teachings of Noh, as identified above, in order to improve the step coverage in the film deposition process. Claims 5-6 and 14-15 are rejected under 35 U.S.C. 103 as being unpatentable over Pore (US-2019/0279866A1, hereinafter Pore), in view of Noh et. al. (US- 2022/0119939A1, hereinafter Noh) and further in view of Yuan et. al. (US-2021/0391171-A1, hereinafter Yuan) Regarding Claim 5. Pore modified by Noh teaches The semiconductor processing method of claim 1, Pore modified by Noh teaches does not explicitly disclose wherein either the first precursor or the second precursor comprises a carbon-and-nitrogen-containing precursor. However, Yuan teaches wherein either the first precursor or the second precursor comprises a carbon-and-nitrogen-containing precursor. (Yuan [0041] The silicon-containing precursors may optionally contain Si—N bond and Si—C bond. Also film #506 SiCxOyNz is produced as a result of carbon-and-nitrogen-containing precursor implicitly) It would have been obvious to one of ordinary skill in the art at the effective filing date of the claimed invention to modify the combination of Pore and Noh with the teachings of Yuan, as identified above, because aminosilane precursors are an established class of Si/C/N sources for SiCN deposition, and it would be routine precursor selection without inventive efforts. Regarding Claim 6. Pore modified by Noh and Yuan teaches The semiconductor processing method of claim 5, Yuan further teaches further comprising: generating plasma effluents of the carbon-and-nitrogen-containing precursor. (Yuan [0035-0037][0041]) It would have been obvious to one of ordinary skill in the art at the effective filing date of the claimed invention to modify the combination of Pore and Noh with the teachings of Yuan, as identified above, as it is a straightforward extension of the combined process. Regarding Claim 14. Pore modified by Noh teaches The semiconductor processing method of claim 12, Pore further teaches wherein: one of the first precursor or the second precursor comprises silicon-containing precursor (Pore step 104) ; Yuan teaches one of the first precursor or the second precursor comprises a carbon-and-nitrogen-containing precursor or a carbon-and-oxygen-containing precursor. (Yuan [0041] The silicon-containing precursors may optionally contain Si—N bond and Si—C bond. Also film #506 SiCxOyNz is produced as a result of carbon-and-nitrogen-containing precursor implicitly) It would have been obvious to one of ordinary skill in the art at the effective filing date of the claimed invention to modify the combination of Pore and Noh with the teachings of Yuan, as identified above, as identified above, because aminosilane precursors are an established class of Si/C/N sources for SiCN deposition, and it would be routine precursor selection without inventive efforts. Regarding Claim 15. Pore modified by Noh and Yuan teaches The semiconductor processing method of claim 14, Yuan further teaches further comprising: generating plasma effluents of the carbon-and-nitrogen-containing precursor or the carbon-and-oxygen-containing precursor. (Yuan [0035] “introducing one or more hydrogen radicals generated from a remote plasma source”. [0038] “The source gas for the hydrogen radicals may be delivered with other species, including carrier gas. The silicon-containing precursors may be delivered with other species, including carrier gas. Example carrier gases include but are not limited to argon (Ar), helium (He), neon (Ne), krypton (Kr), and xenon (Xe). ) ) It would have been obvious to one of ordinary skill in the art at the effective filing date of the claimed invention to modify the combination of Pore, Noh and Yuan, with the teachings of Yuan, as identified above, as it is a straightforward extension of the combined process. Allowable Subject Matter Claims 13 and 16-17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Claim 13 contains allowable subject matter, because the prior art, either singly or in combination, fails to anticipate or render obvious, the method,…wherein a third precursor to the semiconductor processing chamber, wherein the third precursor comprises an oxygen-containing precursor. These features in combination with the other elements of the claim are neither disclosed nor suggested by the prior art of record. Claim 16 contains allowable subject matter, because the prior art, either singly or in combination, fails to anticipate or render obvious, the method,… wherein either the first precursor or the second precursor comprises a carbon-nitrogen-and-oxygen-containing precursor. These features in combination with the other elements of the claim are neither disclosed nor suggested by the prior art of record. Claim 17 contains allowable subject matter because it depends from claim 16. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SOPHIA W KAO whose telephone number is (703)756-4797. The examiner can normally be reached Monday-Friday 9am-5pm Pacific Time. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eliseo Ramos-Feliciano can be reached at (571) 272-7925. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SOPHIA W KAO/Examiner, Art Unit 2817 /RATISHA MEHTA/Primary Examiner, Art Unit 2817
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Prosecution Timeline

Mar 30, 2023
Application Filed
Jul 08, 2025
Non-Final Rejection — §102, §103
Oct 10, 2025
Applicant Interview (Telephonic)
Oct 11, 2025
Examiner Interview Summary
Oct 14, 2025
Response Filed
Feb 25, 2026
Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
96%
Grant Probability
99%
With Interview (+4.7%)
3y 2m
Median Time to Grant
Moderate
PTA Risk
Based on 78 resolved cases by this examiner. Grant probability derived from career allow rate.

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