DETAILED ACTION
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination under 37 CFR 1.114
2. A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after allowance. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, prosecution in this application has been reopened pursuant to 37 CFR 1.114.
The request for continued examination has been entered on 07/02/2026.
In the request for continued examination, the applicants have been remained claims 1-20.
Claims 1-20 are currently pending in the application.
Priority
3. Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Information Disclosure Statement
4. The office acknowledges receipt of the following items from the applicant:
Information Disclosure Statement (IDS) filed on 07/02/2026.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
5. Claims 1-2, 4-11, 17-18 and 20 are rejected under 35 U.S.C. 103(a) as being unpatentable over CHOI Y (KR-20190038320-A1) in view of 이혜석 (KR-102425836 B1).
Regarding claim 1, CHOI Y discloses a display device comprising:
a substrate (301) including a pixel area (EA) and a non-pixel area (NEA) adjacent to the pixel area (EA);
a planarization layer (308) disposed on the substrate (301) and including a plurality of protrusions (convex 317a/concave 317b) each of the plurality of protrusions (convex 317a/concave 317b);
a pixel electrode (311) disposed on the planarization layer and overlapping the pixel area;
a pixel defining layer (319) disposed on the planarization layer (308), overlapping the non-pixel area (NEA), and exposing a portion of the pixel electrode (311);
a lower light emitting layer (blue light emitting material) disposed on the pixel electrode (311);
a charge generation layer (CGL) disposed on the lower light emitting layer (313); and
an upper light emitting layer (yellow-green light emitting material) disposed on the charge generation layer (CGL) (Fig. 6 and English Text).
CHOI Y discloses the features of the claimed invention as discussed above, but does not disclose each of the plurality of protrusions having an enclosed shape surrounding a center of the pixel area in a plan view.
이혜석, however, discloses each of the plurality of protrusions (410/420/430/440) having an enclosed shape surrounding a center of the pixel area (PA) in a plan view (Figs. 3-4 and English Text).
It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of CHOI Y to provide each of the plurality of protrusions having an enclosed shape surrounding a center of the pixel area in a plan view as taught by 이혜석 for a purpose of improving the light irradiated scatter the reflected light equally to all directions.
Regarding claim 2, CHOI Y and 이혜석 (citations to CHOI Y unless otherwise noted) discloses wherein the charge generation layer (CGL in light emitting layer 313) is continuously disposed over the pixel area (EA) and the non-pixel area (NEA) (Fig. 6).
Regarding claim 4, CHOI Y and 이혜석 (citations to CHOI Y unless otherwise noted) discloses wherein the pixel defining layer (309) includes a first pixel defining layer (319a) contacting a portion of the pixel electrode (313) and a second pixel defining layer (319b) surrounding the first pixel defining layer (319a) in the plan view, and the first pixel defining layer (319a) and the second pixel defining layer (319b) are spaced apart from each other (Fig. 6).
Regarding claim 5, CHOI Y and 이혜석 (citations to CHOI Y unless otherwise noted) discloses wherein the first pixel defining layer (319a) contacts one side surface of a protrusion (convex 317a/concave 317b) among the protrusions, and the second pixel defining layer overlaps another protrusion among the protrusions (convex 317a/concave 317b) (Fig. 6).
Regarding claim 6, CHOI Y and 이혜석 (citations to CHOI Y unless otherwise noted) discloses wherein the lower light emitting layer (blue light emitting material) and the upper light emitting layer (yellow-green light emitting material) overlap the pixel area (EA) (Fig. 6).
Regarding claim 7, CHOI Y and 이혜석 (citations to CHOI Y unless otherwise noted) discloses wherein the lower light emitting layer (blue light emitting material) is disposed along a profile of the pixel electrode (411) (Fig. 11).
Regarding claim 8, CHOI Y and 이혜석 (citations to CHOI Y unless otherwise noted) discloses wherein the upper light emitting layer (yellow-green light emitting material) is disposed along a profile of the charge generation layer (CGL) (Fig. 6).
Regarding claim 9, CHOI Y and 이혜석 (citations to CHOI Y unless otherwise noted) discloses further comprising: a common electrode (315) disposed on the upper light emitting layer (yellow-green light emitting material) (Fig. 6).
Regarding claim 10, CHOI Y and 이혜석 (citations to CHOI Y unless otherwise noted) discloses wherein the common electrode (315) is continuously disposed over the pixel area (EA) and the non-pixel area (NEA) (Fig. 6).
Regarding claim 11, CHOI Y and 이혜석 (citations to CHOI Y unless otherwise noted) discloses wherein the protrusions (convex 317a/concave 317b) include: a first protrusion overlapping a center of the pixel area (EA); at least one second protrusion surrounding the first protrusion; and a third protrusion surrounding the second protrusion (Fig. 6).
Regarding claim 17, CHOI Y discloses a display device comprising:
a substrate (301) including a first pixel area (1st EA) which emits a first light, a second pixel area (2nd EA) which emits a second light different from the first light, and a non-pixel area (NEA) adjacent to the first pixel area (1st EA) and the second pixel area (2nd EA);
a planarization layer (308) disposed on the substrate (101) and including a plurality of protrusions (convex 317a/concave 317b) surrounding a center of the first pixel area (1st EA) and a center of the second pixel area (2nd EA);
a first pixel electrode (Left 311) disposed on the planarization layer (308) and overlapping the first pixel area (Left EA);
a second pixel electrode (Right 311) disposed on the planarization layer (308) and overlapping the second pixel area (Right EA);
a pixel defining layer (319) disposed on the planarization layer (308), overlapping the non-pixel area (NEA), and exposing a portion of each of the first pixel electrode (Left 311) and the second pixel electrode (Right 311);
a first lower light emitting layer (Left blue light emitting material) disposed on the first pixel electrode (Left 311);
a second lower light emitting layer (Right blue light emitting material) disposed on the second pixel electrode (Right 311);
a charge generation layer (not shown) disposed on the first lower light emitting layer (Left 313) and the second lower light emitting layer (Right 313);
a first upper light emitting layer (Left yellow-green light emitting material) disposed on the charge generation layer and overlapping the first lower light emitting layer (Left blue light emitting material); and
a second upper light emitting layer (Right yellow-green light emitting material) disposed on the charge generation layer and overlapping the second lower light emitting layer (Right blue light emitting material) (Fig. 6 and English Text).
CHOI Y discloses the features of the claimed invention as discussed above, but does not disclose each of the plurality of protrusions having an enclosed shape surrounding a center of the pixel area in a plan view.
이혜석, however, discloses each of the plurality of protrusions (410/420/430/440) having an enclosed shape surrounding a center of the pixel area (PA) in a plan view (Figs. 3-4 and English Text).
It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of CHOI Y to provide each of the plurality of protrusions having an enclosed shape surrounding a center of the pixel area in a plan view as taught by 이혜석 for a purpose of improving the light irradiated scatter the reflected light equally to all directions.
Regarding claim 18, CHOI Y and 이혜석 (citations to CHOI Y unless otherwise noted) discloses wherein the charge generation layer is continuously disposed over the first (Left EA) and second pixel areas (Right EA) and the non-pixel area (NEA) (Fig. 6 and English Text).
Regarding claim 20, CHOI Y and 이혜석 (citations to CHOI Y unless otherwise noted) discloses wherein the pixel defining layer (319) includes a first pixel defining layer (319a) contacting portions of the first (Left 311) and second pixel electrodes (Right 311) and a second pixel defining layer (319b) surrounding the first pixel defining layer (319a) the plan view, and the first pixel defining layer (319a) and the second pixel defining layer (319b) are spaced apart from each other (Fig. 6).
6. Claims 3, 15-16 and 19 are rejected under 35 U.S.C. 103(a) as being unpatentable over CHOI Y and 이혜석 in view of SIM D (DE-102019117580-A1).
Regarding claim 3, CHOI Y and 이혜석 disclose the features of the claimed invention as discussed above, but does not disclose wherein the pixel electrode (313) is disposed along a profile of the planarization layer (308).
SIM D, however, discloses wherein the pixel electrode (113) is disposed along a profile of the planarization layer (108) (Fig. 1 and English Text).
It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of CHOI Y and 이혜석 to provide wherein the pixel electrode is disposed along a profile of the planarization layer as taught by SIM D for a purpose of providing the light emitting device adhering more effective.
Regarding claim 15, CHOI Y and 이혜석 discloses the features of the claimed invention as discussed above, but does not disclose further comprising: an electron transport layer respectively disposed on the lower light emitting layer and on the upper light emitting layer.
SIM D, however, discloses further comprising: an electron transport layer (205) respectively disposed on the lower light emitting layer 203b/203c) and on the upper light emitting layer (203a) (Fig. 3 and English Text).
It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of CHOI Y and 이혜석 to provide further comprising: an electron transport layer respectively disposed on the lower light emitting layer and on the upper light emitting layer as taught by SIM D for a purpose of improving the luminous efficiency for the light emitting device.
Regarding claim 16, CHOI Y and 이혜석 discloses the features of the claimed invention as discussed above, but does not disclose further comprising: a hole transport layer respectively disposed under the lower light emitting layer and under the upper light emitting layer.
SIM D, however, discloses further comprising: a hole transport layer (207) respectively disposed under the lower light emitting layer (203b/203c) and under the upper light emitting layer (203a) (Fig. 3 and English Text).
It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of CHOI Y and 이혜석 to provide further comprising: a hole transport layer respectively disposed under the lower light emitting layer and under the upper light emitting layer as taught by SIM D for a purpose of improving the luminous efficiency for the light emitting device.
Regarding claim 19, CHOI Y and 이혜석 discloses the features of the claimed invention as discussed above, but does not disclose wherein the first and second pixel electrodes are disposed along a profile of the planarization layer.
SIM D, however, discloses wherein the pixel electrode (111) is disposed along a profile of the planarization layer (108) (Fig. 1 and English Text).
It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of CHOI Y and 이혜석 to provide wherein the first and second pixel electrodes are disposed along a profile of the planarization layer as taught by SIM D for a purpose of providing the light emitting device adhering more effective.
7. Claims 12-13 are rejected under 35 U.S.C. 103(a) as being unpatentable over CHOI Y and 이혜석 in view of KIM et al., hereafter “KIM” (U.S. Publication No. 2022/0069043 A1).
Regarding claim 12, CHOI Y and 이혜석 discloses the features of the claimed invention as discussed above, but does not disclose wherein each of the protrusions has a polygonal cross-sectional shape.
KIM, however, discloses wherein each of the protrusions (204) has a polygonal cross-sectional shape (Figs. 11-13 and para [0130]).
It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of CHOI Y and 이혜석 to provide wherein each of the protrusions has a polygonal cross-sectional shape as taught by KIM for a purpose of improving light emission efficiency and luminance for the light emitting diodes.
Regarding claim 13, CHOI Y and 이혜석 discloses the features of the claimed invention as discussed above, but does not disclose wherein each of the protrusions has a semicircular or semielliptical cross-sectional shape.
KIM, however, discloses wherein each of the protrusions (204) has a semicircular or semielliptical cross-sectional shape (Figs. 11-13 and para [0109]).
It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of CHOI Y and 이혜석 to provide wherein each of the protrusions has a semicircular or semielliptical cross-sectional shape as taught by KIM for a purpose of improving light emission efficiency and luminance for the light emitting diodes.
8. Claim 14 is rejected under 35 U.S.C. 103(a) as being unpatentable over CHOI Y and 이혜석 in view of Liu et al., hereafter “Liu” (U.S. Patent No. 11,910,632 B2).
Regarding claim 14, CHOI Y and 이혜석 discloses the features of the claimed invention as discussed above, but does not disclose wherein the charge generation layer includes a first charge generation layer disposed on the lower light emitting layer and a second charge generation layer disposed on the first charge generation layer.
Liu, however, discloses wherein the charge generation layer (50) includes a first charge generation layer (51) disposed on the lower light emitting layer (30) and a second charge generation layer (52) disposed on the first charge generation layer (51) (Fig. 1 and col. 4, line 53-col. 4, line 10).
It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of CHOI Y and 이혜석 to provide wherein the charge generation layer includes a first charge generation layer disposed on the lower light emitting layer and a second charge generation layer disposed on the first charge generation layer as taught by Liu for a purpose of improving light emission efficiency and luminance for the light emitting diodes.
Conclusion
9. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Phuc T. Dang whose telephone number is 571-272-1776. The examiner can normally be reached on 8:00 am-5:00 pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Jacob Choi can be reached on 469-295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/PHUC T DANG/Primary Examiner, Art Unit 2897