Prosecution Insights
Last updated: July 17, 2026
Application No. 18/144,613

DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME

Final Rejection §103§112
Filed
May 08, 2023
Priority
Aug 05, 2022 — RE 10-2022-0098129
Examiner
SHAMSUZZAMAN, MOHAMMED
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Display Co., Ltd.
OA Round
2 (Final)
81%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allowance Rate
738 granted / 911 resolved
+13.0% vs TC avg
Strong +55% interview lift
Without
With
+55.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
37 currently pending
Career history
935
Total Applications
across all art units

Statute-Specific Performance

§103
93.0%
+53.0% vs TC avg
§102
2.4%
-37.6% vs TC avg
§112
2.0%
-38.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 911 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. Claims 1-10 are rejected under 35 U.S.C. 112(b), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention. Claim 1 recites “wherein the first insulating layer and the first protective layer define an opening exposing a portion of the first electrode” is ambiguous. Is this opening in the pixel area or in the non-pixel area? As shown in Fig. 3A, apportion of the first electrode can be interpreted as exposed both in pixel and non-pixel areas? “an opening exposing a portion of the first electrode in the pixel area” is suggested. Claims 2-10 are also rejected being dependent on rejected claim 1. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 1 is rejected under 35 U.S.C. 103 as being obvious over Harada et al. (US PGPUB 20220271115 A1) in view of Song et al (US 2022/0093894 A1). Regarding claim 1: Harada teaches in Fig. 1-4 about a display device comprising: PNG media_image1.png 704 852 media_image1.png Greyscale a first sub-pixel SP1, a second sub-pixel SP2, and a third sub-pixel SP3, which emit light of different colors from each other, respectively; a substrate 10, on which a pixel area, in which the first sub-pixel, the second sub- pixel and the third sub-pixel are arranged, and a non-pixel area 100b, in which a plurality of sub-pixels are not arranged, are defined (as shown); a thin-film transistor disposed on the substrate; a planarization layer 11 covering the thin-film transistor; a first electrode E1 disposed on the planarization layer and connected to the thin-film transistor; a first insulating layer 1212 covering an edge of the first electrode and extending to the non-pixel area (in the MW area); a first protective layer OR disposed between the first electrode and the first insulating layer, wherein the first insulating layer and the first protective layer define an opening (where MW resides) exposing a portion MW of the first electrode; a metal stacked structure CAW disposed on the first insulating layer in the non-pixel area, wherein the metal stacked structure includes a plurality of sub-metal layers (UL, ML, LL) a first portion of an intermediate layer OR1/OR2 disposed on the first electrode (on the left or right side as shown); a first portion of a second electrode E21/E22 disposed on the first portion of the intermediate layer (as shown); and a second portion of the intermediate layer OR3 and a second portion of the second electrode E23 disposed on the metal stacked structure (as shown), wherein the first portion of the intermediate layer and the first portion of the second electrode are spaced apart from the second portion of the intermediate layer and the second portion of the second electrode by the metal stacked structure (as shown). Harada doesn’t explicitly show a first protective layer OR disposed between the first electrode and the first insulating layer. However Song teaches in Fig. 3 about a first protective layer (as marked) disposed between the first electrode and the first insulating layer, wherein the first insulating layer and the first protective layer define an opening exposing a portion of the first electrode; PNG media_image2.png 543 807 media_image2.png Greyscale Therefore it would have been obvious to one of ordinary skill in the art, at the time of applicant’s invention to combine Song’s teachings to Harada’s display device to rearrange the placement of protective layer, insulating and first electrode layer depending on patterning process (Song, [0052]). It would have been obvious to one of ordinary skill in the art at the time of the invention was made to have the feature as claimed, since it has been held that rearranging parts of an invention involves only routine skill in the art. In re Japikse, 86 USPQ 70. Claims 1-2, 8, 10 are rejected under 35 U.S.C. 103 as being obvious over Song et al (US 2022/0093894 A1) in view of Choi et al (US 2021/0217839 A1) Regarding claim 1: Song teaches in Fig. 2, 4 about a display device comprising: PNG media_image2.png 543 807 media_image2.png Greyscale a first sub-pixel 100a, a second sub-pixel (another 100a), and a third sub-pixel (another 100a), which emit light of different colors from each other, respectively; a substrate 101, on which a pixel area, in which the first sub-pixel, the second sub- pixel and the third sub-pixel are arranged, and a non-pixel area 100b, in which a plurality of sub-pixels are not arranged, are defined (as shown); a thin-film transistor (comprising 104, 105, 108 etc.) disposed on the substrate; a planarization layer 109 covering the thin-film transistor; a first electrode disposed on the planarization layer and connected to the thin-film transistor (as shown); a first insulating layer 200 covering an edge of the first electrode and extending to the non-pixel area (as shown); a first protective layer (as marked) disposed between the first electrode and the first insulating layer, wherein the first insulating layer and the first protective layer define an opening exposing a portion of the first electrode; PNG media_image3.png 380 724 media_image3.png Greyscale a metal stacked structure 300 disposed on the first insulating layer in the non-pixel area, wherein the metal stacked structure includes a plurality of sub-metal layers (3011, 3012, portion of 500 on 3012 etc.); a first portion of an intermediate layer 400 disposed on the first electrode (as marked); a first portion of a second electrode disposed on the first portion of the intermediate layer (as marked); and a second portion of the intermediate layer (as marked) and a second portion of the second electrode disposed on the metal stacked structure (as marked), wherein the first portion of the intermediate layer and the first portion of the second electrode are spaced apart from the second portion of the intermediate layer and the second portion of the second electrode by the metal stacked structure (as shown). Song doesn’t explicitly talk about a first sub-pixel 100a, a second sub-pixel (another 100a), and a third sub-pixel (another 100a), which emit light of different colors from each other, respectively and pixel defining layer 200 is insulating layer. However it is well known in the art that in a display panel/device different pixels are to emit different colors and pixel defining layer is insulating as Choi teaches Fig. 5, [0071] in a display panel/device different pixels are to emit different colors and in [0126] about pixel defining layer 800 is insulating layer. Therefore it would have been obvious to one of ordinary skill in the art, at the time of applicant’s invention to combine Choi’s teachings to Song’s display device to realize the well known structure of an organic light-emitting diode display to have a self-emitting characteristics to have ow power consumption, high luminance, and rapid response speed (Choi, [0003]) and have insulating material as pixel defining layer to define emission area (Choi, [0126]). Regarding claim 2: Song teaches in Fig. 2 wherein the first portion of the second electrode is electrically connected to the metal stacked structure (as marked above), and the metal stacked structure is connected to a power voltage line. Song does not explicitly show the metal stacked structure is connected to a power voltage line. Choi teaches in Fig. 6 metal stacked structure is connected to a power voltage line ELVDD. Therefore it would have been obvious to one of ordinary skill in the art, at the time of applicant’s invention to combine Choi’s teachings to Song’s display device to realize that OLED’s are connected to power voltage line to supply each pixel (Choi, [0075]). Regarding claim 8: Song teaches in [0067] wherein the first protective layer comprises a transparent conductive oxide. Regarding claim 10: Song in view of Choi teaches wherein the intermediate layer 400 comprises an organic emission layer which emits light (Song, [0044]), and the organic emission layer of each of the first sub-pixel, the second sub-pixel, and the third sub-pixel emits light of different colors from each other (as choi teaches as explained in claim 1). Allowable Subject Matter Claim 3 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The limitation allowable is “the metal stacked structure comprises a first sub-metal layer and a second sub- metal layer having different etching ratios from each other, a first hole corresponding to an emission area of the plurality of sub-pixels is defined in the first sub-metal layer, and a second hole is defined in the second sub-metal layer under the first sub-metal layer, wherein the second hole has a diameter greater than a diameter of the first hole and overlaps the first hole” in combination with other limitations as a whole. Claims 4-7, 9 are also allowable being dependent on allowable claim 3. Response to Arguments Applicant’s arguments, see pages 2-3, filed on 02/24/2026, with respect to the rejection(s) of claim 1 under 112 and 103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of new 112 rejection and prior art Harada et al. (US PGPUB 20220271115 A1) Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHAMMED SHAMSUZZAMAN whose telephone number is (571)270-1839. The examiner can normally be reached Monday-Friday 7 am -4 pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Fernando Toledo can be reached at 571-272-1867. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Mohammed Shamsuzzaman/Primary Examiner, Art Unit 2897
Read full office action

Prosecution Timeline

May 08, 2023
Application Filed
Nov 24, 2025
Non-Final Rejection mailed — §103, §112
Feb 24, 2026
Response Filed
Jun 08, 2026
Final Rejection mailed — §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
81%
Grant Probability
99%
With Interview (+55.3%)
2y 5m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 911 resolved cases by this examiner. Grant probability derived from career allowance rate.

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