DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 4/7/2026 has been entered.
Response to Arguments
Examiner wishes to make clear on the record that there was not an agreement reached pertaining to overcoming prior art related to the amendments to the claims filed on 8/11/2026 in the interview on 7/15/2926, as they are not the amendments submitted in the interview agenda. The presently submitted amendments have not been reviewed or discussed prior and any indication of overcoming the prior art of record will be discussed below.
Applicant’s arguments, see Pages 8-10 of, filed 8/11/2026, with respect to claims 1-5 have been fully considered and are persuasive. The rejection of 5/12/2026 has been withdrawn.
More specifically, Examiner agrees that Borthakur in view of Komuro fail to teach the newly added limitation of claim 1. However, Examiner is brining in a new reference, , to remedy the deficiencies. See rejection to follow.
Regarding the arguments with respect to the rejection under 35 U.S.C. 102(a), as the claims have the feature removed, the rejection is hereby withdrawn.
Regarding the similarly related drawing objections, as the feature “the surface portion of the substrate” is no longer claimed, the related drawing objection is hereby withdrawn.
However, as there are no arguments or replacement drawings related to the Figs. 1 and 6, the outstanding drawing objections are upheld and repeated below.
Status of the Claims
Claims 1-10, 12-20 and 22 are pending in the application and are currently being examined. Claims 1, 4, and 5 have been amended. Claim 21 has been canceled. Claim 22 has been added.
Drawings
The drawings are objected to because the unlabeled rectangular boxes in Figs. 1 and 6 should be provided with descriptive labels (much like in Fig. 7). Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim(s) 1 and 22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Borthakur et al. (US 2023/0215960 A1, hereafter Borthakur) in view of Komuro et al. (US 2022/0293658 A1, hereafter Komuro) and in further view of Zang et al. (US 2017/0294336 A1, hereafter Zang) and Park (US 2016/0336193 A1).
Regarding claim 1, Borthakur teaches a semiconductor structure, comprising:
a plurality of photodiodes (single-photon avalanche diode (SPAD), 204, [0021]);
a deep trench isolation (DTI) structure (isolation structure, 252, [0045]) electrically isolating the plurality of photodiodes (240), wherein the DTI structure (252) is in a trench (space filled by 252);
a portion of the trench (space filled by 252) is located between at least four of the plurality of photodiodes (240) (as the DTI structure is formed in the trench, and is utilized to isolate the photodiodes, a portion of the trench would also be between at least four of the plurality of photodiodes); and
Borthakur is silent on a floating diffusion region associated with the plurality of photodiodes and below the trench. However, Komuro teaches a device similar to Borthakur in which there are floating diffusion regions (FD1 and FD2, [0092]) associated with the photodiodes (PD, [0084]). One skilled in the art would have found it obvious to include floating diffusion regions at a layer lower than the deep trench isolation regions in order to act as charge accumulation portions, as taught by Komuro [0092]. Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Borthakur to include floating diffusion regions as taught by Komuro.
Borthakur in view of Komuro fail to teach wherein, at the portion of the trench, trace amounts of an organic compound in combination with silicon oxynitride are disposed on at least one of a sidewall or a bottom surface of the trench, as they are silent on the method of forming the trench. Note that Examiner is interpreting “trace amounts” to mean present on less than 50% of the surface area, as defined in the present application in [0086].
However, Zang teaches a similar device including a step in forming the trench where a plug (370, [0053]) is on the sidewalls and bottom surface of the trench (330), wherein the plug (370) comprises an organic compound (0042). This plug is used as a mask for forming the trench, and may not be removed [0054]. As such, the mask is disposed on the sidewalls and bottom surface of the trench.
Zang is silent on both the composition of the plug as well as the thickness of the plug. One of ordinary skill in the art would know to use a mask of a composition and thickness known in the art prior to the effective filing date.
Park teaches a mask in Fig. 1B utilizing two layers for the mask (106 and 108, [0052]) that comprises a layer of an organic compound (108, [0052]) and a second layer of silicon oxynitride (106, [0052]). The mask 106 can have a thickness of 100-500 angstroms [0051], and the mask 108 has a thickness of 500-3000 angstroms [0052], making a combined thickness of 600-3500 angstroms (0.06-0.35 microns).
Borthakur teaches the substrate depth may be 10 microns ([0051]). As the thickness of the plug is taught to be in the range of 0.06-0.35 microns, the plug would cover less than 50% of the surface area of the sidewall of the trench, meaning trace amounts of the organic compound in combination with silicon oxynitride are disposed on at least a sidewall of the trench. Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Borthakur in view of Komuro to have a plug as taught by Zang with the material and thickness taught by Park to get the expected result of a mask to protect lower layers during etching.
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Regarding claim 22, Borthakur in view of Komuro in view of Zang in view of Park teaches the semiconductor structure of claim 1. Borthakur in view of Komuro in view of Zang in view of Park further teach the trace amounts of the organic compound are present on less than 50% of a surface area of the trench. Borthakur teaches the substrate depth may be 10 microns ([0051]). As the thickness of the plug is taught to be in the range of 0.06-0.35 microns, the plug would cover less than 50% of the surface area of the of the trench.
Claim(s) 2-5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Borthakur in view of Komuro in view of Zang in view of Park as applied to claim 1 above, and further in view of Bai et al. (US 2024/0071846 A1, hereafter Bai).
Regarding claim 2, Borthakur in view of Komuro in view of Zang in view of Park teach the DTI structure having a first depth in a range from approximately 2.0 µm to approximately 3.0 µm. While Borthakur does not explicitly teach this depth, Borthakur discloses a substrate thickness in the range of 5 to 20 microns [0051]. Pairing this with the fact that the depth of the isolation structure can be between 20% and 100% (as noted in the above rejection of claim 1) of the substrate thickness, one of ordinary skill in the art can set the depth of the isolation structure and thickness of the substrate such that it extends beyond the photodiodes and reach a depth between 2 and 3 microns.
Borthakur in view of Komuro is silent on the DTI structure having a first width in a range from approximately 0.1 µm to approximately 0.2 µm. However, one of ordinary skill in the art would find it obvious to look elsewhere for widths utilized in these devices. Bai discloses a device similar to Borthakur in view of Komuro in which the DTI can have a width on 0.15 microns [0044]. Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Borthakur in view of Komuro to include a width as taught by Bai to get the expected result of a functional device.
Regarding claim 3, Borthakur in view of Komuro in view of Zang in view of Park in further view of Bai teach the semiconductor structure of claim 2, wherein the DTI structure has the first width and the first depth at a location of the DTI structure that is between two adjacent photodiodes of the plurality of photodiodes. As seen in Fig. 6 of Borthakur, the DTI are located between adjacent photodiodes.
Regarding claim 4, Borthakur in view of Komuro in view of Zang in view of Park in further view of Bai teach the semiconductor structure of claim 3, wherein the DTI structure has a second width in a range from approximately 0.12 µm to approximately 0.4 µm and has a second depth in a range from approximately 2.0 µm to approximately 3.5 µm. While Borthakur does not explicitly teach this depth, Borthakur discloses a substrate thickness in the range of 5 to 20 microns [0051]. Pairing this with the fact that the depth of the isolation structure can be between 20% and 100% (as noted above in the rejection of claim 1) of the substrate thickness, one of ordinary skill in the art can set the depth of the isolation structure and thickness of the substrate such that it extends beyond the photodiodes and reach a depth between 2 and 3 microns.
Borthakur in view of Komuro is silent on the DTI structure having a second width in a range from approximately 0.12 µm to approximately 0.4 µm. However, one of ordinary skill in the art would find it obvious to look elsewhere for widths utilized in these devices. Bai discloses a device similar to Borthakur in view of Komuro in which the DTI can have a width on 0.15 microns [0044]. Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Borthakur in view of Komuro to include a width as taught by Bai to get the expected result of a functional device.
Regarding claim 5, Borthakur in view of Komuro in view of Zang in view of Park in further view of Bai teach the semiconductor structure of claim 4, wherein the DTI structure has the first width and the first depth at a location of the DTI structure that is between two adjacent photodiodes of the plurality of photodiodes. While Borthakur is silent on the depth being between the at least four of the plurality of photodiodes, the trenches are continuous [0045]. Thus, one of ordinary skill in the art would find it obvious that the trench of a second depth and a width of 0.15 microns would exist between the at least four of the plurality of photodiodes.
Allowable Subject Matter
Claims 6-20 are allowed.
The following is an examiner’s statement of reasons for allowance:
Claims 6-20 are allowed primarily because the prior art of record cannot anticipate or render obvious the following limitations, in combination as recited in independent claim(s) 6: “wherein a remainder of the plug is only at an intersection between the at least four photodiodes”;
and independent claim 18: “wherein a remainder of the plug is only in the portion of the trench that is located between four corners of a subset of the plurality of photodiodes”.
The closest prior art of record, Borthakur and Zhang et al. (US 2017/0294336 A1) teaches a deep trench structure with a plug but fails to teach “a remainder of the plug is only at an intersection between the at least four photodiodes/in the portion of the trench that is located between four corners of a subset of the plurality of photodiodes”, nor could Examiner find any reason for this limitation.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SAMMANTHA K SALAZ whose telephone number is (571)272-2484. The examiner can normally be reached Monday - Friday 8:00am-5:00pm.
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/SAMMANTHA K SALAZ/Examiner, Art Unit 2892
/ERIC W JONES/Primary Examiner, Art Unit 2892
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