DETAILED ACTION
Election/Restrictions
Applicant’s election without traverse of Species A, subspecies A2 relating to claims 1, 2, 4, 7, and 8 in the reply filed on 12/10/2025 is acknowledged.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 01/11/2023 and 10/16/2025 have been considered by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 2, and 4 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hatada et al. (US Pub. 2015/0001718A1).
Regarding independent claim 1, Hatada teaches a method of manufacturing a wafer (Figs. 1+; para. 0048+), comprising:
a wafer preparing step of preparing a wafer (2) including a plurality of semiconductor devices (3) joined to a substrate by respective adhesive layers (“solder or the like”) (Fig. 1; para. 0048);
a determining step of determining whether each of the semiconductor devices joined to the substrate is defective or non-defective (para. 0050);
a laser beam applying step of applying a laser beam to heat one of the adhesive layers by which one of the semiconductor devices that has been determined as defective is bonded to the substrate, thereby melting the adhesive layer in an area of the wafer that is irradiated with the laser beam (Fig, 2A; para. 0052, 0061-0062); and
a treating step of treating the semiconductor device released from a bonded state due to the adhesive layer being melted in the laser beam applying step (Fig. 2B; para. 0053).
Re claim 2, Hatada teaches wherein the laser beam is applied to the adhesive layer through the semiconductor device (Fig, 2A; para. 0052, 0061-0062).
Re claim 4, Hatada teaches wherein the treating step is a removing step of removing the semiconductor device from the substrate (Fig. 2B; para. 0053).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 7 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Hatada et al. (US Pub. 2015/0001718A1; see also JP 2015012005A) in view of Liao (US Pub. 2020/0367395A1; on IDS).
Re claim 7, Hatada teaches wherein the removing step includes a step of attracting the lifted semiconductor device under suction to remove the semiconductor device from the substrate (Fig. 2B; para. 0051, 0053 – where “absorbed” is considered to read on “under suction” – the English translation of the Japanese version (JP 2015012005A) uses “suction” instead of “absorption”).
Hatada is silent with respect to a step of ejecting a gas toward the semiconductor device released from the bonded state to lift the semiconductor device off the substrate.
Liao teaches a removing step wherein the removing step includes a step (Fig. 6) of ejecting a gas (S) toward the semiconductor device (20) released from the bonded state to lift the semiconductor device off the substrate (para. 0030), and a step (Fig. 7) of attracting the lifted semiconductor device under suction to remove the semiconductor device from the substrate (para. 0033).
It would have been obvious to one of ordinary skill in the art at the time of filing that the removing step of Hatada could be replaced with the removing step of Liao to arrive at the claimed invention for the purpose of improving the convenience of removing the chip as well as further reducing or preventing solder remaining (Liao (para. 0031).
Re claim 8, Hatada teaches a non-defective semiconductor device bonding step, after the removing step, of bonding a semiconductor device having same functions as those of the semiconductor device determined as defective to an area from which the semiconductor device determined as defective has been removed (para. 0066).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOLLY KAY REIDA whose telephone number is (571)272-4237. The examiner can normally be reached M-F 8:30-5:00PM.
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/MOLLY K REIDA/Examiner, Art Unit 2899
/Brent A. Fairbanks/Supervisory Patent Examiner, Art Unit 2899