DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 25 is objected to because of the following informalities:
There appears to be a duplicate recitation of the word “the” in l. 3 of claim 25 which recites “the the cooled plurality of substrates.”
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The preceding 35 U.S.C. 112(b) rejection of claims 1, 3, 6-18, and 20-23 is withdrawn in view of applicants’ claim amendments.
The following is a quotation of 35 U.S.C. 112(b):
(B) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 25 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Claim 25 recites the limitation "the cooled plurality of substrates" in l. 3. There is insufficient antecedent basis for this limitation in the claim. It is assumed applicants intended to recite “the plurality of substrates.”
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1, 7-8, 15-16, 18, and 23-25 is/are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Appl. Publ. No. 2011/0263134 to Van Aerde, et al. (hereinafter “Van Aerde”) in view of U.S. Patent Appl. Publ. No. 2016/0093487 to Huusen, et al. (“Huusen”) and further in view of U.S. Patent Appl. Publ. No. 2019/0067055 to Zheng, et al. (“Zheng”).
Regarding claim 1, Van Aerde teaches a method of forming an epitaxial stack on each of a plurality of substrates (see the Abstract, Figs. 1-8, and entire reference which teach a system and method for depositing thin films, including epitaxial layers on each of a plurality of substrates), the method comprising:
providing a semiconductor processing apparatus comprising a process chamber and a carousel for stationing a wafer boat (see Figs. 1-2 and ¶¶[0028]-[0034] which teach providing a processing apparatus (30) which includes process chambers (110a) and (110b) and a transfer platform (41) for stationing a wafer boat (42) before and after processing),
processing the plurality of substrates by performing the following operations (a) through (d) in sequence until the epitaxial stack has a pre-determined thickness (see ¶[0021] and ¶¶[0042]-[0043] which teach performing a process in which an epitaxial film such as Si or Ge having a predetermined thickness is deposited onto an epitaxial Si substrate):
a) loading the wafer boat, comprising the plurality of substrates, from the carousel into the process chamber (see Figs. 1-3 and ¶¶[0028]-[0034] which teach that a wafer boat (42) comprised of a plurality of substrates (140) is removed from the transfer platform (41) and is loaded into a process chamber (110a) or (110b))
b) performing a plurality of deposition cycles in the process chamber to form a plurality of epitaxial layers on each of the plurality of substrates (see Figs. 1-3, ¶[0021], and ¶¶[0041]-[0043] which teach performing a deposition cycle in which an epitaxial film such as Si or Ge having a predetermined thickness is deposited onto each of the plurality of Si substrates (140); moreover, since the epitaxial Si or Ge layers are comprised of individual rows or layers of crystalline Si or Ge atoms, they may be broadly considered as being comprised of a plurality of epitaxial layers formed from a plurality of deposition cycles);
c) unloading the wafer boat from the process chamber to the carousel (see Figs. 1-2, ¶[0010], ¶¶[0025]-[0026], and ¶¶[0037]-[0039] which teach that the wafer boat (42) containing the plurality of substates (140) is unloaded from the process chamber (110a) or (110b) and is moved to a transfer platform (41) after film deposition is complete); and
d) cooling the plurality of substrates while the wafer boat is stationed in the carousel (see Figs. 1-2 and ¶¶[0028]-[0034] which teach that the transfer platform (41) is not heated which therefore means that the substrates (140) are necessarily cooled after being unloaded from a process chamber (110a) or (110b)).
Van Aerde does not teach that operations (a) through (d) are repeatedly performed in sequence until the epitaxial stack has a pre-determined thickness. However, in Figs. 1-2 and ¶[0017] as well as elsewhere throughout the entire reference Huusen teaches an analogous system and method in which a plurality of wafers are loaded onto a wafer boat (100) which is then transferred to a growth chamber for epitaxial growth. In ¶[0005] Huusen specifically teaches that if the film thickness exceeds a few microns the deposited film tends to cause the wafer to stick to the supports on the wafer boat. One solution to this problem is to limit the thickness of the film that is deposited in one run, unload the boat from the furnace, unload the wafers from the boat, load the wafers onto the boat again, and then load the boat back into the furnace and then carry out the next deposition process. This can be repeated until the desired cumulative film thickness is achieved. Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Huusen and would be motivated to repeatedly perform operations (a) through (d) in sequence by transferring the wafer boat between the process chamber (110) and transfer platform (41) a plurality of times when depositing an epitaxial layer having a thickness that exceeds a few microns in order to avoid having the wafer(s) stick to the boat such that they are damaged upon removal.
Van Aerde and Huusen do not teach that in step (d) the plurality of substrates are cooled by flowing a cooling gas over the plurality of substrates. However, in Figs. 1-2 and ¶¶[0030]-[0047] as well as elsewhere throughout the entire reference Zheng teaches an analogous embodiment of a substrate processing apparatus (1) which includes a furnace (80) for processing a plurality of wafers (W) supported by a wafer boat (50) as well as a wafer transfer device. In Fig. 2 and ¶[0045] Zheng teaches that a fan filter unit (FFU) (91) and a gas suction unit (92) are provided on opposite sidewalls of the wafer transfer region (S2) in order to supply a horizontal gas stream comprised of an inert gas over the surface of wafers (W) supported by the wafer boat (50) in order to promote cooling of the wafers (W). Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Zheng and would be motivated to further cool the substrates located on the transfer platform (41) in the method of Van Aerde by flowing a cooling gas over the substrates in order to keep the wafer transfer region clean and to promote cooling of the substrates such that they may be handled/processed sooner. The combination of prior art elements according to known methods to yield predictable results has been held to support a prima facie determination of obviousness. All the claimed elements are known in the prior art and one skilled in the art could combine the elements as claimed by known methods with no change in their respective functions, with the combination yielding nothing more than predictable results to one of ordinary skill in the art. KSR International Co. v. Teleflex Inc., 550 U.S. 398, __, 82 USPQ2d 1385, 1395 (2007). See also, MPEP 2143(A).
Regarding claim 7, Van Aerde in view of Huusen teaches that in the sequence of operations the plurality of deposition cycles is performed until the plurality of epitaxial layers has reached a threshold thickness that is lower than the pre-determined thickness (See ¶[0005] of Huusen which specifically teaches that if the film thickness exceeds a few microns the deposited film tends to cause the wafer to stick to the supports on the wafer boat and that this can be alleviated by limiting the thickness of each deposition run such that it is less than the targeted total thickness. Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Huusen and would be motivated to transfer the wafer boat between the process chamber (110) and transfer platform (41) once the epitaxial stack has a total thickness that exceeds a few microns but is less than the targeted total thickness in order to avoid having the wafer(s) stick to the boat such that they are damaged upon removal.).
Regarding claim 8, Van Aerde and Zheng do not teach that the threshold thickness is in a range of 1 um to 5 um. However, as noted supra with respect to the rejection of claim 1, in ¶[0005] Huusen specifically teaches that if the film thickness exceeds a few microns the deposited film tends to cause the wafer to stick to the supports on the wafer boat. Since at least 2 mm is considered a “few microns,” a person of ordinary skill in the art prior to the effective filing date of the invention would set the threshold thickness for unloading and loading the wafers at approximately 2 mm which falls within the claimed range.
Regarding claim 15, Van Aerde teaches exposing the plurality of substrates comprised in the wafer boat to a reducing gas during the unloading of the wafer boat from the process chamber to the carousel or during the loading of the wafer boat back from the carousel into the process chamber (see at least ¶[0024] which teaches that in order to control oxidation of the film during loading/unloading a reducing gas is flowed into the process chamber before, during, and after loading and unloading the substrate).
Regarding claim 16, Van Aerde teaches that the exposing of the reducing gas comprises providing the reducing gas by flowing the reducing gas in the process chamber prior to the unloading the wafer boat from the process chamber to the carousel or prior to the loading of the wafer boat from the carousel into the process chamber (see at least ¶[0024] which teaches that in order to control oxidation of the film during loading/unloading a reducing gas is flowed into the process chamber before, during, and after loading and unloading the substrate).
Regarding claim 18, Van Aerde teaches that the semiconductor processing apparatus is a vertical furnace (see Fig. 1 and ¶¶[0028]-[0031] which teach that the reactor (110) is a vertical furnace).
Regarding claim 23, Van Aerde teaches that the wafer boat has a different coefficient of thermal expansion than that of the plurality of substrates (see Fig. 2 and ¶[0017] which teach that the wafer boat is typically made of quartz whereas the semiconductor substrate for Si and/or Ge epitaxial deposition is Si which has a different coefficient of thermal expansion than the wafer boat), but does not teach that the plurality of deposition cycles causes at least one substrate of the plurality of substrates to attach to the wafer boat. However, as noted supra with respect to the rejection of claim 1, in ¶[0005] Huusen teaches that if the film thickness exceeds a few microns the deposited film tends to cause the wafer to stick to the supports on the wafer boat. Accordingly, when the thickness of the epitaxial Si or Ge layer deposited in the method of Van Aerde exceeds a few micros the underlying substrate will necessarily begin to attach to the wafer boat as claimed.
Van Aerde and Huusen do not teach that the method comprises detaching the at least one substrate from the wafer boat via the cooling of the plurality of substrates. However, as also noted supra with respect to the rejection of claim 1, in Fig. 2 and ¶[0045] Zheng teaches that a fan filter unit (FFU) (91) and a gas suction unit (92) are provided on opposite sidewalls of the wafer transfer region (S2) in order to supply a horizontal gas stream comprised of an inert gas over the surface of wafers (W) supported by the wafer boat (50) in order to promote cooling of the wafers (W). Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Zheng and would be motivated to further cool the substrates located on the transfer platform (41) in the method of Van Aerde by flowing a cooling gas over the substrates in order to keep the wafer transfer region clean and to promote cooling of the substrates such that they may be handled/processed sooner. Moreover, due to the differing coefficients of thermal expansion of the Si substrate and the quartz (i.e., SiO2) boat, the cooling process of Zheng will necessarily cause the Si substrate to detach from the quartz boat as one contracts faster than the other during the cooling process.
Regarding claim 24, Van Aerde teaches that the wafer boat comprises a plurality of wafer boat supports, each comprising a plurality of protruding features on which one of the plurality of wafers is positioned, the plurality of protruding features extending towards an inner space, formed by the wafer boat supports, along an axis that is at an angle with respect to an axis perpendicular to the wafer boat supports (see Fig. 1 and ¶[0029] which teach that the wafers (140) are provided in a wafer boat (130) which includes vertical wafer boat supports with protruding features which extend towards an inner space and upon which the wafers (140) are positioned; moreover the protruding features extend towards a central axis of the wafer boat (130) along an axis that forms an angle (even if that angle is 0°) with respect to an axis perpendicular to the vertical wafer boat supports).
Regarding claim 25, Van Aerde teaches that the wafer boat comprises a plurality of wafer boat supports for supporting the plurality of substrates (see Fig. 1 and ¶[0029] which teach that the wafer boat (130) includes a plurality of supports in the form of at least the left and right vertical wafer boat supports), but does not teach that the sequence of operations comprises, separating the the cooled plurality of substrates from the plurality of wafer boat supports. However, in Figs. 1-2 and ¶[0017] as well as elsewhere throughout the entire reference Huusen teaches an analogous system and method in which a plurality of wafers are loaded onto a wafer boat (100) which is then transferred to a growth chamber for epitaxial growth. In ¶[0005] Huusen specifically teaches that if the film thickness exceeds a few microns the deposited film tends to cause the wafer to stick to the supports on the wafer boat. One solution to this problem is to limit the thickness of the film that is deposited in one run, unload the boat from the furnace, unload the wafers from the boat, load the wafers onto the boat again, and then load the boat back into the furnace and then carry out the next deposition process. This can be repeated until the desired cumulative film thickness is achieved. Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Huusen and would be motivated to repeatedly perform operations (a) through (d) in sequence by transferring the wafer boat (130) between the process chamber (110) and transfer platform (41) a plurality of times when depositing an epitaxial layer having a thickness that exceeds a few microns and then, when the wafer boat (130) is in the transfer platform (41), separate each individual wafer from the wafer boat supports in order to avoid having the wafer(s) stick to the boat due to the accumulation of deposited material such that they are damaged upon removal.
Van Aerde and Huusen do not explicitly teach that the plurality of substrates are separated from the plurality of wafer boat supports without removing the plurality of wafers from the wafer boat. However, since the method of separating each wafer from the wafer boat as taught by Huusen is designed to create physical separation between the supporting elements in the wafer boat and each wafer itself in order to create a break any accumulation of deposits which adhere the wafer to the wafer boat, a PHOSITA would readily recognize that this separation may be attained by simply raising the wafer a predetermined distance such that it is physically separate from the wafer boat supports without actually removing the wafer from the interior of the boat itself. This would be desirable from the standpoint of reducing the total amount of movement and time required to perform this action as simply raising the wafer within the boat rather than raising and removing the wafer from the boat takes less total movement and time in order to achieve the same objective. Thus, a PHOSITA prior to the effective filing date of the invention would look to the teachings of Huusen and would be motivated to perform the action of separating the substrates from the wafer boat supports without completely removing the wafers from the wafer boat itself in order to reduce the total amount of time and movement required to create the desired physical separation such that the wafers do not adhere to the wafer boat due to the presence of accumulated deposits.
Claims 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Van Aerde in view of Huusen and further in view of Zheng and still further in view of U.S. Patent No. 5,915,957 to Osamu Tanigawa (“Tanigawa”).
Regarding claim 3, Van Aerde teaches that
the wafer boat comprises a plurality of wafer boat supports for supporting the plurality of substrates (see Figs. 1-2 and ¶¶[0028]-[0034] which teach that the wafer boat (130) supports a plurality of substrates (140)),
the semiconductor processing apparatus comprises a substrate handling robot (see Fig. 2 and ¶¶[0028]-[0034] which teach the use of a substrate handling robot in the form of transfer arm (46)).
Van Aerde does not teach that the sequence of operations comprises, after cooling the plurality of substrates, lifting and placing back each of the cooled plurality of substrates on the plurality of wafer boat supports, thereby detaching each of the plurality of substrates from the wafer boat supports. However, as noted supra with respect to the rejection of claim 1, in ¶[0005] Huusen specifically teaches that if the film thickness exceeds a few microns the deposited film tends to cause the wafer to stick to the supports on the wafer boat. One solution to this problem is to limit the thickness of the film that is deposited in one run, unload the boat from the furnace, unload the wafers from the boat, load the wafers onto the boat again, and then load the boat back into the furnace and then carry out the next deposition process. This can be repeated until the desired cumulative film thickness is achieved. Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Huusen and would be motivated to transfer the wafer boat (130) out of the process chamber (110) and onto the transfer platform (41), unload and then reload each of the substrates using the transfer arm (46), and then transfer the wafer boat (130) back into the process chamber (110) a plurality of times when depositing an epitaxial layer having a thickness that exceeds a few microns in order to avoid having the wafer(s) stick to the boat such that they are damaged upon removal.
Van Aerde and Huusen do not teach that each of the plurality of substrates are detached from the wafer boat supports at the same time. However, in at least Figs. 1-4 and col. 4, l. 17 to col. 6, l. 67 Tanigawa teaches an analogous system and method of transferring a plurality of wafers (W) into and out of a wafer boat (5) using a transfer apparatus (6) comprised of a plurality of transfer arms (61). In Figs. 2 & 4A and at least col. 5, ll. 35-49 Tanigawa specifically teaches an embodiment in which five transfer arms (61) are provided on the transfer apparatus (6) to permit the simultaneous transfer of five wafers (W) to and from the wafer boat (5). In this case the use of a plurality of transfer arms (61) expedites the transfer of wafers (W) into and out of the boat (5) by allowing multiple wafers (W) to be transferred simultaneously instead of a single wafer (W) at a time if there were only one transfer arm. In this regard a PHOSITA prior to the effective filing date of the invention would look to the teachings of Tanigawa and would be motivated to use a plurality of transfer arms (61) to simultaneously perform the wafer removal/detachment method of Huusen on each of the substrates at the same time in order to reduce the time and cost required to perform the process.
Claims 6 and 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Van Aerde in view of Huusen and further in view of Zheng and still further in view of Japanese Patent Appl. Publ. No. JP 2019-004050 A to Otsuki, et al. (“Otsuki”).
Regarding claim 6, Van Aerde, Huusen, and Zheng do not teach the structure of the epitaxial stack as claimed. However, in at least Figs. 2-3 and the Description of Embodiments section at pp. 3-7 Otsuki teaches that:
the plurality of epitaxial layers comprises one or more epitaxial pairs, wherein each of the one or more epitaxial pairs comprises a first epitaxial layer and a second epitaxial layer, and wherein the second epitaxial layer is different from the first epitaxial layer and is stacked alternately and repeatedly with the first epitaxial layer in the epitaxial stack (see specifically Fig. 2 and pp. 4-5 which teach depositing an epitaxial stack onto a substrate (10) which is comprised of alternating Si epitaxial layers (21), (22), (23), etc. with a second epitaxial layer (31), (32), (33), etc. which, as disclosed specifically at pp. 5-6, may be comprised of Ge epitaxial layers).
Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Otsuki and would be motivated to utilize the system and method of Van Aerde, Huusen, and Zheng to deposit a plurality of epitaxial layers comprised of one or more epitaxial pairs in the form of alternating Si and Ge epitaxial layers in order to form a high quality epitaxial stack as part of a process for fabricating thicker layers for use in electronic and/or optoelectronic devices in which the substrate does not stick to the wafer boat.
Regarding claim 9, Van Aerde, Huusen, and Zheng do not teach the composition of the first and second epitaxial layers as claimed. However, Otsuki teaches a method of performing a plurality of deposition cycles comprising:
a first deposition pulse comprising a provision of one or more first semiconductor material precursors to the process chamber, thereby forming a first epitaxial layer comprising a first semiconductor material (see Figs. 2-3 and pp. 4-5 which teach a first deposition pulse of depositing Si epitaxial layers (21), (22), (23), etc. by supplying a first reaction gas such as silane); and
a second deposition pulse comprising a provision of one or more second semiconductor material precursors to the process chamber, thereby forming a second epitaxial layer comprising a second semiconductor material that is different than the first semiconductor material (see Figs. 2-3 and pp. 6-7 which teach a second deposition pulse of depositing Ge epitaxial layers (31), (32), (33), etc. using a second reaction gas such as tetramethyl germanium).
Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Otsuki and would be motivated to utilize the system and method of Van Aerde, Huusen, and Zheng to deposit an epitaxial stack comprised of alternating Si and Ge epitaxial layers from alternating first and second deposition pulses of Si- and Ge-containing precursor gases in order to form a high quality epitaxial stack as part of a process for fabricating thicker layers for use in electronic and/or optoelectronic devices in which the substrate does not stick to the wafer boat.
Claim 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Van Aerde in view of Huusen and further in view of Zheng and Otsuki and still further in view of U.S. Patent Appl. Publ. No. 2020/0219978 to Guler, et al. (“Guler”).
Regarding claim 10, Van Aerde, Huusen, Zheng, and Otsuki do not teach that the one or more first semiconductor material precursors comprise a first germanium-containing compound and a first silicon-containing compound that is different from the first germanium-containing compound, and wherein the one or more second semiconductor material precursors comprise a second silicon-containing compound. However, in at least Figs. 4A-B and ¶¶[0048]-[0050] as well as elsewhere throughout the entire reference Guler teaches a method for producing an integrated circuit structure which involves fabricating a stack (400) which includes alternating layers of silicon germanium (404) and silicon (406) on a silicon fin (402). Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Guler and would recognize that the method of Van Aerde, Huusen, Zheng, and Osuki may be utilized to produce a stack comprised of alternating layers of SiGe and Si by flowing a first Si- and Ge-containing compound to form the first semiconductor material and then flowing a Si-containing compound to form the second semiconductor material and would be motivated to do so in order to produce integrated circuit structures on a plurality of wafers with a higher success rate.
Claims 11-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Van Aerde in view of Huusen and further in view of Zheng, Otsuki, and Guler and still further in view of U.S. Patent Appl. Publ. No. 2013/0288480 to Sanchez, et al. (“Sanchez”).
Regarding claim 11, Van Aerde, Huusen, Zheng, and Otsuki do not explicitly teach that the plurality of epitaxial layers has an exposed upper surface comprised in the second epitaxial layer upon reaching the threshold thickness. However, as noted supra with respect to the rejection of claim 10, in Figs. 4A-B and ¶¶[0048]-[0050] Guler teaches a method for producing an integrated circuit structure which involves fabricating a stack (400) which includes alternating layers of silicon germanium (404) and silicon (406) on a silicon fin (402). As shown specifically in Figs. 4A-B, in one embodiment the stack is completed with an upper surface comprised of the second epitaxial layer comprised of Si (406). Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would the Si layer as a suitable stopping point for removal of the wafer boat in order to perform the method of Huusen. Alternatively, selecting the second epitaxial layer as the stopping point when reaching the threshold thickness in the method of Huusen may be considered as a matter of design choice since there is essentially no difference between stopping growth after the first or second epitaxial layer prior to completion of the entire stack. Even if there is a difference, selecting the second epitaxial layer comprised of Si as the stopping point may be considered as desirable in order to, for example, prevent exposure of Ge in the underlying SiGe layer to potential contaminants in the ambient.
Van Aerde, Huusen, Zheng, Osuki, and Guler do not teach performing a third deposition pulse as claimed. However, in Fig. 2 and ¶¶[0029]-[0039] Sanchez teaches an analogous method of depositing a Group IV-element-containing epitaxial layer onto a substrate which involves transferring the substrate itself between two different chambers. In particular, Sanchez specifically teaches a process in which:
before the unloading the wafer boat from the process chamber to the carousel, performing a third deposition pulse comprising a provision of a third reaction gas mixture to the process chamber, thereby forming a third epitaxial layer on the exposed upper surface, the third epitaxial layer being different from the first epitaxial layer and different from the second epitaxial layer (see Fig. 2, ¶¶[0032]-[0035], and steps (206) and (208) which teach depositing a Ge cap layer onto the SiGe-containing layer having a predetermined thickness prior to breaking the chamber seal and transferring the substrate to a second processing chamber in order to minimize exposure to oxygen and other contaminants).
Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Sanchez and would be motivated to perform a third deposition pulse prior to unloading the wafer boat in which a cap layer comprised of a third reaction gas mixture is supplied to the processing chamber once a threshold thickness has been reached in order to deposit an epitaxial Ge cap layer which further minimizes the propensity for contamination of the surface with oxygen or other atmospheric contaminants upon being removed from the processing chamber.
Regarding claim 12, Van Aerde, Huusen, Zheng, Osuki, and Guler do not teach that the provision of the third reaction gas mixture comprises providing a third semiconductor material precursor, and wherein the third semiconductor material precursor comprises a second germanium-containing compound. However, as noted supra with respect to the rejection of claim 11, in Fig. 2, ¶¶[0032]-[0035], and steps (206) and (208) Sanchez teaches depositing a Ge cap layer onto the SiGe-containing layer prior to breaking the chamber seal and transferring the substrate to a second processing chamber in order to minimize exposure to oxygen and other contaminants. Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would be motivated to utilize the same Ge-containing compound such as tetramethyl germanium to deposit the Ge cap layer in the method of Sanchez in order to further minimize the propensity for contamination of the surface with by oxidation or other atmospheric contaminants.
Regarding claim 13, Van Aerde, Huusen, Zheng, and Guler do not explicitly teach that the first deposition pulse is carried out at a first deposition temperature, the second deposition pulse is carried out at a second deposition temperature, the third deposition pulse is carried out at a third deposition temperature and wherein the first, the second and the third deposition temperatures is less than 600 °C. However, in p. 5 Otsuki teaches that the growth temperature of the Si epitaxial layer is preferably in the range of 500 °C or higher and 800 °C or lower with Example 1 at p. 8 specifically teaching that the Si epitaxial layer is deposited at a temperature of 550 °C. Then in at least ¶[0034] Sanchez teaches that the epitaxial Ge cap layer is deposited at a temperature of about 300 to 450 °C. Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Otsuki and Sanchez and would be motivated to utilize a deposition temperature of 300 up to 550 °C, which is below 600 °C in order to deposit the Si, SiGe, and Ge-containing layers in the method taught by the combination of Van Aerde, Huusen, Otsuki, Guler, and Sanchez.
Regarding claim 14, Van Aerde, Huusen, Zheng, Otsuki, and Guler do not teach that after the loading of the wafer boat, comprising the plurality of substrates, from the carousel into the process chamber, increasing temperature in the process chamber to the first deposition temperature or the second deposition temperature, and exposing the plurality of substrates to a gas ambient comprising a chlorine-containing compound, thereby removing the third epitaxial layer from the epitaxial stack. However, in Fig. 2, ¶¶[0035]-[0038], and steps (208)-(214) Sanchez teaches that after forming the Ge capping layer the and transferring the substrate to a second process chamber, the Ge capping layer is removed in steps (212) and (214) by heating to a predetermined temperature and flowing a halide gas such as chlorine or hydrogen chloride through the second processing chamber such that further epitaxial growth may be performed in step (216). Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Sanchez and would be motivated to heat the wafer boat and utilize a chlorine-containing gas to etch the Ge capping layer after the wafer boat is loaded back into the process chamber such that growth of the epitaxial stack may be continued on a surface which is substantially free of contaminants.
Claims 20-21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Van Aerde in view of Huusen and further in view of Zheng and still further in view of Sanchez.
Regarding claim 20, Van Aerde, Huusen, and Zheng do not teach performing an additional deposition cycle as claimed. However, in Fig. 2 and ¶¶[0029]-[0039] Sanchez teaches an analogous method of depositing a Group IV-element-containing epitaxial layer onto a substrate which involves transferring the substrate itself between two different chambers. In particular, Sanchez specifically teaches a sequence of operations in which:
before the unloading the wafer boat, performing an additional deposition cycle that forms an additional epitaxial layer on an exposed upper surface of the plurality of epitaxial layers, the additional epitaxial layer being different from the plurality of epitaxial layers (see Fig. 2, ¶¶[0032]-[0035], and steps (206) and (208) which teach depositing a Ge cap layer onto the SiGe-containing layer having a predetermined thickness prior to breaking the chamber seal and transferring the substrate to a second processing chamber in order to minimize exposure to oxygen and other contaminants); and
after loading of the wafer boat, performing a thermal treatment that removes an oxide layer formed on the additional epitaxial layer (see Fig. 2, ¶¶[0035]-[0038], and steps (210), (210), and (214) which teach that after being transferred to a second processing chamber the Ge cap layer will be oxidized and contaminated and this can be removed by heating to a first temperature and etching the surface of the substrate to remove the sacrificial protective Ge cap layer).
Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Sanchez and would be motivated to perform a third deposition pulse prior to unloading the wafer boat in which a cap layer comprised of a third reaction gas mixture is supplied to the processing chamber once a threshold thickness has been reached in order to deposit an epitaxial Ge cap layer which further minimizes the propensity for contamination of the surface with oxygen or other atmospheric contaminants upon being removed from the processing chamber. Moreover, once the wafer boat is returned to the processing chamber a person of ordinary skill in the art prior to the effective filing date of the invention would be motivated to perform a thermal treatment which removes the Ge cap layer and any oxide layer formed thereupon before commencing epitaxial growth in order to yield a clean and fully crystalline surface suitable for the formation of a higher quality epitaxial layer thereupon.
Regarding claim 21, Van Aerde, Huusen, and Zheng do not teach that a thickness of the additional epitaxial layer is in a range of 1 nm to 10 nm. However, in at least ¶[0009] Sanchez teaches that the Ge cap layer typically has a thickness in the range of 20 to 40 Å (i.e., 2 to 4 nm) which falls within the claimed range. Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would be motivated to utilize a Ge cap layer having a thickness of 2 to 4 nm in order to adequately cover and protect the underlying surface from contamination upon being unloaded from the processing chamber.
Claim 22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Van Aerde in view of Huusen and further in view of Zheng alone or, alternatively, still further in view of the AmesWeb Table of Specific Heat Capacities, accessed on January 8, 2026, at https://amesweb.info/Materials/Specific-Heat-Capacity-of-Gas.aspx, copyright 2013-2026 (“the Specific Heat Table”).
Regarding claim 22, Van Aerde and Huusen do not explicitly teach that the cooling gas has a specific heat capacity that is higher than N2. However, in ¶[0039] and ¶[0045] Zheng teaches that the FFU (91) supplies an inert gas such as N2 in order to cool the substrate and provide an ultrapure environment for substrate loading and unloading. Then in at least ¶[0040] Van Aerde teaches that known inert gases include N2, Ar, He, or combinations thereof. Accordingly, a person of ordinary skill in the art prior to the effective filing date of the invention would be motivated to utilize an inert gas such as He as the cooling gas in the method of Van Aerde and Huusen since this would involve nothing more than the use of a known equivalent suitable for the same purpose. It is prima facie obvious to combine or substitute known equivalents for the same purpose. See MPEP 2144.06. Moreover, since He is known in the art to have a higher specific heat capacity than N2 (see, for example, the Table of Specific Heat Capacities, accessed on January 8, 2026, at https://amesweb.info/Materials/Specific-Heat-Capacity-of-Gas.aspx) a person of ordinary skill in the art prior to the effective filing date of the invention would be motivated to utilize He in place of N2 as the cooling gas in order to promote more efficient and rapid cooling of the substrates.
Alternatively, the Specific Heat Table lists the heat capacity of known and readily available gases such as Ar, He, Ne, H2, H2O, and N2. From among these, He, Ne, H2, and H2O have heat capacity CP which is higher than N2. Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the Specific Heat Table and would be motivated to utilize one or more gases such as He, Ne, H2, and H2O as the cooling gas in place of N2 in the method of Zheng due to their higher specific heat capacity in order to promote more efficient cooling of the substrates.
Response to Arguments
Applicants’ arguments filed March 20, 2026, have been fully considered, but they are not persuasive and are moot in view of the new grounds of rejection set forth in this Office Action which were necessitated by applicants’ claim amendments.
Applicants initially argue that since Zhen teaches cooling the wafers as a final, one-time step before the wafers are transferred out of the processing system there is no teaching or suggestion for cooling the wafers with a cooling gas as a repeated operation performed between multiple deposition cycles. See applicants’ 3/20/2026 reply, p. 8. Applicants’ argument is noted, but is unpersuasive as it amounts to arguing against the references individually. In this case it is Huusen rather than Zheng that is relied upon to teach performing steps (a) through (d) repeatedly. Since the aspect relating to flowing a cooling gas over the substrate is a part of step (d), a PHOSITA would repeat this aspect when performing steps (a) through (d) repeatedly as per the teachings of Huusen.
Applicants then argue that the stated motivations to combine are not supported by the cited references. Id. This argument is not found persuasive as prior art is not limited just to the references being applied, but includes the understanding of one of ordinary skill in the art. The “mere existence of differences between the prior art and an invention does not establish the invention’s nonobviousness.” Dann v. Johnston, 425 U.S. 219, 230, 189 USPQ 257, 261 (1976). See also MPEP 2141(III). In this case Zheng specifically teaches that cooling of the wafers (W) contained within a wafer boat (50) is promoted by flowing a horizontal gas stream comprised of an inert gas over the surface of the wafers (W). By providing a constantly moving cooling gas stream across a wafer this not only promotes cooling, but also helps prevent particles from settling and adhering to surfaces which therefore promotes more efficient cooling and produces a cleaner environment and a PHOSITA would be motivated to flow a cooling gas over wafers contained within the wafer boat in step (d) of the method of Van Aerde and Huusen for this purpose. Moreover, by promoting faster cooling through the use of a cooling gas it is possible to perform the method of steps (a)-(d) as taught by the combination of Van Aerde and Huusen in a shorter period of time as the time required for a wafer, including the wafer boat itself, to cool down to a temperature at which it may be safely handled is reduced.
Applicants’ arguments with respect to the rejection of claim 3 are noted (see applicants’ 3/20/2026 reply, p. 9), but are moot in view of the new grounds of rejection set forth in this office Action which were necessitated by applicants’ claim amendments.
Applicants argue against the rejection of claim 23 by contending that Huusen teaches applying a temperature deviation of at least 50 °C from the deposition temperature while the wafer boat remains in the vertical furnace, not cooling by flowing a cooling gas and that the mechanism for preventing sticking is fundamentally different from the claimed method of detaching via cooling. Id. at p. 9. This argument is not found persuasive as it again amounts to arguing against the references individually. In this case it is Zheng rather than Huusen that is relied upon to teach the use of a cooling gas to facilitate cooling of the wafers and, by extension, the wafer boat. It is also noted that even if Huusen has an alternative method of preventing issues due to the wafer sticking to the boat, this does not amount to a teaching away from other, allegedly non-preferred methods. Disclosed examples and preferred embodiments do not constitute a teaching away from a broader disclosure or nonpreferred embodiments. In re Susi, 440 F.2d 442, 169 USPQ 423 (CCPA 1971).
Applicants then argue that the Examiner’s position that cooling would necessarily cause detachment is unsupported speculation and contend that it is a possible rather than a necessary result. Id. at p. 10. Applicants’ argument is noted, but is unpersuasive. It is noted that since the method taught by the combination of Van Aerde, Huusen, and Zheng performs each and every step of the claimed process it must produce the same results, namely that of detachment of the substrate from the wafer boat via cooling. In this case since the wafer boat and wafer have different coefficients of thermal expansion (i.e., quartz vs. silicon) and both the wafer boat and wafers are cooled as taught by Zheng then there must at least be some amount of detachment occurring as a result due to the quartz cooling (or expanding) at a different rate than silicon. It is axiomatic that one who performs the steps of the known process must necessarily produce all of its advantages. Mere recitation of a newly discovered function or property, that is inherently possessed by things in the prior art does not cause a claim drawn to these things to distinguish over the prior art. Therefore, detachment of at least one substrate from the wafer boat via cooling of the substrates, if not clearly envisaged, would be reasonably expected by the skilled artisan. See Leinoff v. Louis Milona & Sons, Inc. 220 USPQ 845 (CAFC 1984).
Applicants’ comments regarding claims 6, 9-14, and 20-21 are noted. See applicants’ 3/20/2026 reply, pp. 10-11. However, since it is the Examiner’s position that each and every limitation recited in these claims is taught by the cited prior art and there are no deficiencies in utilizing their teachings in combination, the Examiner has therefore properly set forth a prima facie case of obviousness for these claims.
Finally, applicants argue against the rejection of claim 22 by contending that the use of N2 and He as carrier gases or reducing agents within the chamber does not make it obvious to use these gases as cooling gases outside the chamber and the mere fact that He is an inert gas does not provide the motivation to use it for cooling based on its higher heat capacity. Id. at pp. 11-12. Applicants’ arguments are noted, but are unpersuasive. As explained supra with respect to the rejection of claim 22, since ¶[0045] of Zheng teaches the use of an inert gas as a cooling gas while ¶[0040] of Van Aerde teaches that He is a known inert gas, the use of He as a cooling gas would therefore involve nothing more than the use of a known material according to its intended use. Even if He is used for a different purpose in Van Aerde this does not take away from the fact that it is a known inert gas and that inert gases can be used for other purposes, such as a cooling gas. Since He has a higher heat capacity than N2, its use as an inert cooling gas in the method of Zheng therefore meets the claim. Moreover, since the heat capacity of gas determines its effectiveness as a cooling gas it is self-evident that a gas with a higher heat capacity will more efficiently function as a cooling gas and an ordinary artisan would be motivated to use gases with a higher heat capacity for that purpose.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/KENNETH A BRATLAND JR/Primary Examiner, Art Unit 1714
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