Prosecution Insights
Last updated: April 19, 2026
Application No. 18/153,532

Semiconductor Device and Method of Manufacture

Non-Final OA §103
Filed
Jan 12, 2023
Examiner
VU, HUNG K
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Co., Ltd.
OA Round
6 (Non-Final)
88%
Grant Probability
Favorable
6-7
OA Rounds
2y 8m
To Grant
97%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allow Rate
861 granted / 984 resolved
+19.5% vs TC avg
Moderate +9% lift
Without
With
+9.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
30 currently pending
Career history
1014
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
42.0%
+2.0% vs TC avg
§102
40.1%
+0.1% vs TC avg
§112
11.4%
-28.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 984 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Request for Continued Examination A request for continued examination (RCE) under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant’s submission filed on 11/03/2025 has been entered. An action on the RCE follows. Claim Rejections - 35 USC § 103 1. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-3 and 5-7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Refai-Ahmed et al. (US 2018/0308783, of record) in view of Parida et al. (US 2019/0348345, of record). Regarding claim 1, Refai-Ahmed et al. discloses, as shown in Figures 1-2, 5 and 8-9, a method of manufacturing a semiconductor device comprising: placing a vapor chamber lid (102,202,802,902) over a semiconductor device (114) and a substrate (122, [0028]), the vapor chamber lid has a first planar surface facing the semiconductor device and has a second planar surface facing away from the semiconductor device (note [0027] and [0043], Refai-Ahmed et al. discloses one or more fins 150 may extend from the top surface 150 or the bottom surface 170, so it may not be there, or as shown in Figures 8-9), the first planar surface and the second planar surface each extending from a first side (left) of the vapor chamber lid to a second side (on the right) of the vapor chamber lid opposite the first side, wherein the first side and the second side are parallel to each other and perpendicular to the first planar surface and the second planar surface, wherein the first side intersects with both the first planar surface and the second planar surface (note the mark-up Figure 9 below); and placing a thermally conductive ring (154) on the substrate, wherein the placing the vapor chamber lid further comprises arranging at least part of the vapor chamber lid over the thermally conductive ring, overlying portion facing and being separated from uppermost surfaces of the thermally conductive ring by a gap. Refai-Ahmed et al. does not disclose the vapor chamber lid comprises a chamber with vapor inside the chamber. However, Parida et al. discloses a vapor chamber lid (100,300-700) comprises a chamber (112,312,612) with vapor inside the chamber. Note [0031]-[0036], [0041]-[0045] and Figures 1-7 of Parida et al. Therefore, it would have been obvious to one of ordinary skills in the art at the time the invention was made to form the vapor chamber lid of Refai-Ahmed et al. comprising a chamber with vapor inside the chamber, such as taught by Parida et al. in order to efficiently and effectively transfer heat from the semiconductor device [0028]. [AltContent: rect] [AltContent: arrow][AltContent: rect][AltContent: rect] [AltContent: ][AltContent: ] [AltContent: rect][AltContent: arrow] PNG media_image1.png 200 400 media_image1.png Greyscale Regarding claim 2, Refai-Ahmed et al. and Parida et al. disclose the semiconductor device comprises: an interposer (112); a first semiconductor die (114) bonded to the interposer; and a second semiconductor die (114, at least one or more IC dice, [0028], Figure 9) bonded to the interposer. Regarding claims 3 and 5-6, Refai-Ahmed et al. and Parida et al. disclose the ring and the substrate but fails to disclose the distance, the width and the height of the substrate. However, the selection of these parameters such as energy, concentration, temperature, time, speed, molar fraction, depth, thickness, distance, width, height, etc., would have been obvious and involve routine optimization which has been held to be within the level of ordinary skill in the art. "Normally, it is to be expected that a change in energy, concentration, temperature, time, molar fraction, depth, thickness, distance, width, height, etc., or in combination of the parameters would be an unpatentable modification. Under some circumstances, however, changes such as these may impart patentability to a process if the particular ranges claimed produce a new and unexpected result which is different in kind and not merely degree from the results of the prior art... such ranges are termed "critical ranges and the applicant has the burden of proving such criticality.... More particularly, where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Alter 105 USPQ233, 255 (CCPA 1955). See also In re Waite 77 USPQ 586 (CCPA 1948); In re Scherl 70 USPQ 204 (CCPA 1946); In re Irmscher 66 USPQ 314 (CCPA 1945); In re Norman 66 USPQ 308 (CCPA 1945); In re Swenson 56 USPQ 372 (CCPA 1942); In re Sola 25 USPQ 433 (CCPA 1935); In re Dreyfus 24 USPQ 52 (CCPA 1934). Regarding claim 7, Refai-Ahmed et al. and Parida et al. disclose the thermally conductive ring comprises aluminum [0031]. 2. Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Refai-Ahmed et al. (US 2018/0308783, of record) in view of Parida et al. (US 2019/0348345, of record) and further in view of Edwards et al. (US 2011/0042784, of record). Refai-Ahmed et al. and Parida et al. disclose the claimed invention including the method as explained in the above rejection. Refai-Ahmed et al. and Parida et al. do not disclose the thermally conductive ring has a thickness of between about 0.5 mm and about 3 mm. However, Edwards et al. discloses a thermally conductive ring (140) has a thickness of between about 0.5 mm and about 3 mm (within the range of 0.025 and 4.0 mm, [0034]). Therefore, it would have been obvious to one of ordinary skills in the art at the time the invention was made to form the thermally conductive ring of Refai-Ahmed et al. and Parida et al. having the thickness as claimed, such as taught by Edwards et al. in order to have the desired structure. Allowable Subject Matter 3. Claims 8-20 are allowed. 4. The following is a statement of reasons for the indication of allowable subject matter: Applicant' s claims 8-20 are allowable over the references of record because none of these references disclose or can be combined to yield the claimed method of manufacturing a semiconductor device comprising a vapor chamber heat spreader having a first surface facing the substrate and extending from a first side of the vapor chamber heat spreader to a second side of the vapor chamber heat spreader, each portion of the first surface is a same distance from the interposer, and the first side and the second side are perpendicular to the first surface and the first side and the second side are located aligned with the ring, in combination with the remaining claimed limitations of claim 8; none of these references disclose or can be combined to yield the claimed method of manufacturing a semiconductor device comprising the vapor chamber cap comprising a chamber that encloses a vapor and a wick, each portion of the vapor chamber cap remains further away from the substrate than the ring, and the vapor chamber cap comprises four outermost surfaces, at least two of the outermost surfaces being aligned with the ring, in combination with the remaining claimed limitations of claim 15. Response to Arguments 5. Applicant's arguments filed 09/02/2025 have been fully considered but they are not persuasive. It is argued, at pages 6-7 of the Remarks, that Refai-Ahmed et al. does not disclose the first side and the second side are parallel to each other and perpendicular to the first planar surface and the second planar surface, wherein the first side intersects with both the first planar surface and the second planar surface. This argument is not convincing because Refai-Ahmed et al. discloses, as shown in the mark-up Figure 9 above, the first side and the second side are parallel to each other and perpendicular to the first planar surface and the second planar surface, and the first side intersects with both the first planar surface and the second planar surface. Therefore, Applicant’s claim 1 does not overcome the rejection of Refai-Ahmed et al. in view of Parida et al. references. Conclusion 6. Any inquiry concerning this communication or earlier communications from the examiner should be directed to HUNG K VU whose telephone number is (571)272-1666. The examiner can normally be reached Monday - Friday: 7am - 5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, JACOB CHOI can be reached at (469) 295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /HUNG K VU/ Primary Examiner, Art Unit 2897
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Prosecution Timeline

Jan 12, 2023
Application Filed
Dec 11, 2023
Non-Final Rejection — §103
Mar 12, 2024
Response Filed
Jun 15, 2024
Final Rejection — §103
Aug 21, 2024
Response after Non-Final Action
Aug 26, 2024
Response after Non-Final Action
Sep 04, 2024
Request for Continued Examination
Sep 06, 2024
Response after Non-Final Action
Sep 07, 2024
Non-Final Rejection — §103
Dec 09, 2024
Response Filed
Mar 22, 2025
Final Rejection — §103
May 27, 2025
Response after Non-Final Action
Jun 27, 2025
Final Rejection — §103
Sep 02, 2025
Response after Non-Final Action
Nov 03, 2025
Request for Continued Examination
Nov 08, 2025
Response after Non-Final Action
Dec 11, 2025
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

6-7
Expected OA Rounds
88%
Grant Probability
97%
With Interview (+9.3%)
2y 8m
Median Time to Grant
High
PTA Risk
Based on 984 resolved cases by this examiner. Grant probability derived from career allow rate.

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