Prosecution Insights
Last updated: July 17, 2026
Application No. 18/154,017

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

Non-Final OA §102§103
Filed
Jan 12, 2023
Priority
Sep 08, 2022 — provisional 63/375,052
Examiner
BELOUSOV, ALEXANDER
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
2 (Non-Final)
76%
Grant Probability
Favorable
2-3
OA Rounds
0m
Est. Remaining
93%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allowance Rate
396 granted / 519 resolved
+8.3% vs TC avg
Strong +16% interview lift
Without
With
+16.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
25 currently pending
Career history
544
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
90.0%
+50.0% vs TC avg
§102
8.1%
-31.9% vs TC avg
§112
1.3%
-38.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 519 resolved cases

Office Action

§102 §103
DETAILED ACTION Allowable Subject Matter Claims 8-17 & 21-23 are allowed. The following is an examiner’s statement of reasons for allowance. The prior art of record, taken singly or in combination, does not disclose the totality of limitations of claims 8 & 21. To elaborate briefly on the above, claims 8 & 21 essentially require 2 sets of diodes: a lower set and an upper set, together with other limitations. The primary reference of Lee teaches only an upper set of diodes. The lower layers do not contain diodes or photodiodes, explicitly. Furthermore, Examiner is unsure how to argue for obviousness of combination, even if secondary reference was to teach it, since the primary reference of Lee teaches a diode that is simultaneously a color filter and a photodiode. Thus, it would not make sense to split it into separate diodes to achieve both functions. Hence, claims 8 & 21 are indicated as allowable. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-2 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by (US-2021/0126142) by Lee et al (“Lee”). Regarding claim 1, Lee discloses in FIG. 3 and related text, e.g., a semiconductor device, comprising: a substrate (S1); and a wafer (layers 141 and up; see FIG. 10B and on; “Wafer bonding” is explicitly taught; the layers that become part of the wafer above the substrate are added in FIG. 10B) disposed on the substrate, and comprising: a p-doped layer (141; see par. 105 and related text); a first diode (NR1) disposed on the p-doped layer; a second diode (NR2) disposed on the p-doped layer; a third diode (NR3) disposed on the p-doped layer; and a dielectric layer (170) disposed on the substrate and covering the first, second, and third diodes (see FIG. 3), wherein the first, second, and third diodes are disposed side by side (see FIG. 3). Regarding claim 2, Lee discloses in FIG. 3 and related text, e.g., wherein the first diode comprises a p-doped silicon layer (110; par. 105), an intrinsic silicon layer (120, par. 83) disposed on the p-doped silicon layer, and an n-doped silicon layer (130, par. 83) disposed on the intrinsic silicon layer; the second diode comprises a p-doped silicon layer, an intrinsic silicon layer disposed on the p-doped silicon layer, and an n-doped silicon layer disposed on the intrinsic silicon layer (same as NR1); and the third diode comprises a p-doped silicon layer, an intrinsic silicon layer disposed on the p-doped silicon layer, and an n-doped silicon layer disposed on the intrinsic silicon layer (same as NR1). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 3-7 are rejected under 35 U.S.C. 103 as being unpatentable over (US-2021/0126142) by Lee et al (“Lee”). Regarding claim 3, Lee discloses in FIG. 3 and related text, e.g., substantially the entire claim structure, as recited in above claims, but does not explicitly state “wherein a thickness of the p-doped silicon layer of the first diode, a thickness of the intrinsic silicon layer of the first diode, and a thickness of the n-doped silicon layer of the first diode are different from one another”. It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the device of Lee with “wherein a thickness of the p-doped silicon layer of the first diode, a thickness of the intrinsic silicon layer of the first diode, and a thickness of the n-doped silicon layer of the first diode are different from one another”, in order to achieve desired electrical performance and physical dimensions (desired doping concentration is specified in par. 98; par. 97 makes clear that thickness depends heavily on chosen dopant type (designer’s choice); the thickness of layers can vary heavily (par. 152); the concentration of dopants may also vary heavily (par. 152); thickness of layer is heavily dependent on what is desired (par. 161); in short, the respective thicknesses of layers are a matter of electrical performance and physical dimensions). It would have been an obvious matter of choice to choose relative layer thicknesses, since such a modification would have involved a mere change in the size of the component. A change of size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955). When the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 105 USPQ 233,235 (CCPA 1955). More precisely, relative layer thicknesses is among many other variable parameters that has been a matter of routine optimization. One of ordinary skill in the art would know that relative layer thicknesses affects device properties and depending on the desired device properties, one of ordinary skill in the art would have been led to the recited relative layer thicknesses through routine experimentation, in order to achieve the desired performance. Applicant can rebut a prima facie case of obviousness based on overlapping ranges by showing unexpected results or the criticality of the claimed range. "The law is replete with cases in which the difference between the claimed invention and the prior art is some range or other variable within the claims ... In such a situation, the applicant must show that the particular range is critical, generally by showing that the claimed range achieves unexpected results relative to the prior art range." In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990). See MPEP § 716.02 - § 716.02(g) for a discussion of criticality and unexpected results. Regarding claim 4, Lee discloses in FIG. 3 and related text, e.g., substantially the entire claim structure, as recited in above claims, but does not explicitly state “wherein the thickness of the p-doped silicon layer of the first diode is less than the thickness of the intrinsic silicon layer of the first diode, and the thickness of the intrinsic silicon layer of the first diode is greater than the thickness of the n-doped silicon layer of the first diode”. It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the device of Lee with “wherein the thickness of the p-doped silicon layer of the first diode is less than the thickness of the intrinsic silicon layer of the first diode, and the thickness of the intrinsic silicon layer of the first diode is greater than the thickness of the n-doped silicon layer of the first diode”, in order to achieve desired electrical performance and physical dimensions (desired doping concentration is specified in par. 98; par. 97 makes clear that thickness depends heavily on chosen dopant type (designer’s choice); the thickness of layers can vary heavily (par. 152); the concentration of dopants may also vary heavily (par. 152); thickness of layer is heavily dependent on what is desired (par. 161); in short, the respective thicknesses of layers are a matter of electrical performance and physical dimensions). It would have been an obvious matter of choice to choose relative layer thicknesses, since such a modification would have involved a mere change in the size of the component. A change of size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955). When the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 105 USPQ 233,235 (CCPA 1955). More precisely, relative layer thicknesses is among many other variable parameters that has been a matter of routine optimization. One of ordinary skill in the art would know that relative layer thicknesses affects device properties and depending on the desired device properties, one of ordinary skill in the art would have been led to the recited relative layer thicknesses through routine experimentation, in order to achieve the desired performance. Applicant can rebut a prima facie case of obviousness based on overlapping ranges by showing unexpected results or the criticality of the claimed range. "The law is replete with cases in which the difference between the claimed invention and the prior art is some range or other variable within the claims ... In such a situation, the applicant must show that the particular range is critical, generally by showing that the claimed range achieves unexpected results relative to the prior art range." In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990). See MPEP § 716.02 - § 716.02(g) for a discussion of criticality and unexpected results. Regarding claim 5, Lee discloses in FIG. 3 and related text, e.g., substantially the entire claim structure, as recited in above claims, but does not explicitly state “wherein a thickness of the p-doped silicon layer of the first diode, a thickness of the intrinsic silicon layer of the first diode, and a thickness of the n-doped silicon layer of the first diode are identical to one another”. It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the device of Lee with “wherein a thickness of the p-doped silicon layer of the first diode, a thickness of the intrinsic silicon layer of the first diode, and a thickness of the n-doped silicon layer of the first diode are identical to one another”, in order to achieve desired electrical performance and physical dimensions (desired doping concentration is specified in par. 98; par. 97 makes clear that thickness depends heavily on chosen dopant type (designer’s choice); the thickness of layers can vary heavily (par. 152); the concentration of dopants may also vary heavily (par. 152); thickness of layer is heavily dependent on what is desired (par. 161); in short, the respective thicknesses of layers are a matter of electrical performance and physical dimensions). It would have been an obvious matter of choice to choose relative layer thicknesses, since such a modification would have involved a mere change in the size of the component. A change of size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955). When the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 105 USPQ 233,235 (CCPA 1955). More precisely, relative layer thicknesses is among many other variable parameters that has been a matter of routine optimization. One of ordinary skill in the art would know that relative layer thicknesses affects device properties and depending on the desired device properties, one of ordinary skill in the art would have been led to the recited relative layer thicknesses through routine experimentation, in order to achieve the desired performance. Applicant can rebut a prima facie case of obviousness based on overlapping ranges by showing unexpected results or the criticality of the claimed range. "The law is replete with cases in which the difference between the claimed invention and the prior art is some range or other variable within the claims ... In such a situation, the applicant must show that the particular range is critical, generally by showing that the claimed range achieves unexpected results relative to the prior art range." In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990). See MPEP § 716.02 - § 716.02(g) for a discussion of criticality and unexpected results. Regarding claim 6, Lee discloses in FIG. 3 and related text, e.g., substantially the entire claim structure, as recited in above claims, but does not explicitly state “wherein the thickness of the p-doped silicon layer of the second diode is greater than a thickness of the p-doped silicon layer of the first diode, the thickness of the intrinsic silicon layer of the second diode is less than a thickness of the intrinsic silicon layer of the first diode, and the thickness of the n-doped silicon layer of the second diode is greater than a thickness of the n-doped silicon layer of the first diode”. It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the device of Lee with “wherein the thickness of the p-doped silicon layer of the second diode is greater than a thickness of the p-doped silicon layer of the first diode, the thickness of the intrinsic silicon layer of the second diode is less than a thickness of the intrinsic silicon layer of the first diode, and the thickness of the n-doped silicon layer of the second diode is greater than a thickness of the n-doped silicon layer of the first diode”, in order to achieve desired electrical performance and physical dimensions (desired doping concentration is specified in par. 98; par. 97 makes clear that thickness depends heavily on chosen dopant type (designer’s choice); the thickness of layers can vary heavily (par. 152); the concentration of dopants may also vary heavily (par. 152); thickness of layer is heavily dependent on what is desired (par. 161); in short, the respective thicknesses of layers are a matter of electrical performance and physical dimensions). It would have been an obvious matter of choice to choose relative layer thicknesses, since such a modification would have involved a mere change in the size of the component. A change of size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955). When the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 105 USPQ 233,235 (CCPA 1955). More precisely, relative layer thicknesses is among many other variable parameters that has been a matter of routine optimization. One of ordinary skill in the art would know that relative layer thicknesses affects device properties and depending on the desired device properties, one of ordinary skill in the art would have been led to the recited relative layer thicknesses through routine experimentation, in order to achieve the desired performance. Applicant can rebut a prima facie case of obviousness based on overlapping ranges by showing unexpected results or the criticality of the claimed range. "The law is replete with cases in which the difference between the claimed invention and the prior art is some range or other variable within the claims ... In such a situation, the applicant must show that the particular range is critical, generally by showing that the claimed range achieves unexpected results relative to the prior art range." In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990). See MPEP § 716.02 - § 716.02(g) for a discussion of criticality and unexpected results. Regarding claim 7, Lee discloses in FIG. 3 and related text, e.g., substantially the entire claim structure, as recited in above claims, but does not explicitly state “wherein the thickness of the p-doped silicon layer of the second diode is less than a thickness of the p-doped silicon layer of the third diode, the thickness of the intrinsic silicon layer of the second diode is greater than a thickness of the intrinsic silicon layer of the third diode, and the thickness of the n-doped silicon layer of the second diode is less than a thickness of the n-doped silicon layer of the third diode”. It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the device of Lee with “wherein the thickness of the p-doped silicon layer of the second diode is less than a thickness of the p-doped silicon layer of the third diode, the thickness of the intrinsic silicon layer of the second diode is greater than a thickness of the intrinsic silicon layer of the third diode, and the thickness of the n-doped silicon layer of the second diode is less than a thickness of the n-doped silicon layer of the third diode”, in order to achieve desired electrical performance and physical dimensions (desired doping concentration is specified in par. 98; par. 97 makes clear that thickness depends heavily on chosen dopant type (designer’s choice); the thickness of layers can vary heavily (par. 152); the concentration of dopants may also vary heavily (par. 152); thickness of layer is heavily dependent on what is desired (par. 161); in short, the respective thicknesses of layers are a matter of electrical performance and physical dimensions). It would have been an obvious matter of choice to choose relative layer thicknesses, since such a modification would have involved a mere change in the size of the component. A change of size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955). When the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 105 USPQ 233,235 (CCPA 1955). More precisely, relative layer thicknesses is among many other variable parameters that has been a matter of routine optimization. One of ordinary skill in the art would know that relative layer thicknesses affects device properties and depending on the desired device properties, one of ordinary skill in the art would have been led to the recited relative layer thicknesses through routine experimentation, in order to achieve the desired performance. Applicant can rebut a prima facie case of obviousness based on overlapping ranges by showing unexpected results or the criticality of the claimed range. "The law is replete with cases in which the difference between the claimed invention and the prior art is some range or other variable within the claims ... In such a situation, the applicant must show that the particular range is critical, generally by showing that the claimed range achieves unexpected results relative to the prior art range." In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990). See MPEP § 716.02 - § 716.02(g) for a discussion of criticality and unexpected results. Conclusion Additional references (if any) are cited on the PTO-892 as disclosing similar features to those of the instant invention. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Alexander Belousov whose telephone number is (571)-272-3167. The examiner can normally be reached on 10 am-4 pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Jeff Natalini can be reached on 571-272-2266. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Alexander Belousov/Patent Examiner, Art Unit 2894 06/26/26 /Mounir S Amer/Primary Examiner, Art Unit 2818
Read full office action

Prosecution Timeline

Jan 12, 2023
Application Filed
Nov 05, 2025
Non-Final Rejection mailed — §102, §103
Feb 08, 2026
Response Filed
Jul 01, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

2-3
Expected OA Rounds
76%
Grant Probability
93%
With Interview (+16.5%)
2y 11m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 519 resolved cases by this examiner. Grant probability derived from career allowance rate.

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