Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Attorney Docket Number: 18506-2369
Filling Date: 1/13/2023
Inventor: Chou et al
Examiner: Bilkis Jahan
DETAILED ACTION
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 11/27/25 has been entered.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-3 and 4 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Horikoshi (US 2005/0052938 A1).
Regarding clam 1, Horikoshi discloses a semiconductor structure 82 (Fig. 5), comprising: a first substrate 71 (Para. 140), having a top surface; a first conductive layer101 (Para. 128), vertically inserted into the first substrate 71 from the top surface of the first substrate; a first magnetic layer 83 (Para. 123), disposed in the first substrate 71 and surrounding the first conductive layer 101; a second magnetic layer 2 (Para. 142), disposed over the first conductive layer 101 and the first magnetic layer 83; and a first dielectric material 108 (Para. 42) separating the second magnetic layer 2 at a location vertically overlapping the first conductive layer 101.
Regarding clam 2, Horikoshi discloses the semiconductor structure of claim 1, further comprising: a second substrate 110, bonded to the first substrate 71 over the top surface of the first substrate 71; a second conductive layer 113, vertically inserted into the second substrate 110 and aligned with the first conductive layer 101; and a third magnetic layer 115, disposed in the second substrate 110 and surrounding (surrounding two sides) the second conductive layer 113.
Regarding clam 3, Horikoshi discloses the semiconductor structure of claim 2, wherein the second magnetic layer 2 is disposed between the first conductive layer 101 and the second conductive layer 113.
Regarding clam 4, Horikoshi discloses the semiconductor structure of claim 1, further comprising a second dielectric material 3 (Para. 142) between the first magnetic layer 83 and the second magnetic layer 2.
Claim(s) 1, 5 and 6 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Webb (US 2013/0093032 A1).
Regarding claim 1, Webb discloses a semiconductor structure (Fig. 2), comprising: a first substrate 110 (Para. 24), having a top surface (top surface); a first conductive layer 125 (Para. 47), vertically inserted into the first substrate 110 from the top surface of the first substrate 110; a first magnetic layer 123 (Para. 33), disposed in the first substrate 110 and surrounding the first conductive layer 125; and a second magnetic layer 164 (Para. 47), disposed over the first conductive layer 125 and the first magnetic layer 123; and a first dielectric material 162 (Para. 47) separating the second magnetic layer 164 at a location vertically overlapping the first conductive layer 125.
Regarding clam 5, Webb discloses the semiconductor structure of claim 1, further comprising a dielectric layer 162 (Para. 47) separating the first magnetic layer 123 from the first conductive layer 125.
Regarding claim 6, Webb discloses the semiconductor structure of claim 5, wherein the dielectric layer 162 further separates the first magnetic layer 123 from the second magnetic layer 164.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Webb (US 2013/0093032 A1).
Regarding claim 7, Webb does not explicitly disclose in the embodiment of figure 2, the semiconductor structure of claim 1, wherein a portion of the first conductive layer protrudes from the top surface of the first substrate.
However, Webb discloses in the embodiment of figure 5, a portion of the first conductive layer 225 (Paras. 39, 40) protrudes from the top surface of the first substrate 210 (Para. 48).
Webb teaches the above modification is used to increase storage energy density of the device (Abstract). It would have been obvious to one of the ordinary skill of the art before the effective filling date of the claimed invention to substitute Webb Fig. 2 first conductive layer with Webb Fig. 5 first conductive layer as suggested above to increase storage energy density of the device (Abstract).
Allowable Subject Matter
Claims 8-19 and 20 are allowed.
Response to Arguments
Applicant's arguments filed 11/27/2025 have been fully considered but they are moot.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BILKIS JAHAN whose telephone number is (571)270-5022. The examiner can normally be reached Monday-Friday, 8:00 am-5 Pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Marlon T Fletcher can be reached at (571)272-2063. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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BILKIS . JAHAN
Primary Examiner
Art Unit 2817
/BILKIS JAHAN/Primary Examiner, Art Unit 2817