DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on April 20, 2026 has been entered.
Response to Arguments
Applicant’s amendments necessitated the shift in grounds of rejection detailed below. The shift in grounds of rejection renders Applicant’s arguments moot.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-16,18-25 is/are rejected under 35 U.S.C. 103 as being unpatentable over Mallik et al. (US 20200395313 A1; Mallik) in view of Shih (US-20210050327-A1; Shih).
Regarding claim 1, Mallik discloses a module comprising: a component carrier (Fig. 6, 630/640/532/531; ¶57,69-70,95) with a stack (Fig. 6, 600; ¶69-70) comprising at least one electrically conductive layer (Fig. 6, vias not labeled in 630; ¶69-70, described in ¶35) structure and at least one electrically insulating layer (Fig. 6, 630; ¶69-70) structure, and with at least one bridging component (Fig. 6, 640; ¶69-70) embedded in the stack, wherein the bridging component comprises a first main surface (top or bottom) and a second main surface (top or bottom), one opposite to the other and,.. first contacting areas (location of unlabeled bump pads) provided on the first main surface (top and second contacting areas (location of unlabeled bump pads) provided on the second main surface (bottom), the first contacting areas being connected to the second contacting areas through respective connection elements (unlabeled through vias) provided in the bridging component, wherein at least one of the first or second contacting area is directly or indirectly connected to at least two electronic components. (Fig. 6, 620; ¶69-70)
Mallik’s figure 6 is compatible with embodiments of Figs. 1A-5M (¶70). Hereinafter, they will be used to define components not labeled in Fig. 6.
Mallik is silent on a redistribution structure between the first main surface and the second main surface. Mallik discloses the may comprise high density multi-die interconnect bridge dies but does not describe an interconnect structure. Shih describes a redistribution structure.
Shih discloses a multi-chip package structure comprising a bridging component (Fig. 11,101; ¶57) with a redistribution structure (Fig. 3C, 200; ¶52) between first (top or bottom) and second (top or bottom) main surfaces.
Before the effective filing date of the invention it would have been obvious to one having ordinary skill in the art to combine a redistribution structure with the bridging component for forming high-density interconnect wiring for chip-to-chip connections.
Regarding claim 2, Mallik in view of Shih discloses the module according to claim 1, wherein the component carrier (Fig. 6, 630/640/532/531; ¶57,69-70,95) comprises two component carrier main surfaces (top and bottom), the first and second main surfaces of the bridging component (Fig. 6, 640; ¶69-70) are directly connected (by through vias) to a respective one of the component carrier main surfaces.(top)
Regarding claim 3, Mallik in view of Shih discloses the module according to claim 1, wherein solder balls (Fig. 6, 685; ¶69-70) are provided on at least one of the component carrier (Fig. 6, 630/640; ¶69-70,95) main surfaces (top), the solder balls being directly or indirectly connected to at least one of the first or second contacting area of the respective bridging component (Fig. 6, 640; ¶69-70) main surface.
Regarding claim 4, Mallik in view of Shih discloses the module according to claim 1, wherein a density per volume unit or area unit (Fig. 6, pad distribution 684 and associating bridge wiring; ¶69-70) of a contacting area of the first main surface (top) of the bridging component (Fig. 6, 640; ¶69-70) is different (clear from drawing) from a density per volume unit or area unit of a contacting area of the second main surface (bottom) of the bridging component.
Regarding claim 5, Mallik in view of Shih discloses the module according to claim 4, wherein a density per volume unit or area unit of the contacting area (Fig. 6, pad distribution 684 and associating bridge wiring; ¶69-70) of the first main surface (Fig. 6, top surface 640; ¶69-70), which is directly connected to at least one of the at least two electronic components (Fig. 6, 620; ¶69-70), is higher than a density of the contacting area (Fig. 6, bottom surface distribution of pads; ¶69-70) provided on the opposed second main surface.(bottom)
Applicant claims a main surface for the bridge and a component carrier main surface for the component carrier. Examiner interprets the main surface of claim 5 to be associated with the bridge.
Regarding claim 6, Mallik in view of Shih discloses the module according to claim 1, wherein the component carrier (Fig. 6, 630/640/532/531; ¶57,69-70,95) comprises at least two bridging components (Fig. 6, second horizontally aligned in the z direction 640; ¶69-70, See Fig. 3A 340;¶47) embedded in the stack.
Mallik discloses the package 600 may be substantially similar to the electronic packages described above, such as Fig. 1-5. Accordingly bridges 340 of Figure 3 are analogous to bridge 640.
Regarding claim 7, Mallik in view of Shih discloses the module according to claim 6, wherein at least one of the at least two electronic components (Fig. 6, 620; ¶69-70) in the component carrier (Fig. 6, 630/640/532/531; ¶57,69-70,95) is connected to the at least two bridging components. (Fig. 6A, 640; ¶69-70, See Fig. 3A, 320A connected to both bridges 340)
Mallik discloses the package 600 may be substantially similar to the electronic packages described above, such as Fig. 3A. Accordingly bridges 340 are analogous to bridge 640.
Regarding claim 8, Mallik in view of Shih discloses the module according to claim 7, wherein each of the at least two bridging components (Fig. 6A, 640; ¶69-70, See Fig. 3A, 320A connected to both bridges 340) comprises a first main surface (top), wherein the at least one of the at least two electronic components (Fig. 6A, 620; ¶69-70, See Fig. 3A, 320A connected to both bridges 340) is connected to each first main surface (top) of the at least two bridging components facing the same component carrier (Fig. 6, 630/640/532/531; ¶57,69-70,95) main surface.
Mallik discloses the package 600 may be substantially similar to the electronic packages described above, such as Fig. 3A. Accordingly bridges 340 are analogous to bridge 640.
Regarding claim 9, Mallik in view of Shih discloses the module according to claim 1, wherein the bridging component (Fig. 6A, 640; ¶69-70) is connected to a third electronic component. (Fig. 6A, 683; ¶69-70)
Since the claims do not claim what electronic components are it reasonable to interpret “electronic component” as a substrate, pad, or bump because they are all components in an electronic device.
Regarding claim 10, Mallik in view of Shih disclose the module according to claim 9, wherein the bridging component (Fig. 6A, 640; ¶69-70) is connected to the third electronic component (Fig. 6A, 683; ¶69-70) via the first main surface (top).
Regarding claim 11, Mallik in view of Shih discloses the module according to claim 1, wherein at least one of the at least two electronic components (Fig. 6A, 620; ¶69-70) is additionally connected to a further redistribution structure (¶95) directly provided in the component carrier. (Fig. 6A, 673; ¶69-70)
Regarding claim 12, Mallik in view of Shih discloses the module according to claim 1, wherein at least one of the at least two electronic components (Fig. 6A, 620; ¶69-70) is exclusively connected to the at least one bridging component (Fig. 6A, 640; ¶69-70).
Regarding claim 13, Mallik in view of Shih discloses the module according to claim 1, wherein at least one of the at least two electronic components (Fig. 6A, 620; ¶69-70) is partially connected to the bridging component. (Fig. 6A, 640; ¶69-70)
It is unclear what applicant means by partially connected. Either something is connected or it is not connected.
Regarding claim 14, Mallik in view of Shih discloses the module according to claim 1, wherein at least one of the at least two electronic components (Fig. 6A, 620; ¶69-70) is connected to a power conducting supplying structure (Fig. 6A, package substrate 673; ¶69-70, 42) for power supply to the at least one of the at least two electronic components.
Regarding claim 15, Mallik in view of Shih discloses the module according to claim 1, wherein the bridging component (Fig. 11,101; ¶57 Shih) comprises a matrix of dielectric or semiconductor material (¶27Shih) and the connection elements (Fig. 11, 208; ¶28 Shih) embedded in the matrix, which form the electrically conductive redistribution structure (Fig. 11, 200; ¶57 Shih) together with the first (top) and second (bottom) contacting areas, wherein a mean distance between the first contacting areas (top bridge contacts are more dense than lower bridge contacts) is different to a mean distance between the second contacting areas.
Paragraph 36 of Mallik discloses the nested component can be semiconductor devices or interconnect structures which comprise either semiconductor or dielectric matrix material.
Shih discloses a multi-chip package structure comprising a bridging component (Fig. 11,101; ¶57) with a redistribution structure (Fig. 3C, 200; ¶52) between first (top or bottom) and second (top or bottom) main surfaces.
Before the effective filing date of the invention it would have been obvious to one having ordinary skill in the art to combine a redistribution structure of Shih with the bridging component for forming high-density interconnect wiring for chip-to-chip connections.
Regarding claim 16, Mallik in view of Shih discloses the module according to claim 15, wherein the connection elements comprise at least two first horizontal electrically conductive redistribution structures (Fig. 11, 208; ¶52 Shih) in a x direction (left and right), at least two second horizontal electrically conductive redistribution structures in an y direction (Fig. 11, In three dimensions more pads 208 will be in the y direction ; ¶52 Shih), and at least two vertical electrically conductive redistribution structures in a z direction (Fig. 11, not labeled; ¶52 Shih); at least one of the first and second horizontal electrically conductive redistribution structures is electrically connected to at least one vertical electrically conductive redistribution structure.(Clear form drawings and associated text. If the redistribution are not connected to the vertical vias the device will not work.)
Before the effective filing date of the invention it would have been obvious to one having ordinary skill in the art to combine a redistribution structure of Shih with the bridging component for forming high-density interconnect wiring for chip-to-chip connections.
Regarding claim 18, Mallik in view of Shih discloses the module according to claim 1, wherein the module comprises a mounting base (Fig. 6, 673; ¶69-70) on which the component carrier (Fig. 6, 630/640/532/531; ¶57,69-70,95) is mounted.
Regarding claim 19, Mallik in view of Shih discloses the module according to claim 1, further comprising: a mold encapsulating (Fig. 6, 522; ¶65-70) the electronic component. (Fig. 6, 620; ¶ 69-70)
Regarding claim 20, Mallik in view of Shih discloses the module according to claim 1, wherein the bridging component (Fig. 6A, 640; ¶69-70, See Fig. 3A, shows location of a second bridge 340) and a further bridging component (Fig. 6A, 640; ¶69-70, See Fig. 3A, shows location of a second bridge 340), are arranged side by side in the stack (Fig. 6, 630/640/532/531; ¶57,69-70,95) at the same vertical level.
Regarding claim 21, Mallik in view of Shih discloses the module according to claim 1, wherein the bridging component (Fig. 6A, 640; ¶69-70, See Fig. 3A, shows location of a second bridge 340) is configured to supply electric power (¶42) to the electronic component. (Fig. 6A, 620; ¶69-70)
Regarding claim 22, Mallik in view of Shih discloses the module according to claim 1, wherein the electronic component (Fig. 6A, 620; ¶69-70) comprises at least one of a group consisting of a processor, a memory, a passive component, and a power chip. (¶72)
Regarding claim 23, Mallik in view of Shih discloses the module according to claim 1, wherein the component carrier (Fig. 6, 630/640/532/531; ¶57,69-70,95) comprises at least one of the following features: at least one component (Fig. 6A, 640; ¶69-70,36) being surface mounted on and/or embedded in the component carrier, wherein the at least one component is selected from a group consisting of an electronic component (¶36), an electrically non-conductive and/or electrically conductive inlay, a heat transfer unit, a light guiding element, an optical element, a bridge, an energy harvesting unit, an active electronic component, a passive electronic component, an electronic chip, an RF chip, a storage device, a filter, an integrated circuit, a signal processing component, a power management component, an optoelectronic interface element, a voltage converter, a cryptographic component, a transmitter and/or receiver, an electromechanical transducer, an actuator, a microelectromechanical system, a microprocessor, a capacitor, a resistor, an inductance, an accumulator, a switch, a camera, an antenna, a magnetic element, a further component carrier, and a logic chip (¶36); wherein at least one of the electrically conductive layer (Fig. 6, unlabeled pad184 in figure 1A; ¶35-36) structures of the component carrier comprises at least one of the group consisting of copper (¶39), aluminum, nickel, silver, gold, palladium, and tungsten; wherein the electrically insulating layer (Fig. 6, 630; ¶35,69-70) structure comprises at least one of the group consisting of resin, epoxy resin or bismaleimide-triazine resin, FR-4, FR-5, cyanate ester resin, polyphenylene derivate, glass, prepreg material, polyimide, polyamide, liquid crystal polymer, epoxy-based build-up film, polytetrafluoroethylene, a ceramic, and a metal oxide; wherein the component carrier is shaped as a plate; wherein the component carrier is configured as one of the group consisting of a printed circuit board, a substrate, and an interposer; wherein the component carrier is configured as a laminate-type component carrier.(clear from figures and associated text; ¶35-36)
Regarding the claimed type of components, it has been held that a recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus satisfying the claimed structural limitations. MPEP 2144.07
Regarding claim 24, Mallik discloses a method of manufacturing a module, the method comprising: providing a component carrier (Fig. 6, 630/640/532/531; ¶57,69-70,95) comprising a stack including at least one electrically conductive layer structure and at least one electrically insulating layer structure, and with at least one bridging component (Fig. 6, 640; ¶57,69-70,95) embedded in the stack, wherein the at least one bridging component comprises a first main surface (top) and a second main surface (bottom), one opposite to the other,… first contacting areas (Fig. 6, 136 top pads not labeled; ¶35) provided on the first main surface and second contacting areas (Fig. 6,133/143 bottom pads not labeled; ¶35-36) provided on the second main surface, the first contacting areas being connected to the second contacting areas through respective connection elements (Fig. 6, 134 vias not labeled ; ¶35-36) provided in the bridging component, and connecting at least one of the first or second contacting area directly or indirectly connected to at least two electronic components. (Fig. 6, 620 ; ¶57,69-70,95)
Mallik is silent on a redistribution structure between the first main surface and the second main surface.
Shih discloses a multi-chip package structure comprising a bridging component (Fig. 3C, 312; ¶52) with a redistribution structure (multiple ILD layers having multiple levels of wiring and inter-layer vias ) between first (top or bottom) and second (top or bottom) main surfaces.
Before the effective filing date of the invention it would have been obvious to one having ordinary skill in the art to combine a redistribution structure with the bridging component for forming high-density interconnect wiring for chip-to-chip connections.
Regarding claim 25, Mallik in view of Shih discloses the method according to claim 24, wherein the method is carried out on panel level. (¶56)
Claim(s) 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Mallik et al. (US 20200395313 A1; Mallik) in view of Shih (US-20210050327-A1; Shih) and further in view of Kim et al. ( US-20150116965-A1; Kim).
Regarding claim 17, Mallik in view of Shih discloses the module according to claim 16, but is silent on comprising at least one of the following features: a mean distance between two first horizontal electrically conductive redistribution structures in the x direction is different from a mean distance between two second horizontal electrically conductive redistribution structures the in the y direction and/or different from a mean distance between two vertical electrically conductive redistribution structures in the z direction; and/or a mean distance between two second horizontal electrically conductive redistribution structures in the y direction is different from a mean distance between two vertical electrically conductive redistribution structures in the z direction.
Kim discloses a package where a bridge comprises a first set of conductive layers (Fig. 5B, Pad; ¶63) in an x-direction having a first spacing and a second set of conductive layers (Fig. 5B, 416/418; ¶64) in a y direction comprising a different spacing.
Before the effective filing date of the invention it would have been obvious to one having ordinary skill in the art to have the positioning as a matter of design choice . Shifting the position of the redistribution structures would not have modified the operation of the device. 2144.04 (VI)(C)
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LAWRENCE C TYNES JR. whose telephone number is (571)270-7606. The examiner can normally be reached 9AM-5PM.
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/LAWRENCE C TYNES JR./Examiner, Art Unit 2899
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