Prosecution Insights
Last updated: April 19, 2026
Application No. 18/160,406

Module Comprising a Semiconductor-based Component and Method of Manufacturing the Same

Final Rejection §102
Filed
Jan 27, 2023
Examiner
TYNES JR., LAWRENCE C
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
At&S Austria Technologie & Systemtechnik AG
OA Round
2 (Final)
85%
Grant Probability
Favorable
3-4
OA Rounds
2y 5m
To Grant
94%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allow Rate
649 granted / 763 resolved
+17.1% vs TC avg
Moderate +9% lift
Without
With
+8.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
38 currently pending
Career history
801
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
53.4%
+13.4% vs TC avg
§102
30.5%
-9.5% vs TC avg
§112
10.7%
-29.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 763 resolved cases

Office Action

§102
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant's arguments filed October 20, 2025 have been fully considered but they are not persuasive. Applicant argues that Mallik does not disclose the newly claimed laminate stack. However, the claimed structure is not altered by calling it a laminate stack. It is unclear how applicant’s claim 1 in light of applicant’s figure 1 and associated text is patentably different from Mallik’s figure 6. Applicant claims (1 & 24), “wherein the stack is laminated from the at least one electrically insulating layer structure and the at least one electrically conductive layer structure.”, The conductive layer structure is not laminated on the insulating layer. It comprise through vias extending through the insulating layer. Mallik’s configuration is consistent with applicant’s claimed configuration in light of the drawings and associated text.. The amendment does not overcome the rejection. Applicant’s figure 1: PNG media_image1.png 614 776 media_image1.png Greyscale Mallik figure 6: PNG media_image2.png 308 658 media_image2.png Greyscale Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-25 is/are rejected under 35 U.S.C. 102(A)(1) as being anticipated by Mallik et al. (US 20200395313 A1; Mallik). Regarding claim 1, Mallik discloses a module comprising: a component carrier (Fig. 6, 630/640/532/531; ¶57,69-70,95) with a stack (Fig. 6, 600; ¶69-70) comprising at least one electrically conductive layer (Fig. 6, vias not labeled in 630; ¶69-70, described in ¶35) structure and/or at least one electrically insulating layer (Fig. 6, 630; ¶69-70) structure, and with at least one bridging component (Fig. 6, 640; ¶69-70) embedded in the stack and having a redistribution structure (Fig. 6, 630/640/532/531; ¶95); wherein the component carrier comprises the stack, wherein the stack is a laminate of the at least one electrically insulating layer structure and the at least one electrically conductive layer structure, wherein the bridging component comprises a first main surface (top or bottom) and a second main surface (top or bottom), one opposite to the other, with first contacting areas (location of unlabeled bump pads) provided on the first main surface (top and second contacting areas (location of unlabeled bump pads) provided on the second main surface (bottom), the first contacting areas being connected to the second contacting areas through respective connection elements (unlabeled through vias) provided in the bridging component, wherein at least one of the first or second contacting area is directly or indirectly connected to at least two electronic components. (Fig. 6, 620; ¶69-70) Mallik’s figure 6 is compatible with embodiments of Figs. 1A-5M (¶70). Hereinafter, they will be used to define components not labeled in Fig. 6. Regarding claim 2, Mallik discloses the module according to claim 1, wherein the component carrier (Fig. 6, 630/640/532/531; ¶57,69-70,95) comprises two component carrier main surfaces (top and bottom), the first and second main surfaces of the bridging component (Fig. 6, 640; ¶69-70) are directly connected (by through vias) to a respective one of the component carrier main surfaces.(top) Regarding claim 3, Mallik discloses the module according to claim 1, wherein solder balls (Fig. 6, 685; ¶69-70) are provided on at least one of the component carrier (Fig. 6, 630/640; ¶69-70,95) main surfaces (top), the solder balls being directly or indirectly connected to at least one of the first or second contacting area of the respective bridging component (Fig. 6, 640; ¶69-70) main surface. Regarding claim 4, Mallik discloses the module according to claim 1, wherein a density per volume unit or area unit (Fig. 6, pad distribution 684 and associating bridge wiring; ¶69-70) of a contacting area of the first main surface (top) of the bridging component (Fig. 6, 640; ¶69-70) is different (clear from drawing) from a density per volume unit or area unit of a contacting area of the second main surface (bottom) of the bridging component. Regarding claim 5, Mallik discloses the module according to claim 4, wherein a density per volume unit or area unit of the contacting area (Fig. 6, pad distribution 684 and associating bridge wiring; ¶69-70) of the first main surface (Fig. 6, top surface 640; ¶69-70), which is directly connected to at least one of the at least two electronic components (Fig. 6, 620; ¶69-70), is higher than a density of the contacting area (Fig. 6, bottom surface distribution of pads; ¶69-70) provided on the opposed second main surface.(bottom) Applicant claims a main surface for the bridge and a component carrier main surface for the component carrier. Examiner interprets the main surface of claim 5 to be associated with the bridge. Regarding claim 6, Mallik discloses the module according to claim 1, wherein the component carrier (Fig. 6, 630/640/532/531; ¶57,69-70,95) comprises at least two bridging components (Fig. 6, second horizontally aligned in the z direction 640; ¶69-70, See Fig. 3A 340;¶47) embedded in the stack. Mallik discloses the package 600 may be substantially similar to the electronic packages described above, such as Fig. 1-5. Accordingly bridges 340 of Figure 3 are analogous to bridge 640. Regarding claim 7, Mallik discloses the module according to claim 6, wherein at least one of the at least two electronic components (Fig. 6, 620; ¶69-70) in the component carrier (Fig. 6, 630/640/532/531; ¶57,69-70,95) is connected to the at least two bridging components. (Fig. 6A, 640; ¶69-70, See Fig. 3A, 320A connected to both bridges 340) Mallik discloses the package 600 may be substantially similar to the electronic packages described above, such as Fig. 3A. Accordingly bridges 340 are analogous to bridge 640. Regarding claim 8, Mallik discloses the module according to claim 7, wherein each of the at least two bridging components (Fig. 6A, 640; ¶69-70, See Fig. 3A, 320A connected to both bridges 340) comprises a first main surface (top), wherein the at least one of the at least two electronic components (Fig. 6A, 620; ¶69-70, See Fig. 3A, 320A connected to both bridges 340) is connected to each first main surface (top) of the at least two bridging components facing the same component carrier (Fig. 6, 630/640/532/531; ¶57,69-70,95) main surface. Mallik discloses the package 600 may be substantially similar to the electronic packages described above, such as Fig. 3A. Accordingly bridges 340 are analogous to bridge 640. Regarding claim 9, Mallik discloses the module according to claim 1, wherein the bridging component (Fig. 6A, 640; ¶69-70) is connected to a third electronic component. (Fig. 6A, 683; ¶69-70) Since the claims do not claim what electronic components are it reasonable to interpret “electronic component” as a substrate, pad, or bump because they are all components in an electronic device. Regarding claim 10, Mallik disclose the module according to claim 9, wherein the bridging component (Fig. 6A, 640; ¶69-70) is connected to the third electronic component (Fig. 6A, 683; ¶69-70) via the first main surface (top). Regarding claim 11, Mallik discloses the module according to claim 1, wherein at least one of the at least two electronic components (Fig. 6A, 620; ¶69-70) is additionally connected to a further redistribution structure (¶95) directly provided in the component carrier. (Fig. 6A, 673; ¶69-70) Regarding claim 12, Mallik discloses the module according to claim 1, wherein at least one of the at least two electronic components (Fig. 6A, 620; ¶69-70) is exclusively connected to the at least one bridging component (Fig. 6A, 640; ¶69-70). Regarding claim 13, Mallik discloses the module according to claim 1, wherein at least one of the at least two electronic components (Fig. 6A, 620; ¶69-70) is partially connected to the bridging component. (Fig. 6A, 640; ¶69-70) It is unclear what applicant means by partially connected. Either something is connected or it is not connected. Regarding claim 14, Mallik discloses the module according to claim 1, wherein at least one of the at least two electronic components (Fig. 6A, 620; ¶69-70) is connected to a power conducting supplying structure (Fig. 6A, package substrate 673; ¶69-70, 42) for power supply to the at least one of the at least two electronic components. Regarding claim 15, Mallik discloses the module according to claim 1, wherein the bridging component (Fig. 6A, 640; ¶69-70) comprises a matrix of dielectric or semiconductor material (¶36) and the connection elements embedded in the matrix (interconnects and through vias not labeled in Fig. 6), which form the electrically conductive redistribution structure together with the first (top) and second (bottom) contacting areas, wherein a mean distance between the first contacting areas (top bridge contacts are more dense than lower bridge contacts) is different to a mean distance between the second contacting areas. Paragraph 36 discloses the nested component can be semiconductor devices or interconnect structures which comprise either semiconductor or dielectric matrix material. Regarding claim 16, Mallik discloses the module according to claim 15, wherein the connection elements comprise at least two first horizontal electrically conductive redistribution structures (Fig. 5I, 536 ; ¶54) in a x direction (left and right), at least two second horizontal electrically conductive redistribution structures in an y direction(Fig. 5I, 536 ; ¶54 in three dimensions the bridge will have connection elements in the x and y direction), and at least two vertical electrically conductive redistribution structures in a z direction (Figs. 5I,6, vias 544; ¶54); at least one of the first and second horizontal electrically conductive redistribution structures is electrically connected to at least one vertical electrically conductive redistribution structure.(Clear form drawings and associated text. If the redistribution are not connected to the vertical vias the device will not work.) Regarding claim 17, Mallik discloses the module according to claim 16, comprising at least one of the following features: a mean distance between two first horizontal electrically conductive redistribution structures (Fig. 5I, 536 ; ¶54) in the x direction (left and right) is different from a mean distance between two second horizontal electrically conductive redistribution structures the in the y direction and/or different from a mean distance between two vertical electrically conductive redistribution structures (Figs. 5B/5I/6, vias 544; ¶54) in the z direction (clear from drawings); and/or a mean distance between two second horizontal electrically conductive redistribution structures in the y direction is different from a mean distance between two vertical electrically conductive redistribution structures in the z direction. Regarding claim 18, Mallik discloses the module according to claim 1, wherein the module comprises a mounting base (Fig. 6, 673; ¶69-70) on which the component carrier (Fig. 6, 630/640/532/531; ¶57,69-70,95) is mounted. Regarding claim 19, Mallik discloses the module according to claim 1, further comprising: a mold encapsulating (Fig. 6, 522; ¶65-70) the electronic component. (Fig. 6, 620; ¶ 69-70) Regarding claim 20, Mallik discloses the module according to claim 1, wherein the bridging component (Fig. 6A, 640; ¶69-70, See Fig. 3A, shows location of a second bridge 340) and a further bridging component (Fig. 6A, 640; ¶69-70, See Fig. 3A, shows location of a second bridge 340), are arranged side by side in the stack (Fig. 6, 630/640/532/531; ¶57,69-70,95) at the same vertical level. Regarding claim 21, Mallik discloses the module according to claim 1, wherein the bridging component (Fig. 6A, 640; ¶69-70, See Fig. 3A, shows location of a second bridge 340) is configured to supply electric power (¶42) to the electronic component. (Fig. 6A, 620; ¶69-70) Regarding claim 22, Mallik discloses the module according to claim 1, wherein the electronic component (Fig. 6A, 620; ¶69-70) comprises at least one of a group consisting of a processor, a memory, a passive component, and a power chip. (¶72) Regarding claim 23, Mallik discloses the module according to claim 1, wherein the component carrier (Fig. 6, 630/640/532/531; ¶57,69-70,95) comprises at least one of the following features: at least one component (Fig. 6A, 640; ¶69-70,36) being surface mounted on and/or embedded in the component carrier, wherein the at least one component is selected from a group consisting of an electronic component (¶36), an electrically non-conductive and/or electrically conductive inlay, a heat transfer unit, a light guiding element, an optical element, a bridge, an energy harvesting unit, an active electronic component, a passive electronic component, an electronic chip, an RF chip, a storage device, a filter, an integrated circuit, a signal processing component, a power management component, an optoelectronic interface element, a voltage converter, a cryptographic component, a transmitter and/or receiver, an electromechanical transducer, an actuator, a microelectromechanical system, a microprocessor, a capacitor, a resistor, an inductance, an accumulator, a switch, a camera, an antenna, a magnetic element, a further component carrier, and a logic chip (¶36); wherein at least one of the electrically conductive layer (Fig. 6, unlabeled pad184 in figure 1A; ¶35-36) structures of the component carrier comprises at least one of the group consisting of copper (¶39), aluminum, nickel, silver, gold, palladium, and tungsten; wherein the electrically insulating layer (Fig. 6, 630; ¶35,69-70) structure comprises at least one of the group consisting of resin, epoxy resin or bismaleimide-triazine resin, FR-4, FR-5, cyanate ester resin, polyphenylene derivate, glass, prepreg material, polyimide, polyamide, liquid crystal polymer, epoxy-based build-up film, polytetrafluoroethylene, a ceramic, and a metal oxide; wherein the component carrier is shaped as a plate; wherein the component carrier is configured as one of the group consisting of a printed circuit board, a substrate, and an interposer; wherein the component carrier is configured as a laminate-type component carrier.(clear from figures and associated text; ¶35-36) Regarding the claimed type of components, it has been held that a recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus satisfying the claimed structural limitations. MPEP 2144.07 Regarding claim 24, Mallik discloses a method of manufacturing a module, the method comprising: providing a component carrier (Fig. 6, 630/640/532/531; ¶57,69-70,95) comprising a stack including at least one electrically conductive layer structure and at least one electrically insulating layer structure, and with at least one bridging component (Fig. 6, 640; ¶57,69-70,95) embedded in the stack and having a redistribution structure (¶95); wherein the stack is laminated from the at least one electrically insulating layer structure and the at least one electrically conductive layer structure, wherein the at least one bridging component comprises a first main surface (top) and a second main surface (bottom), one opposite to the other, with first contacting areas (Fig. 6, 136 top pads not labeled; ¶35) provided on the first main surface and second contacting areas (Fig. 6,133/143 bottom pads not labeled; ¶35-36) provided on the second main surface, the first contacting areas being connected to the second contacting areas through respective connection elements (Fig. 6, 134 vias not labeled ; ¶35-36) provided in the bridging component, and connecting at least one of the first or second contacting area directly or indirectly connected to at least two electronic components. (Fig. 6, 620 ; ¶57,69-70,95) Regarding claim 25, Mallik discloses the method according to claim 24, wherein the method is carried out on panel level. (¶56) Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to LAWRENCE C TYNES JR. whose telephone number is (571)270-7606. The examiner can normally be reached 9AM-5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Zandra Smith can be reached at 571-272-2429. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /LAWRENCE C TYNES JR./Examiner, Art Unit 2899
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Prosecution Timeline

Jan 27, 2023
Application Filed
Jul 18, 2025
Non-Final Rejection — §102
Oct 20, 2025
Response Filed
Jan 24, 2026
Final Rejection — §102 (current)

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Prosecution Projections

3-4
Expected OA Rounds
85%
Grant Probability
94%
With Interview (+8.9%)
2y 5m
Median Time to Grant
Moderate
PTA Risk
Based on 763 resolved cases by this examiner. Grant probability derived from career allow rate.

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