Prosecution Insights
Last updated: October 25, 2026
Application No. 18/164,205

Semiconductor Device Having Semiconductor Structure with Polarity Inverting Layer

Non-Final OA §102§103
Filed
Feb 03, 2023
Examiner
KIM, JAY C
Art Unit
2815
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Wolfspeed Inc.
OA Round
4 (Non-Final)
49%
Grant Probability
Moderate
4-5
OA Rounds
0m
Est. Remaining
71%
With Interview

Examiner Intelligence

Grants 49% of resolved cases
49%
Career Allowance Rate
433 granted / 876 resolved
-18.6% vs TC avg
Strong +22% interview lift
Without
With
+21.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 6m
Avg Prosecution
54 currently pending
Career history
937
Total Applications
across all art units

Statute-Specific Performance

§101
1.0%
-39.0% vs TC avg
§103
40.9%
+0.9% vs TC avg
§102
13.8%
-26.2% vs TC avg
§112
43.6%
+3.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 876 resolved cases

Office Action

§102 §103
DETAILED ACTION This Office Action is in response to RCE filed May 29, 2026. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1, 3, 6, 26, 66-68, 71 and 72 are rejected under 35 U.S.C. 102(a)(1) or (a)(2) as being anticipated by Suda et al. (US 2010/0072485) Regarding claims 1, 3, 6, 26 and 66-68, Suda et al. disclose a semiconductor device (Fig. 16), comprising: a substrate (101) comprising a silicon carbide substrate; a polarity inverting layer (103) ([0072]) directly on a silicon face of the silicon carbide substrate ([0008]), see also Fig. 15 of Suda et al. where the top surface of the SiC substrate with the upward arrow is (0001)Si, the polarity inverting layer having a uniform material composition, because as disclosed in paragraph [0008] of Suda et al., “In the (0001) Si polar face of 4H-, 6H- or 15R-SiC (a (111) Si polar face in the case of 3C-SiC), the bonding hands of Si perpendicularly project to a surface”, and that “If one atomic layer (referred to as an "intermediate layer") of Si is grown on this Si polar face of SiC, Si--Si bonds are formed”; and a nitrogen-polar (N-Polar) Group III-nitride semiconductor structure (105b, 107b, or composite structure including 105b and/or 107b) on the polarity inverting layer, because when the polarity is inverted or reversed by the presence of the intermediate layer 103, the nitride semiconductor layer of 105b, 107b, etc. would be N-polar (claim 1), wherein the substrate (101) comprises a 4H-silicon carbide substrate ([0008]) (claim 3), the polarity inverting layer (103) has a hexagonal close packed (HCP) crystal structure or a face centered cubic (FCC) crystal structure, because (a) Si atoms constituting the polarity inverting layer 103 has a diamond lattice structure, and (b) a diamond lattice structure is based on a face-centered cubic (FCC) Bravais lattice (claim 6), the N-polar Group III-nitride structure (105b, 107b, or composite structure including 105b and/or 107b) has a spontaneous polarization dipole in a direction opposite a growth direction of the N-polar Group III-nitride structure, which is inherent for the N-polar Group III-nitride structure (claim 26), the Group III-nitride semiconductor structure (105b, 107b, or composite structure including 105b and/or 107b) comprises an aluminum nitride layer (105b) on the polarity inverting layer (103) (claim 66), wherein the Group III-nitride semiconductor structure (105b, 107b, or composite structure including 105b and/or 107b) comprises a gallium nitride layer (107b) on the aluminum nitride layer (105b) (claim 67), further comprising a gate contact (141), a source contact (145), and a drain contact (147) on the N-polar Group III-nitride semiconductor structure (105b, 107b, or composite structure including 105b and/or 107b) (claim 68). Please refer to the explanations of the corresponding limitations above. Regarding claim 71, Suda et al. disclose a semiconductor device (Fig. 16), comprising: a substrate (101) comprising a silicon carbide substrate; a polarity inverting layer (103) on a silicon surface of the silicon carbide substrate, the polarity inverting layer having a hexagonal close packed (HCP) crystal structure or a face centered cubic (FCC) crystal structure, because (a) Si atoms constituting the polarity inverting layer 103 has a diamond lattice structure, and (b) a diamond lattice structure is based on a face-centered cubic (FCC) Bravais lattice; and a nitrogen-polar (N-polar) Group III-nitride semiconductor structure (105b, 107b, or composite structure including 105b and/or 107b) on the polarity inverting layer. Regarding claim 72, Suda et al. disclose a semiconductor device (Fig. 16), comprising: a substrate (101) comprising a silicon carbide substrate; a polarity inverting layer (103) directly on a silicon face of the silicon carbide substrate; and a nitrogen-polar (N-polar) Group III-nitride semiconductor structure (105b, 107b, or composite structure including 105b and/or 107b) on the polarity inverting layer. Claims 1, 26, 68 and 72 are rejected under 35 U.S.C. 102(a)(1) or (a)(2) as being anticipated by Mishra et al. (US 2020/0119179) An alternate interpretation is employed in current Office Action. Regarding claims 1, 26 and 68, Mishra et al. disclose a semiconductor device (Fig. 2), comprising: a substrate (10) comprising a silicon carbide substrate ([0070]); a polarity inverting layer (not-shown initial nucleation layer), because (a) Mishra et al. disclose in paragraph [0070] that “the nucleation of N-polar III-N epitaxy” is promoted “by exposing the substrate surface to nitridation” in the option (i), and (b) the promotion of “the nucleation of N-polar III-N epitaxy” disclosed by Mishra et al. suggests that the silicon carbide substrate 10 should have a III-polar surface or a silicon face since otherwise a promotion of “the nucleation of N-polar III-N epitaxy” would not be necessary, the polarity inverting layer having a uniform material composition, because Mishra et al. do not disclose any variation of material composition for the not-shown nucleation layer formed by nitridation; and a nitrogen-polar (N-Polar) Group III-nitride semiconductor structure (composite structure of 12-18) ([0070]) on the polarity inverting layer (claim 1), wherein the N-polar Group III-nitride structure (composite structure of 12-18) has a spontaneous polarization dipole in a direction opposite a growth direction of the N-polar Group III-nitride structure, which is inherent for the N-polar Group III-nitride structure (claim 26), further comprising a gate contact (23) ([0055]), a source contact (21) ([0060]), and a drain contact (22) on the N-polar Group III-nitride semiconductor structure (composite structure of 12-18) (claim 68). Please refer to the explanations of the corresponding limitations above. Regarding claim 72, Mishra et al. disclose a semiconductor device (Fig. 2), comprising: a substrate (10) comprising a silicon carbide substrate ([0070]); a polarity inverting layer (not-shown initial nucleation layer formed by nitridation) directly on a silicon face of the silicon carbide substrate; and a nitrogen-polar (N-polar) Group III-nitride semiconductor structure (composite structure of 12-18) on the polarity inverting layer. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 3 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Mishra et al. (US 2020/0119179) The teachings of Mishra et al. are discussed above. Regarding claim 3, Mishra et al. differ from the claimed invention by not showing that the substrate comprises a 4H-silicon carbide substrate. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the substrate can comprise a 4H-silicon carbide substrate, because (a) a 4H-silicon carbide substrate, which is one of the most well-known silicon carbide substrates having a hexagonal lattice structure, has been commonly employed for a substrate material in forming GaN-based semiconductor materials due to its compatibility with GaN-based semiconductor materials in terms of lattice structures and lattice constants, and (b) it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use, In re Leshin, 125 USPQ 416. Regarding claim 14, Mishra et al. differ from the claimed invention by not showing that the polarity inverting layer has a thickness in a range of about 5 nm to about 100 nm. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the polarity inverting layer can have a thickness in a range of about 5 nm to about 100 nm, because (a) Applicants do not specifically claim how close to 5 nm and 100 nm the thickness of the polarity inverting layer should be to be referred to be about 5 nm and about 100 nm, respectively, and (b) the thickness of the polarity inverting layer should be controlled and optimized to obtain desired quality of the semiconductor layers deposited on the polarity inverting layer, which would in turn improve performance of the semiconductor device formed on the polarity inverting layers. Claims 5, 6, 13, 15, 66, 67, 69 and 71 are rejected under 35 U.S.C. 103 as being unpatentable over Mishra et al. (US 2020/0119179) in view of Kobayashi et al. (“Epitaxial Junction of Inversion Symmetry Breaking AlN and Centrosymmetric NbN: A Polarity Control of Wide-Bandgap AlN,” ACS Appl. Electron. Mater. 2023, 5, 240-246) The teachings of Mishra et al. are discussed above. Regarding claims 5, 6, 13, 15 and 69, Mishra et al. differ from the claimed invention by not showing that the polarity inverting layer comprises a transition metal nitride (claim 5), the polarity inverting layer has a hexagonal close packed (HCP) crystal structure or a face centered cubic (FCC) crystal structure (claim 6), and the polarity inverting layer comprises niobium nitride (NbxNy), titanium nitride (TixNy), zirconium nitride (ZrxNy), hafnium nitride (HfxNy), vanadium nitride (VxNy), tantalum nitride (TaxNy), chromium nitride (CrxNy), molybdenum nitride (MoxNy), or tungsten nitride (WxNy) (claims 13 and 69), wherein the transition metal nitride does not exhibit a phase transition in a temperature range of up to about 1300 °C (claim 15). Kobayashi et al. disclose a semiconductor device or a semiconductor structure (Fig. 3), comprising: a substrate (substrate in Fig. 3); a polarity inverting layer (NbN), the polarity inverting layer having a uniform material composition, see the micrograph in Fig. 3 of Kobayashi et al., where a polarity inverting layer (NbN) comprises a transition metal nitride (claim 5), the polarity inverting layer (NbN) has a hexagonal close packed (HCP) crystal structure or a face centered cubic (FCC) crystal structure, which is inherent because Kobayashi et al. disclose NbN as the material for the polarity inverting layer, which is one of the materials Applicants originally disclosed and claim in claims 13 and 69 (claim 6), the polarity inverting layer (NbN) comprises niobium nitride (NbxNy), titanium nitride (TixNy), zirconium nitride (ZrxNy), hafnium nitride (HfxNy), vanadium nitride (VxNy), tantalum nitride (TaxNy), chromium nitride (CrxNy), molybdenum nitride (MoxNy), or tungsten nitride (WxNy) (claims 13 and 69), wherein the transition metal nitride (NbN) does not exhibit a phase transition in a temperature range of up to about 1300 oC, because (a) Applicants do not specifically claim what the “phase transition” refers to, and (b) the claim limitation of claim 15 should be inherent since Kobayashi et al. disclose NbN for the polarity inverting layer, which is one of the materials Applicants originally disclosed and claim in claims 13 and 69 for the polarity inverting layer (claim 15). Since both Mishra et al. and Kobayashi et al. teach a semiconductor device or a semiconductor structure comprising a polarity inverting layer, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the polarity inverting layer disclosed by Mishra et al. can be NbN or can be replaced with NbN, because (a) NbN has been a well-known polarity inverting layer material for forming GaN-based semiconductor layers as disclosed by Kobayashi et al., and (b) it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use, In re Leshin, 125 USPQ 416. Regarding claim 66, Mishra et al. differ from the claimed invention by not showing that the Group III nitride semiconductor structure comprises an aluminum nitride layer on the polarity inverting layer. Mishra et al. further disclose that the Group III nitride semiconductor structure (composite layer of 12-18) comprises a GaN layer or AlGaN layer (12) ([0054]). In addition, Kobayashi et al. disclose that a Group II-nitride semiconductor structure (structure including AlN (N-polar)) comprises an aluminum nitride layer on a polarity inverting layer (NbN). Since both Mishra et al. and Kobayashi et al. teach a semiconductor device or a semiconductor structure, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the Group III nitride semiconductor structure can comprise an aluminum nitride layer on the polarity inverting layer, because (a) AlN has been a well-known nucleation or buffer layer material for forming GaN-based semiconductor layers in addition to GaN and AlGaN layer disclosed by Mishra et al. as disclosed by Kobayashi et al., and (b) it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use, In re Leshin, 125 USPQ 416. Regarding claim 67, Mishra et al. further disclose that the Group III nitride semiconductor structure (composite structure of 12-18) comprises a gallium nitride layer (16) ([0056]) on the aluminum nitride layer. Regarding claim 71, Mishra et al. disclose a semiconductor device (Fig. 2), comprising: a substrate (10) comprising a silicon carbide substrate ([0070]); a polarity inverting layer (not-shown initial nucleation layer formed by nitridation) ([0070]) on a silicon face of the silicon carbide substrate as discussed above with regard to the same limitation recited in claim 1, and a nitrogen-polar (N-polar) Group III-nitride semiconductor structure (composite structure of 12-18) on the polarity inverting layer. Mishra et al. differ from the claimed invention by not showing that the polarity inverting layer has a hexagonal close packed (HCP) crystal structure or a face centered cubic (FCC) crystal structure. Kobayashi et al. disclose a semiconductor device or a semiconductor structure (Fig. 3), comprising: a substrate (substrate in Fig. 3); a polarity inverting layer (NbN), where the polarity inverting layer (NbN) has a hexagonal close packed (HCP) crystal structure or a face centered cubic (FCC) crystal structure, which is inherent because Kobayashi et al. disclose NbN as the material for the polarity inverting layer, which is one of the materials Applicants originally disclosed and claim in claims 13 and 69. Since both Mishra et al. and Kobayashi et al. teach a semiconductor device or a semiconductor structure comprising a polarity inverting layer, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the polarity inverting layer disclosed by Mishra et al. can be NbN or can be replaced with NbN, because (a) NbN has been a well-known polarity inverting layer material for forming GaN-based semiconductor layers, and (b) it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use, In re Leshin, 125 USPQ 416. Response to Arguments Applicants’ arguments with respect to claims 1, 71 and 72 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. In response to Applicants' argument that the teachings of Mishra et al. and Kobayashi et al. cannot be combined to reject claim 71 due to the detailed disclosure of NbN by Kobayashi et al., the test for obviousness is not whether the features of a secondary reference may be bodily incorporated into the structure of the primary reference; nor is it that the claimed invention must be expressly suggested in any one or all of the references. Rather, the test is what the combined teachings of the references would have suggested to those of ordinary skill in the art. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981). In other words, while the prior art rejection of claim 71 is based on a simple substitution of the nitride nucleation film disclosed by Mishra et al. with a NbN film, which is also a nitride film, disclosed by Kobayashi et al., Applicants’ arguments are based on allegations that all the other teachings that may not be relevant to the simple substitution between the nitride nucleation film and the NbN film such as electrical and electronic characteristics of NbN also need to be considered, and thus are not persuasive. If arguendo Applicants’ arguments are correct, then for example, a simple substitution of an AlGaN buffer layer with an AlN, GaN or BN buffer layer in forming GaN-based semiconductor materials may not be possible when considering all the different electrical and electronic characteristics as well as mechanical properties of AlGaN in comparison to AlN, GaN and BN. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Nagasawa et al. (US 2020/0006046) Nagasawa et al. (US 11,177,123) Kub et al. (US 2014/0264379) Fujibayashi et al. (US 2012/0181550) Hecht et al. (US 11,721,547) Ghyselen et al. (US 2003/0219959) Anderson et al. (US 12,020,985) Hayashi et al., “Polarity inversion of aluminum nitride by direct wafer bonding,” Applied Physics Express 11 (2018) 031003. Guo et al., “Polarity control and fabrication of lateral polarity structures of III-nitride thin films and devices: progress and prospects,” Journal of Physics D: Applied Physics 53 (2020) 483002. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAY C KIM whose telephone number is (571) 270-1620. The examiner can normally be reached 8:00 AM - 6:00 PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Joshua Benitez can be reached at (571) 270-1435. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JAY C KIM/Primary Examiner, Art Unit 2815 /J. K./Primary Examiner, Art Unit 2815 September 24, 2026
Read full office action

Prosecution Timeline

Show 4 earlier events
Oct 17, 2025
Response Filed
Dec 22, 2025
Final Rejection mailed — §102, §103
Feb 23, 2026
Response after Non-Final Action
Mar 02, 2026
Final Rejection mailed — §102, §103
May 01, 2026
Response after Non-Final Action
May 29, 2026
Request for Continued Examination
Jun 02, 2026
Response after Non-Final Action
Sep 29, 2026
Non-Final Rejection mailed — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12772483
NITRIDE SEMICONDUCTOR DEVICE
3y 4m to grant Granted Oct 20, 2026
Patent 12772611
METHOD FOR EPITAXY OF HIGH ELECTRON MOBILITY TRANSISTOR
3y 4m to grant Granted Oct 20, 2026
Patent 12772617
COMPOSITE SUBSTRATE, EPITAXIAL WAFER, AND SEMICONDUCTOR DEVICE
3y 3m to grant Granted Oct 20, 2026
Patent 12765042
REDUCING CROSS-WAFER VARIABILITY FOR MINIMUM WIDTH RESISTORS
3y 2m to grant Granted Oct 13, 2026
Patent 12751014
SEMICONDUCTOR DEVICE
2y 6m to grant Granted Sep 29, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

4-5
Expected OA Rounds
49%
Grant Probability
71%
With Interview (+21.6%)
3y 6m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 876 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month