Prosecution Insights
Last updated: April 19, 2026
Application No. 18/164,205

Semiconductor Device Having Semiconductor Structure with Polarity Inverting Layer

Final Rejection §102§103
Filed
Feb 03, 2023
Examiner
KIM, JAY C
Art Unit
2815
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Wolfspeed, Inc.
OA Round
3 (Final)
48%
Grant Probability
Moderate
4-5
OA Rounds
3y 8m
To Grant
70%
With Interview

Examiner Intelligence

Grants 48% of resolved cases
48%
Career Allow Rate
412 granted / 849 resolved
-19.5% vs TC avg
Strong +22% interview lift
Without
With
+21.9%
Interview Lift
resolved cases with interview
Typical timeline
3y 8m
Avg Prosecution
67 currently pending
Career history
916
Total Applications
across all art units

Statute-Specific Performance

§101
1.2%
-38.8% vs TC avg
§103
39.1%
-0.9% vs TC avg
§102
19.5%
-20.5% vs TC avg
§112
39.6%
-0.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 849 resolved cases

Office Action

§102 §103
DETAILED ACTION This Office Action is in response to After Final Response filed February 23, 2026. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1, 4, 26, 68 and 72 are rejected under 35 U.S.C. 102(a)(1) or (a)(2) as being anticipated by Mishra et al. (US 2020/0119179) Regarding claims 1, 4, 26 and 68, Mishra et al. disclose a semiconductor device (Fig. 2), comprising: a substrate (10 or composite layer of 10 and not-shown initial III-polar layer) comprising a silicon carbide substrate ([0070]), because (a) Applicants do not specifically claim whether the substrate essentially consists of silicon carbide, and (b) the transitional phrase “comprising” does not preclude presence of other material(s); a polarity inverting layer (not-shown layer formed by nitridation or not-shown thin III-N layer with very high magnesium doping) ([0070]) on a silicon face of the silicon carbide substrate, because (a) the preposition “on” does not necessarily suggest “directly on”, and (b) Mishra et al. disclose “inverting the crystal orientation from III-polar to N-polar” in paragraph [0070], which suggests that the silicon carbide substrate 10 should have a III-polar surface or a silicon face, the polarity inverting layer having a uniform material composition, because Mishra et al. do not disclose any variation of material composition for the not-shown layer formed by nitridation or not-shown thin III-N layer with very high magnesium doping; and a nitrogen-polar (N-Polar) Group III-nitride semiconductor structure (composite structure of 12-18) ([0070]) on the polarity inverting layer (claim 1), wherein a surface of the polarity inverting layer (not-shown thin III-N layer with very high magnesium doping) is directly on the silicon face of the silicon carbide substrate (10) (claim 4), and the N-polar Group III-nitride structure (composite structure of 12-18) has a spontaneous polarization dipole in a direction opposite a growth direction of the N-polar Group III-nitride structure, which is inherent for the N-polar Group III-nitride structure (claim 26), further comprising a gate contact (23) ([0055]), a source contact (21) ([0060]), and a drain contact (22) on the N-polar Group III-nitride semiconductor structure (composite structure of 12-18) (claim 68). Regarding claim 72, Mishra et al. disclose a semiconductor device (Fig. 2), comprising: a substrate (10 or composite layer of 10 and not-shown initial III-polar layer) comprising a silicon carbide substrate ([0070]); a polarity inverting layer (not-shown layer formed by nitridation or not-shown thin III-N layer with very high magnesium doping) ([0070]) directly on a silicon face of the silicon carbide substrate as discussed above with regard to the same limitation recited in claim 4; and a nitrogen-polar (N-polar) Group III-nitride semiconductor structure (composite structure of 12-18) on the polarity inverting layer. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 3 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Mishra et al. (US 2020/0119179) The teachings of Mishra et al. are discussed above. Regarding claim 3, Mishra et al. differ from the claimed invention by not showing that the substrate comprises a 4H-silicon carbide substrate. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the substrate can comprise a 4H-silicon carbide substrate, because (a) a 4H-silicon carbide substrate, which is one of the most well-known silicon carbide substrates having a hexagonal lattice structure, has been commonly employed for a substrate material in forming GaN-based semiconductor materials due to its compatibility with GaN-based semiconductor materials in terms of lattice structures and lattice constants, and (b) it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use, In re Leshin, 125 USPQ 416. Regarding claim 14, Mishra et al. differ from the claimed invention by not showing that the polarity inverting layer has a thickness in a range of about 5 nm to about 100 nm. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the polarity inverting layer can have a thickness in a range of about 5 nm to about 100 nm, because (a) Applicants do not specifically claim how close to 5 nm and 100 nm the thickness of the polarity inverting layer should be to be referred to be about 5 nm and about 100 nm, respectively, and (b) the thickness of the polarity inverting layer should be controlled and optimized to obtain desired quality of the semiconductor layers deposited on the polarity inverting layer, which would in turn improve performance of the semiconductor device formed on the polarity inverting layers. Claims 5, 6, 13, 15, 66, 67, 69 and 71 are rejected under 35 U.S.C. 103 as being unpatentable over Mishra et al. (US 2020/0119179) in view of Kobayashi et al. (“Epitaxial Junction of Inversion Symmetry Breaking AlN and Centrosymmetric NbN: A Polarity Control of Wide-Bandgap AlN,” ACS Appl. Electron. Mater. 2023, 5, 240-246) The teachings of Kobayashi et al. are discussed above. Regarding claims 5, 6, 13, 15 and 69, Mishra et al. differ from the claimed invention by not showing that the polarity inverting layer comprises a transition metal nitride (claim 5), the polarity inverting layer has a hexagonal close packed (HCP) crystal structure or a face centered cubic (FCC) crystal structure (claim 6), and the polarity inverting layer comprises niobium nitride (NbxNy), titanium nitride (TixNy), zirconium nitride (ZrxNy), hafnium nitride (HfxNy), vanadium nitride (VxNy), tantalum nitride (TaxNy), chromium nitride (CrxNy), molybdenum nitride (MoxNy), or tungsten nitride (WxNy) (claims 13 and 69), wherein the transition metal nitride does not exhibit a phase transition in a temperature range of up to about 1300 °C (claim 15). Kobayashi et al. disclose a semiconductor device or a semiconductor structure (Fig. 3), comprising: a substrate (substrate in Fig. 3); a polarity inverting layer (NbN), the polarity inverting layer having a uniform material composition, see the micrograph in Fig. 3 of Kobayashi et al., where a polarity inverting layer (NbN) comprises a transition metal nitride (claim 5), the polarity inverting layer (NbN) has a hexagonal close packed (HCP) crystal structure or a face centered cubic (FCC) crystal structure, which is inherent because Kobayashi et al. disclose NbN as the material for the polarity inverting layer, which is one of the materials Applicants originally disclosed and claim in claims 13 and 69 (claim 6), the polarity inverting layer (NbN) comprises niobium nitride (NbxNy), titanium nitride (TixNy), zirconium nitride (ZrxNy), hafnium nitride (HfxNy), vanadium nitride (VxNy), tantalum nitride (TaxNy), chromium nitride (CrxNy), molybdenum nitride (MoxNy), or tungsten nitride (WxNy) (claims 13 and 69), wherein the transition metal nitride (NbN) does not exhibit a phase transition in a temperature range of up to about 1300 oC, because (a) Applicants do not specifically claim what the “phase transition” refers to, and (b) the claim limitation of claim 15 should be inherent since Kobayashi et al. disclose NbN for the polarity inverting layer, which is one of the materials Applicants originally disclosed and claim in claims 13 and 69 for the polarity inverting layer (claim 15). Since both Mishra et al. and Kobayashi et al. teach a semiconductor device or a semiconductor structure comprising a polarity inverting layer, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the polarity inverting layer disclosed by Mishra et al. can be NbN or can be replaced with NbN, because (a) NbN has been a well-known polarity inverting layer material for forming GaN-based semiconductor layers as disclosed by Kobayashi et al., and (b) it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use, In re Leshin, 125 USPQ 416. Regarding claim 66, Mishra et al. differ from the claimed invention by not showing that the Group III nitride semiconductor structure comprises an aluminum nitride layer on the polarity inverting layer. Mishra et al. further disclose that the Group III nitride semiconductor structure (composite layer of 12-18) comprises a GaN layer or AlGaN layer (12) ([0054]). In addition, Kobayashi et al. disclose that a Group II-nitride semiconductor structure (structure including AlN (N-polar)) comprises an aluminum nitride layer on a polarity inverting layer (NbN). Since both Mishra et al. and Kobayashi et al. teach a semiconductor device or a semiconductor structure, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the Group III nitride semiconductor structure can comprise an aluminum nitride layer on the polarity inverting layer, because (a) AlN has been a well-known nucleation or buffer layer material for forming GaN-based semiconductor layers in addition to GaN and AlGaN layer disclosed by Mishra et al. as disclosed by Kobayashi et al., and (b) it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use, In re Leshin, 125 USPQ 416. Regarding claim 67, Mishra et al. further disclose that the Group III nitride semiconductor structure (composite structure of 12-18) comprises a gallium nitride layer (16) ([0056]) on the aluminum nitride layer. Regarding claim 71, Mishra et al. disclose a semiconductor device (Fig. 2), comprising: a substrate (10) comprising a silicon carbide substrate ([0070]); a polarity inverting layer (not-shown layer formed by nitridation or not-shown thin III-N layer with very high magnesium doping) ([0070]) on a silicon face of the silicon carbide substrate as discussed above with regard to the same limitation recited in claim 1, and a nitrogen-polar (N-polar) Group III-nitride semiconductor structure (composite structure of 12-18) on the polarity inverting layer. Mishra et al. differ from the claimed invention by not showing that the polarity inverting layer has a hexagonal close packed (HCP) crystal structure or a face centered cubic (FCC) crystal structure. Kobayashi et al. disclose a semiconductor device or a semiconductor structure (Fig. 3), comprising: a substrate (substrate in Fig. 3); a polarity inverting layer (NbN), where the polarity inverting layer (NbN) has a hexagonal close packed (HCP) crystal structure or a face centered cubic (FCC) crystal structure, which is inherent because Kobayashi et al. disclose NbN as the material for the polarity inverting layer, which is one of the materials Applicants originally disclosed and claim in claims 13 and 69. Since both Mishra et al. and Kobayashi et al. teach a semiconductor device or a semiconductor structure comprising a polarity inverting layer, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the polarity inverting layer disclosed by Mishra et al. can be NbN or can be replaced with NbN, because (a) NbN has been a well-known polarity inverting layer material for forming GaN-based semiconductor layers, and (b) it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use, In re Leshin, 125 USPQ 416. Response to Arguments Applicants’ arguments with respect to claims 1, 71 and 72 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Kneissel et al. (US 2006/0073621) Applicants' amendment necessitated the new ground of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicants are reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAY C KIM whose telephone number is (571) 270-1620. The examiner can normally be reached 8:00 AM - 6:00 PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Joshua Benitez can be reached at (571) 270-1435. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JAY C KIM/Primary Examiner, Art Unit 2815 /J. K./Primary Examiner, Art Unit 2815 February 26, 2026
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Prosecution Timeline

Feb 03, 2023
Application Filed
Jul 16, 2025
Non-Final Rejection — §102, §103
Oct 09, 2025
Examiner Interview Summary
Oct 09, 2025
Applicant Interview (Telephonic)
Oct 17, 2025
Response Filed
Dec 17, 2025
Final Rejection — §102, §103
Feb 23, 2026
Response after Non-Final Action
Feb 26, 2026
Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

4-5
Expected OA Rounds
48%
Grant Probability
70%
With Interview (+21.9%)
3y 8m
Median Time to Grant
High
PTA Risk
Based on 849 resolved cases by this examiner. Grant probability derived from career allow rate.

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