DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 04/13/2026 has been entered.
Response to Amendment
The Amendment filed on 04/13/2026 has been entered. Claims 1-20 remain pending in the application. Claims 19 and 20 have been withdrawn in the Response to Election/Restriction filed on 07/14/2025.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1 and 10 are rejected under 35 U.S.C. 102(a)(1) as being anticipated Hsien-Wei Chen et al., (United States Patent Application Publication Number, US 2016/00935572 A1), hereinafter referenced as Chen_572.
Regarding claim 1, Chen_572 teaches a package, comprising: a die (Fig.5, element #202); a plurality of through vias surrounding the die (Fig.6, elements #302, see also Fig.9 for a top view); a dummy structure disposed between the die and the plurality of through vias and adjacent to at least one corner of the die (Fig.6, element #304, located on the right side of the die, and adjacent to the upper right corner of the die as seen in Fig.9); an encapsulant encapsulating the die, the plurality of through vias and the dummy structure (Fig.6, element #402); and a redistribution structure disposed on the die, the plurality of through vias, the dummy structure and the encapsulant and electrically connected to the die and the plurality of through vias (Fig.6, element #602), wherein in a cross-sectional view, the dummy structure is located between the die and one of the plurality of through vias (Fig.6, element #304 located on the right side of the die), the dummy structure has a first sidewall facing the die (Fig.6, left sidewall of element #304 located on the right side of the die), and a second sidewall opposite to the first sidewall and facing the one of the plurality of through vias (Fig.6, right sidewall of element #304 located on the right side of the die), the die has a third sidewall facing the dummy structure (Fig.6, right sidewall of the die), the one of the plurality of through vias has a fourth sidewall facing the dummy structure (Fig.6, left sidewall of the rightmost element #302), and a distance between the first sidewall and the third sidewall along a horizontal direction is smaller than a distance between the second sidewall and the fourth sidewall along the horizontal direction (paragraph [0034], rows 27-33).
Regarding claim 10, Chen_572 teaches a package structure, comprising: a first package (Fig.8, element #600), comprising a die (Fig.8, element #202, numbered in Fig.5); a plurality of through vias surrounding the die (Fig.8, elements #302, see also Fig.9 for a top view); a dummy structure disposed between the die and the plurality of through vias and adjacent to at least one corner of the die (Fig.6, element #304, located on the right side of the die, and adjacent to the upper right corner of the die as seen in Fig.9); an encapsulant encapsulating the die, the plurality of through vias and the dummy structure (Fig.8, element #402 numbered in Fig.6); and a redistribution structure disposed on the die, the plurality of through vias, the dummy structure and the encapsulant and electrically connected to the die and the plurality of through vias (Fig.8, element #102); a plurality of joint terminals disposed on and electrically connected to the plurality of through vias (Fig.8, elements #806); and a second package electrically connected to the first package through the plurality of joint terminals (Fig.8, elements #804), wherein in a cross-sectional view, the dummy structure is located between the die and one of the plurality of through vias (Fig.8, element #304 located on the right side of the die), the dummy structure has a first sidewall facing the die (Fig.8, left sidewall of element #304 located on the right side of the die), and a second sidewall opposite to the first sidewall and facing the one of the plurality of through vias (Fig.8, right sidewall of element #304 located on the right side of the die), the die has a third sidewall facing the dummy structure (Fig.8, right sidewall of the die #202), the one of the plurality of through vias has a fourth sidewall facing the dummy structure (Fig.8, left sidewall of the rightmost element #302), and a distance between the first sidewall and the third sidewall along a horizontal direction is smaller than a distance between the second sidewall and the fourth sidewall along the horizontal direction (paragraph [0034], rows 27-34).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Chen_572, in view of Lin, (United States Patent Publication Application Number, US 2018/0151502 A1) hereinafter referenced as Lin.
Regarding claim 2, Chen_572 teaches the package of claim 1 as set forth in the anticipation rejection. Chen_572 further teaches the package according to claim 1, wherein the dummy structure is made of metal (paragraph [0025], row 1). Chen_572 does not teach what metal is used to make the dummy structure. Lin teaches the dummy structure can be made of copper (paragraph [0030], rows 3-7, and copper has the Young's modulus greater than 10 GPa, and coefficient of thermal expansion less than 44 ppm/*C). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Lin and disclose wherein the dummy structure is made of a material which has the Young's modulus greater than 10 GPa, and coefficient of thermal expansion less than 44 ppm/*C). As disclosed by Chu, the dummy structure may include materials for raising the CTE to prevent warpage of the package (paragraph [0030], rows 3-7, and paragraph [0024], rows 1-4).
Regarding claim 11, Chen_572 teaches the package structure of claim 10 as set forth in the anticipation rejection. Chen_572 further teaches the package structure according to claim 10, wherein the dummy structure is made of metal (paragraph [0025], row 1). Chen_572 does not teach what metal is used to make the dummy structure. Lin teaches the dummy structure can be made of copper (paragraph [0030], rows 3-7, and copper has the Young's modulus greater than 10 GPa, and coefficient of thermal expansion less than 44 ppm/*C). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Lin and disclose wherein the dummy structure is made of a material which has the Young's modulus greater than 10 GPa, and coefficient of thermal expansion less than 44 ppm/*C). As disclosed by Chu, the dummy structure may include materials for raising the CTE to prevent warpage of the package (paragraph [0030], rows 3-7, and paragraph [0024], rows 1-4).
Claims 3 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Chen_572, in view of Chih-Wei Wu et al., (United States Patent Application Publication Number, US 2020/0365525 A1), hereinafter referenced as Wu.
Regarding claim 3, Chen_572 teaches the package of claim 1 as set forth in the anticipation rejection. Chen_572 does not teach the package according to claim 1, wherein a number of the dummy structure is a multiple of four, and the multiple of four dummy structures are disposed adjacent to four corners of the die. Wu teaches wherein a number of the dummy structure is a multiple of four, and the multiple of four dummy structures are disposed adjacent to four corners of the die (Fig.20A, there are 4 dummy structures, element #54, adjacent to the corners of dies, element #28). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Wu and disclose wherein a number of the dummy structure is a multiple of four, and the multiple of four dummy structures are disposed adjacent to four corners of the die. Having the dummy structures disposed in positions adjacent to the corners of the die allows for increased precision in placing the die in the desired position, if the dummy structures are used as guides. Furthermore, it creates a more uniform surface density, which reduces variations in encapsulation film thickness during planarization process.
Regarding claim 12, Chen_572 teaches the package structure of claim 10 as set forth in the anticipation rejection. Chen_572 does not teach the package structure according to claim 10, wherein a number of the dummy structure is a multiple of four, and the multiple of four dummy structures are disposed adjacent to four corners of the die. Wu teaches wherein a number of the dummy structure is a multiple of four, and the multiple of four dummy structures are disposed adjacent to four corners of the die (Fig.20A, there are 4 dummy structures, element #54, adjacent to the corners of dies, element #28). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Wu and disclose wherein a number of the dummy structure is a multiple of four, and the multiple of four dummy structures are disposed adjacent to four corners of the die. Having the dummy structures disposed in positions adjacent to the corners of the die allows for increased precision in placing the die in the desired position, if the dummy structures are used as guides. Furthermore, it creates a more uniform surface density, which reduces variations in encapsulation film thickness during planarization process.
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Chen_572, in view of Yuka Tamadate, (United States Patent Application Publication Number, US 2009/0154128 A1), hereinafter referenced as Tamadate.
Regarding claim 4, Chen_572 teaches the package of claim 1 as set forth in the anticipation rejection. Chen_572 does not teach the package according to claim 1, wherein the dummy structure is a ring structure surrounding the die. Tamadate teaches wherein the dummy structure is a ring structure surrounding the die (Fig.1, dummy structure, element #217 is a ring surrounding die, element #202). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Tamadate and disclose wherein the dummy structure is a ring structure surrounding the die. As disclosed by Tamadate, the dummy structures can be used to dissipate heat away from the device and making the dummy structure in the form of a ring surrounding the die, provides a uniform heat dissipation in all directions.
Claims 7 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Chen_572.
Regarding claim 7, Chen_572 teaches the package of claim 1 as set forth in the anticipation rejection. Chen_572 further teaches the package according to claim 1, wherein the distance between the first sidewall and the third sidewall along the horizontal direction is between 50 um and 100 um (paragraph [0034], rows 31-34). The claimed range, equal to or greater than 60um and less than 300um, overlaps or lies inside the range disclosed by Chen_572 and therefore a prima facie case of obviousness exists (MPEP 2144.05).
Regarding claim 15, Chen_572 teaches the package structure of claim 10 as set forth in the anticipation rejection. Chen_572 further teaches the package structure according to claim 10, wherein the distance between the first sidewall and the third sidewall along the horizontal direction is between 50 um and 100 um (paragraph [0034], rows 31-34). The claimed range, equal to or greater than 60um and less than 300um, overlaps or lies inside the range disclosed by Chen_572 and therefore a prima facie case of obviousness exists (MPEP 2144.05).
Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Chen_572, in view of Li-Hsien Huang et al., (United States Patent Application Publication Number, US 2019/0035772 A1), hereinafter referenced as Huang.
Regarding claim 18, Chen_572 teaches the package structure of claim 10 as set forth in the anticipation rejection. Chen_572 does not teach the package structure according to claim 10, further comprising: an integrated passive device disposed on and electrically connected to the redistribution structure, wherein the integrated passive device and the die are located on opposite sides of the redistribution structure, respectively. Huang teaches: an integrated passive device (Fig.5, element #184) disposed on and electrically connected to the redistribution structure (Fig.5, element #184 is disposed on and electrically connected to redistribution layer, element #140), wherein the integrated passive device and the die are located on opposite sides of the redistribution structure, respectively (Fig.5, element #184 and element #10 are located on opposite sides of RDL, element #140). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Huang and disclose an integrated passive device disposed on and electrically connected to the redistribution structure, wherein the integrated passive device and the die are located on opposite sides of the redistribution structure, respectively. Passive devices are routinely used in circuits to control electric currents and impedance, and placing the passive devices on the other side of the redistribution layer as compared to the die can reduce the overall area of the redistribution layer as compared to placing them on the same side of the redistribution layer.
Claims 1, 2, 5, 8, 10, 11, 13 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Hsien-Wei Chen et al., (United States Patent Application Publication Number, US 2018/0082987 A1), hereinafter referenced as Chen_987, in view of Chen_572.
Regarding claim 1, Chen_987 teaches a package, comprising: a die (Fig.3B, element #140); a plurality of through vias the die (Fig.3B, element #116). Chen_987 does not teach the plurality of through vias surrounding the die. Chen_572 teaches a plurality of through vias surrounding the die (Fig.6, elements #302, see also Fig.9 for a top view). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Chen_572 and disclose the plurality of through vias surrounding the die. As disclosed by Chen_572, the through vias can be used to connect a second semiconductor device to the package (Fig.18) and disposing the through vias around the die and on all sides of the package allows for shorter connections between the vias and the second device, which in turn can decrease connection resistance, increase data transmission speed and limit IR drops.
Chen_987 further teaches a dummy structure disposed between the die and the plurality of through vias (Fig.3B, element #162) and adjacent to at least one corner of the die (Fig.2A, element #160 is adjacent to a corner of die, element #140); an encapsulant encapsulating the die, the plurality of through vias and the dummy structure (Fig.3C, element #170, paragraph [0048], rows 1-5); and a redistribution structure disposed on the die, the plurality of through vias, the dummy structure and the encapsulant (Fig.3D, element #180) and electrically connected to the die and the plurality of through vias (Fig.3D, element #180 is showed connected to element #116 and #140), wherein in a cross-sectional view, the dummy structure is located between the die and one of the plurality of through vias (Fig.3B, element #162 is located between the die, element #140 and the through via, element #116 located on the left side of the figure), the dummy structure has a first sidewall facing the die (Fig.3B, right sidewall of element #162), and a second sidewall opposite to the first sidewall and facing the one of the plurality of through vias (Fig.3B, left sidewall of element #162), the die has a third sidewall facing the dummy structure (Fig.3B, left sidewall of the die, element #140), the one of the plurality of through vias has a fourth sidewall facing the dummy structure (Fig.3B, right sidewall element #116 located on the right side of the figure).
Chen_987 does not teach a distance between the first sidewall and the third sidewall along a horizontal direction is smaller than a distance between the second sidewall and the fourth sidewall along the horizontal direction. Chen_572 teaches wherein in a cross-sectional view, the dummy structure is located between the die and one of the plurality of through vias (Fig.6, element #304 located on the right side of the die), the dummy structure has a first sidewall facing the die (Fig.6, left sidewall of element #304 located on the right side of the die), and a second sidewall opposite to the first sidewall and facing the one of the plurality of through vias (Fig.6, right sidewall of element #304 located on the right side of the die), the die has a third sidewall facing the dummy structure (Fig.6, right sidewall of the die), the one of the plurality of through vias has a fourth sidewall facing the dummy structure (Fig.6, left sidewall of the rightmost element #302), and a distance between the first sidewall and the third sidewall along a horizontal direction is smaller than a distance between the second sidewall and the fourth sidewall along the horizontal direction (paragraph [0034], rows 27-33). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention to incorporate the teachings of Chen_572 and disclose a distance between the first sidewall and the third sidewall along a horizontal direction is smaller than a distance between the second sidewall and the fourth sidewall along the horizontal direction. As disclosed by Chen_572, the location of the dummy structure is designed to provide a uniform metal distribution within the package and increase the density of metal elements to prevent dishing during processing steps (paragraph [0011], rows 2-5 and paragraph [0034], rows 11-17)
Regarding claim 2, the combination of Chen_987 and Chen_572 teaches the package of claim 1 as set forth in the obviousness rejection. Chen_987 further teaches the package according to claim 1, wherein Young's modulus of the dummy structure is greater than 10 GPa, and coefficient of thermal expansion of the dummy structure is less than 44 ppm/0C (dummy structure is made of silicon which satisfies both limitations, paragraph [0021], row 2).
Regarding claim 5, the combination of Chen_987 and Chen_572 teaches the package of claim 1 as set forth in the obviousness rejection. Chen_987 further teaches the package according to claim 1, further comprising: a first attach film disposed on the die (Fig.3B, part of element #108, disposed on the bottom of the die, paragraph [0046], rows 5-6) wherein the first attach film and the redistribution structure are located on opposite sides of the die, respectively (Fig.3D, element #180 and element #108, labeled in figure 3B, are on opposite sides of die, element #140); and a second attach film disposed on the dummy structure (Fig.3B, part of element #108, disposed on the bottom of the dummy structure, element #162) wherein the second attach film and the redistribution structure are located on opposite sides of the dummy structure, respectively (Fig.3D, element #180 and element #108, labeled in Fig.3B, are on opposite sides of dummy structure, element #162).
Regarding claim 8, the combination of Chen_987 and Chen_572 teaches the package of claim 1 as set forth in the obviousness rejection. Chen_987 further teaches the package according to claim 1, wherein a width of the dummy structure along a first direction is WX (Fig.2A, width of element #160 in X direction), a width of the dummy structure along a second direction is WY (Fig.2A, width of element #160 in X direction), and the package satisfies one of the following: 0.33*WX <WY<3*WX; and 0.33*WY<WX<3*WY (Fig.2A, the width of element #160 in X direction is larger than the width in the Y direction and therefore is larger than 0.33 of the width in Y direction; and the width of element #160 in X direction is less than 3 times the width in the Y direction).
Regarding claim 10, Chen_987 teaches a package structure, comprising: a first package (Fig.3G, element #200), comprising a die (Fig.3B, element #140); a plurality of through vias (Fig.3B, element #116). Chen_572 teaches a plurality of through vias surrounding the die (Fig.6, elements #302, see also Fig.9 for a top view). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Chen_572 and disclose the plurality of through vias surrounding the die. As disclosed by Chen_572, the through vias can be used to connect a second semiconductor device to the package (Fig.18) and disposing the through vias around the die and on all sides of the package allows for shorter connections between the vias and the second device, which in turn can decrease connection resistance, increase data transmission speed and limit IR drops.
Chen_987 further teaches a dummy structure disposed between the die and the plurality of through vias (Fig.3B, element #162) and adjacent to at least one corner of the die (Fig.2A, element #160 is adjacent to a corner of die, element #140); an encapsulant encapsulating the die, the plurality of through vias and the dummy structure (Fig.3C, element #170, paragraph [0048], rows 1-5) and a redistribution structure disposed on the die, the plurality of through vias, the dummy structure and the encapsulant (Fig.3D, element #180) and electrically connected to the die and the plurality of through vias (Fig.3D, element #180 is showed connected to element #116 and #140); a plurality of joint terminals disposed on and electrically connected to the plurality of through vias (Fig.3G, element #196); and a second package electrically connected to the first package through the plurality of joint terminals (Fig.3G, element #300), wherein in a cross-sectional view, the dummy structure is located between the die and one of the plurality of through vias (Fig.3B, element #162 is located between the die, element #140, and the through via, element #116, located on the left side of the figure), the dummy structure has a first sidewall facing the die (Fig.3B, right sidewall of element #162), and a second sidewall opposite to the first sidewall and facing the one of the plurality of through vias (Fig.3B, left sidewall of element #162) the die has a third sidewall facing the dummy structure (Fig.3B, left sidewall of the die, element #140), the one of the plurality of through vias has a fourth sidewall facing the dummy structure (Fig.3B, right sidewall element #116 located on the right side of the figure).
Chen_987 does not teach a distance between the first sidewall and the third sidewall along a horizontal direction is smaller than a distance between the second sidewall and the fourth sidewall along the horizontal direction. Chen_572 teaches wherein in a cross-sectional view, the dummy structure is located between the die and one of the plurality of through vias (Fig.6, element #304 located on the right side of the die), the dummy structure has a first sidewall facing the die (Fig.6, left sidewall of element #304 located on the right side of the die), and a second sidewall opposite to the first sidewall and facing the one of the plurality of through vias (Fig.6, right sidewall of element #304 located on the right side of the die), the die has a third sidewall facing the dummy structure (Fig.6, right sidewall of the die), the one of the plurality of through vias has a fourth sidewall facing the dummy structure (Fig.6, left sidewall of the rightmost element #302), and a distance between the first sidewall and the third sidewall along a horizontal direction is smaller than a distance between the second sidewall and the fourth sidewall along the horizontal direction (paragraph [0034], rows 27-33). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention to incorporate the teachings of Chen_572 and disclose a distance between the first sidewall and the third sidewall along a horizontal direction is smaller than a distance between the second sidewall and the fourth sidewall along the horizontal direction. As disclosed by Chen_572, the location of the dummy structure is designed to provide a uniform metal distribution within the package and increase the density of metal elements to prevent dishing during processing steps (paragraph [0011], rows 2-5 and paragraph [0034], rows 11-17).
Regarding claim 11, the combination of Chen_987 and Chen_572 teaches the package structure of claim 10 as set forth in the obviousness rejection. Chen_987 further teaches the package structure according to claim 10, wherein Young's modulus of the dummy structure is greater than 10 GPa, and coefficient of thermal expansion of the dummy structure is less than 44 ppm/0C (dummy structure is made of silicon which satisfies both limitations, paragraph [0021], row 2).
Regarding claim 13, the combination of Chen_987 and Chen_572 teaches the package structure of claim 10 as set forth in the obviousness rejection. Chen_987 further teaches the package according to claim 10, further comprising: a first attach film disposed on the die (Fig.3B, part of element #108, disposed on the bottom of the die, paragraph [0046], rows 5-6) wherein the first attach film and the redistribution structure are located on opposite sides of the die, respectively (Fig.3D, element #180 and element #108, labeled in figure 3B, are on opposite sides of die, element #140); and a second attach film disposed on the dummy structure (Fig.3B, part of element #108, disposed on the bottom of the dummy structure, element #162) wherein the second attach film and the redistribution structure are located on opposite sides of the dummy structure, respectively (Fig.3D, element #180 and element #108, labeled in Fig.3B, are on opposite sides of dummy structure, element #162).
Regarding claim 16, the combination of Chen_987 and Chen_572 teaches the package structure of claim 10 as set forth in the obviousness rejection. Chen_987 further teaches the package structure according to claim 10, wherein a width of the dummy structure along a first direction is WX (Fig.2A, width of element #160 in X direction), a width of the dummy structure along a second direction is WY (Fig.2A, width of element #160 in X direction), and the package satisfies one of the following: 0.33*WX <WY<3*WX; and 0.33*WY<WX<3*WY (Fig.2A, the width of element #160 in X direction is larger than the width in the Y direction and therefore is larger than 0.33 of the width in Y direction; and the width of element #160 in X direction is less than 3 times the width in the Y direction).
Claims 6 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Chen_987, in view of Chen_572 and in view of Wen-Long Lu, (United States Patent Application Publication Number, US 2021/0066188 A1), hereinafter referenced as Lu.
Regarding claim 6, the combination of Chen_987 and Chen_572 teaches the package of claim 1 as set forth in the obviousness rejection. Chen_987 teaches wherein a thickness of the dummy structure is smaller than a thickness of the plurality of through vias (Fig.3B, the thickness of dummy structure, element #162, in the vertical direction is smaller than the thickness of the through vias, element #116, in the vertical direction). The combination of Chen_987 and Chen_572 does not teach the package according to claim 1, wherein a thickness of the dummy structure is equal to or greater than a total thickness of a semiconductor substrate and an interconnect structure of the die. Lu teaches wherein a thickness of the dummy structure is equal to or greater than a total thickness of a semiconductor substrate and an interconnect structure of the die (Fig.1, the thickness of the dummy structure, element #13, in the vertical direction, is greater than the total thickness of a semiconductor substrate, element #12, and an interconnect structure of the die, formed by element #123 and #125, in the vertical direction. Note that element #12 is a semiconductor chip and therefore includes a substrate). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Lu and disclose wherein a thickness of the dummy structure is equal to or greater than a total thickness of a semiconductor substrate and an interconnect structure of the die. As disclosed by Lu, dummy structures of different heights are necessary to prevent warpage of the package (paragraph [0076], rows 1-11). Furthermore, the package may include dies with different thickness and making the height of the dummy structure greater than the height of the dies prevents the formation of dimples in the encapsulation material which may results in cracks and voids (paragraph [0060], rows 15-25).
Regarding claim 14, the combination of Chen_987 and Chen_572 teaches the package structure of claim 10 as set forth in the obviousness rejection. Chen_987 teaches wherein a thickness of the dummy structure is smaller than a thickness of the plurality of through vias (Fig.3B, the thickness of dummy structure, element #162, in the vertical direction is smaller than the thickness of the through vias, elements #116, in the vertical direction). The combination of Chen_987 and Chen_572 does not teach the package structure according to claim 10, wherein a thickness of the dummy structure is equal to or greater than a total thickness of a semiconductor substrate and an interconnect structure of the die. Lu teaches wherein a thickness of the dummy structure is equal to or greater than a total thickness of a semiconductor substrate and an interconnect structure of the die (Fig.1, the thickness of the dummy structure, element #13, in the vertical direction, is greater than the total thickness of a semiconductor substrate, element #12, and an interconnect structure of the die, formed by element #123 and #125, in the vertical direction. Note that element #12 is a semiconductor chip and therefore includes a substrate). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Lu and disclose wherein a thickness of the dummy structure is equal to or greater than a total thickness of a semiconductor substrate and an interconnect structure of the die. As disclosed by Lu, dummy structures of different heights are necessary to prevent warpage of the package structure (paragraph [0076], rows 1-11). Furthermore, the package may include dies with different thickness and making the height of the dummy structure greater than the height of the dies prevents the formation of dimples in the encapsulation material which may results in cracks and voids (paragraph [0060], rows 15-25).
Claims 9 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Chen_987, in view of Chen_572, and in view of Hsien-Wei Chen et al., (United States Patent Application Publication Number, US 2015/0371947 A1), hereinafter referenced as Chen_947.
Regarding claim 9, the combination of Chen_987 and Chen_572 teaches the package of claim 1 as set forth in the obviousness rejection. Chen_987 does not teach the package according to claim 1, wherein the distance between the second sidewall and the fourth sidewall along the horizontal direction is equal to or greater than 300 um. Chen_572 teaches wherein the distance between the second sidewall and the fourth sidewall along the horizontal direction is between 100 um and about 300 um (paragraph [0034], rows 27-30). Chen_947 teaches wherein the distance between the second sidewall and the fourth sidewall along the horizontal direction is equal to or greater than 300 um (Fig.18, the horizontal distance between the left sidewall of the rightmost element #182 and the right sidewall of the rightmost element #106, is equal to the width of a through via (paragraph [0108], rows 2-5), and the width of a through via is in the range between 140 um to 310 um (paragraph [0088], rows 12-15). The claimed range, equal to or greater than 300 um, overlaps the range disclosed by Chen_947 and therefore a prima facie case of obviousness exists (MPEP 2144.05).
Regarding claim 17, the combination of Chen_987 and Chen_572 teaches the package structure of claim 10 as set forth in the obviousness rejection. Chen_987 does not teach the package according to claim 10, wherein the distance between the second sidewall and the fourth sidewall along the horizontal direction is equal to or greater than 300 um. Chen_572 teaches wherein the distance between the second sidewall and the fourth sidewall along the horizontal direction is between 100 um and about 300 um (paragraph [0034], rows 27-30). Chen_947 teaches wherein the distance between the second sidewall and the fourth sidewall along the horizontal direction is equal to or greater than 300 um (Fig.18, the horizontal distance between the left sidewall of the rightmost element #182 and the right sidewall of the rightmost element #106, is equal to the width of a through via (paragraph [0108], rows 2-5), and the width of a through via is in the range between 140 um to 310 um (paragraph [0088], rows 12-15). The claimed range, equal to or greater than 300 um, overlaps the range disclosed by Chen_947 and therefore a prima facie case of obviousness exists (MPEP 2144.05).
Response to Arguments
Applicant’s arguments filed on 04/13/2026 have been fully considered but they
are not persuasive. Applicant’s arguments with respect to claims have been considered but are moot because the new ground of rejection does not rely on any reference as applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
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Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at (571)270-7877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/CRISTIAN A TIVARUS/Examiner, Art Unit 2899 /DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899
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