Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 07/20/2026 has been entered.
Claim status
Claims 12-29 are pending.
Response to Arguments
Applicant’s arguments with respect to claim(s) 12 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Applicant argues Sato fails to disclose a trench extending down to at least a top surface of the substrate. Examiner agrees with this assertion. However, a new ground of rejection has been applied in this Office action in view of Hsieh et al. (US 20140346593 A1).
The second argument (“Because Sato's second semiconductor film 66 actively participates in charge balance with N-type region 12 to establish breakdown voltage, it constitutes an active semiconductor column rather than a passive fill material”) is moot, as Sato has not relied upon to teach this in the current Office action.
Applicant argues claim 12 has been amended to explicitly recite that "the first N-type region and the P-type liner form charge-balanced regions for the super junction device." And Sato does not teach the new claim amendments. However, this argument is moot as Sato has not relied upon for teaching this limitation in the current Office action. The claim amendments necessitated an updated search and the new art Hsieh et al. (US 20140346593 A1) has been relied upon to address this limitation.
Therefore, the rejection stands.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 12, 17-19, 23 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hsieh et al. (US 20140346593 A1; hereinafter “Hsieh”).
In re claim 12, Hsieh discloses in figs. 2A, 4A-4K, a method of forming a super junction device, the method comprising:
forming an N-type material 201 on a substrate 202 (fig. 4A; ¶32);
etching a trench 234 in the N-type material 201, wherein the trench 234 extends from a top surface of the N-type material 201 down to at least a top surface of the substrate 202 to form a first N-type region 206’ and a second N-type region 236 (figs. 4A-4C; ¶32-36);
forming a P-type liner 207 in the trench 234 (fig. 4D; ¶35-36; p-type liner 207 is formed on the sidewalls of the trench 234, which teaches the claimed limitation of forming a P-type liner 207 in the trench. Note, Applicant discloses in para. [0037] of the Applicant’s own disclosure US 20240282813 A1, “The deposition or formation may be performed in any number of ways, and in some embodiments the material may be formed conformally about the trench feature”.),
wherein the first N-type region 206’ and the P-type liner 207 form charge-balanced regions for the super junction device (“As shown in dashed brace, each the P second doped column region 207 and the adjacent N sub-doped column region 206' constitute the P/N charge balance area”; ¶27); and
filling the trench 234 with a passive fill material 205 (fig. 4E; ¶37),
wherein the passive fill material 205 comprises a void (“a buried void inside the dielectric material 205”; ¶37) or seam inside the passive fill material 205.
In re claim 14, Hsieh discloses in figs. 2A, 4A-4K, the method of claim 12, wherein the trench 234 is filled with the passive fill material 205 without one or more grow-etch cycles (fig. 4E; ¶37).
In re claim 17, Hsieh discloses in figs. 2A, 4A-4K, the method of claim 12, further comprising planarizing a top surface of the device after filling the trench 234 with the passive fill material 205 to remove excess passive fill material (¶37).
In re claim 18, Hsieh discloses in figs. 2A, 4A-4K, the method of claim 12, wherein the trench 234 is etched below the top surface of the substrate 202 (fig. 4B, ¶33).
In re claim 19, Hsieh discloses in fig. 4B, the method of claim 12, wherein the P-type liner 207 is grown on sidewalls of the trench 234 as a P-doped epitaxial silicon liner (¶33-36).
In re claim 23, Hsieh discloses in figs. 2A, 4A-4K, the method of claim 12, wherein the method further comprises:
forming a first contact region 202 that comprises a drain of a super junction transistor (figs. 2A, 4A; ¶27, 32);
forming a second contact region 210 that comprises a gate G of the super junction transistor (fig. 4H; ¶40); and
forming a third contact region 216 that comprises a source of the super junction transistor (fig. 4I; ¶42).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 13, 16 and 27 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hsieh, as applied to claim 12 above and further in view of Sato et al. (US 20150076589 A1; hereinafter “Sato”).
In re claim 13, Hsieh discloses the method of claim 12 outlined above.
Hsieh does not expressly disclose wherein the trench is filled with the passive fill material in less than 15 minutes.
In the same field of endeavor, Sato discloses in fig. 6, a super junction device, wherein the second semiconductor films 66 are formed under a condition (condition b) of a comparatively high film growth rate and poor coverage in FIG. 5. By this means, it is possible to intentionally form voids, control shapes of the voids, increase the film growth rates and improve productivity (¶53-54). Therefore, Sato recognized that the trench is filled with the passive fill material with a high speed epitaxy process.
It would therefore have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to experiment from Sato’s teachings and arrived at the claimed time of 15 minutes, as Sato teaches by this means, it is possible to intentionally form voids, control shapes of the voids, increase the film growth rates and improve productivity. In addition, the shapes of the voids can be controlled by not only controlling the epitaxial growth condition but also controlling shapes of trenches, or controlling the shapes of the trenches and controlling the epitaxial growth condition in combination (¶54).
MPEP §2144.05-II (A) states "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) (Claimed process which was performed at a temperature between 40°C and 80°C and an acid concentration between 25% and 70% was held to be prima facie obvious over a reference process which differed from the claims only in that the reference process was performed at a temperature of 100°C and an acid concentration of 10%.).
Furthermore, MPEP §2144.05-II (B) describes that it is considered to be prima facie obvious when there is a motivation to optimize result-effective variables, i.e., a variable which achieves a recognized result.
In re Claim 16, Hsieh discloses the method of claim 12 outlined above.
Hsieh does not expressly disclose wherein the trench is filled with the passive fill material at a temperature greater than or about 9000 C.
In the same field of endeavor, Sato discloses in figs. 1-6, a method of forming a super junction device, wherein a trench 62 is filled with the passive fill material 66 at a temperature greater than or about 900° C (¶51; “The first semiconductor films 64 and the second semiconductor films 66 are formed by, for example, CVD. CVD conditions include that, for example, source gas is dichlorosilane (DCS:SiH.sub.2Cl.sub.2) and hydrochloric acid (HCl), a temperature is 950.degree. C. to 1100.degree. C.”).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to employ the teachings of Sato and arrive at the claimed temperature range for the trench filling process in Hsieh’s super junction device to achieve a thermally stable passive fill materials in the trench.
In re Claim 27, Hsieh discloses the method of claim 12 outlined above.
Hsieh does not expressly disclose wherein a void or seam is at least 1 µm from a bottom of the passive fill material, and the void or seam is at least 1 µm from a top of the passive fill material.
In the same field of endeavor, Sato discloses in the embodiment shown in figs. 9-10, a method of forming a super junction device, wherein a location of the void with respect to the neighboring void and within the passive fill material controls stress at the void end portion and the stress at the void end portion can be made sufficiently little stress to such a degree that a defect such as dislocation is not produced (¶72-74). Therefore, Sato recognized that controlling the location of the void with the passive fill material is a result-effective variable.
It would therefore have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to optimize the location of the void relative to the top and bottom of the passive fill material and make a void or seam is a least 1 µm from a bottom of the passive fill material, and the void or seam is at least 1 µm from a top of the passive fill material in the superfunction device of Hsieh to control the stress at the void end portion to such a degree that a defect such as dislocation is not produced (¶72-74 of Sato).
One would have been motivated to do so as Sato recognizes that optimization of the location of the void is a known result effective variable as explained above.
MPEP §2144.05-II (A) states "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) (Claimed process which was performed at a temperature between 40°C and 80°C and an acid concentration between 25% and 70% was held to be prima facie obvious over a reference process which differed from the claims only in that the reference process was performed at a temperature of 100°C and an acid concentration of 10%.).
Furthermore, MPEP §2144.05-II (B) describes that it is considered to be prima facie obvious when there is a motivation to optimize result-effective variables, i.e., a variable which achieves a recognized result.
Claim(s) 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hsieh, as applied to claim 12 above and further in view of Ishiguro et al. (US 20080258239 A1; hereinafter “Ishiguro”).
In re Claim 15, Hsieh discloses the method of claim 12 outlined above.
Hsieh does not expressly disclose wherein the passive fill material comprises undoped silicon.
In the same field of endeavor, Ishiguro discloses in figs. 1-5, a method of forming a super junction device, wherein a passive fill material 35 comprises undoped silicon (e.g., a single crystal silicon; ¶50, 52).
It would therefore have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form passive fill material in Hsieh comprising undoped silicon in order to have a thermally stable inorganic material in the deep trenches to achieve the most desirable electrical characteristics without an undesirable impact on mechanical properties (¶52 of Ishiguro).
Claim(s) 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hsieh as applied to claim 12 above and further in view of Tokano et al. (US 20060197152 A1; hereinafter “Tokano”).
In re Claim 20, Hsieh discloses the method of claim 12 outlined above.
Hsieh does not expressly disclose wherein a doping concentration of the N-type material is between about 1e14 dopants/cm3 and about 1e16 dopants/cm3, and a doping concentration of the P-type liner is greater than about 8 times the doping concentration of the N-type material.
In the same field of endeavor, Tokano discloses a method of forming a super junction device (figs. 10-12), wherein a doping concentration of a P-type liner 19 (i.e., p; shown in fig. 10) is higher than a doping concentration of the second N-type region 67 (i.e., n-; shown in fig. 10) (¶0074-0078). Tokano further discloses a doping concentration of the P-type liner 19 is between 1015 /cm3 to 1016 /cm3 and the doping concentration of the second N-type region 67 is lower than 1015 /cm3 to 1016 /cm3.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains from the teachings of Tokano and arrive at the claimed concentration ratio (i.e., about 8 times higher doing concentration in the liner) in Hsieh’s super junction device so that the break of the charge balance can be made much smaller (¶0076 of Tokano).
Claim(s) 21, 24, 25, 28-29 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hsieh, as applied to claim 12 above, and further in view of Yang et al. (US 20150061007 A1; hereinafter “Yang”).
In re Claim 21, Hsieh discloses in figs. 2A, 4A-4K, the method of claim 12.
Hsieh does not expressly disclose wherein a height of the P-type liner is greater than or about 40 µm.
In the same field of endeavor, Yang discloses a method of forming a super junction device (figs. 8-19), wherein a height of the P-type liner 1200 is in a range of 30 µm to 40 µm (fig. 19; ¶20), which overlaps the claimed range of greater than or about 40 µm.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains from the teachings of Yang and arrive at the claimed height of the P-type liner in Hsieh’s super junction device to further enhance device performance (¶2-3 of Yang).
In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990). “[A] prior art reference that discloses a range encompassing a somewhat narrower claimed range is sufficient to establish a prima facie case of obviousness." In re Peterson, 315 F.3d 1325, 1330, 65 USPQ2d 1379, 1382-83 (Fed. Cir. 2003). See MPEP § 2144.05, Obviousness of Ranges
Referring to MPEP § 2144.05, “…the applicant must show that the particular range is critical, generally by showing that the claimed range achieves unexpected results over the prior art range.” (See also MPEP § 716.02 for a discussion of criticality and unexpected results.)
In re Claim 24, Hsieh discloses in figs. 2A, 4A-4K, the method of claim 12.
Hsieh further discloses super-junction trench MOSFETs are more attractive due to higher breakdown voltage (¶3).
Hsieh does not expressly disclose wherein the super junction transistor has a breakdown voltage of greater than or about 650 V.
In the same field of endeavor, Yang discloses a method of forming a super junction device (figs. 8-19), wherein the super junction transistor has a breakdown voltage of greater than or about 650 V (e.g., approximately 800 V; ¶16).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains from the teachings of Yang and arrive at the claimed breakdown voltage in Hsieh’s super junction device to meet the demand of high breakdown voltage devices (¶1-3, 16 of Yang).
In re Claim 25, Hsieh discloses in figs. 2A, 4A-4K, the method of claim 12.
Hsieh does not expressly disclose wherein a width of the trench is less than or about 2 µm.
In the same field of endeavor, Yang discloses a method of forming a super junction device (figs. 8-19), wherein a width of the trench is less than or about 2 µm (¶20).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains from the teachings of Yang and arrive at the claimed trench width in Hsieh’s super junction device to further enhance device performance (¶2-3 of Yang).
In re Claim 28, Hsieh discloses in figs. 2A, 4A-4K, the method of claim 12.
Hsieh does not expressly disclose wherein an aspect ratio of an area occupied by the P-type liner and the passive fill material is greater than or about 20.
In the same field of endeavor, Yang discloses a method of forming a super junction device (figs. 8-19), wherein an aspect ratio of an area occupied by the P-type liner 1200, 1400 (¶31) and the passive fill material 1300 is the trenches ranging from approximately 10:1 to approximately 50:1 (¶20), which overlaps the claimed range of greater than or about 20.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains from the teachings of Yang and arrive at the claimed aspect ratio in Hsieh’s super junction device to further enhance device performance (¶2-3 of Yang).
In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990). “[A] prior art reference that discloses a range encompassing a somewhat narrower claimed range is sufficient to establish a prima facie case of obviousness." In re Peterson, 315 F.3d 1325, 1330, 65 USPQ2d 1379, 1382-83 (Fed. Cir. 2003). See MPEP § 2144.05, Obviousness of Ranges
Referring to MPEP § 2144.05, “…the applicant must show that the particular range is critical, generally by showing that the claimed range achieves unexpected results over the prior art range.” (See also MPEP § 716.02 for a discussion of criticality and unexpected results.)
In re Claim 29, Hsieh discloses in figs. 2A, 4A-4K, the method of claim 12.
Hsieh does not expressly disclose wherein an aspect ratio of an area occupied by the P-type liner and the passive fill material is greater than or about 40.
In the same field of endeavor, Yang discloses a method of forming a super junction device (figs. 8-19), wherein an aspect ratio of an area occupied by the P-type liner 1200, 1400 (¶31) and the passive fill material 1300 is the trenches ranging from approximately 10:1 to approximately 50:1 (¶20), which overlaps the claimed range of greater than or about 20.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains from the teachings of Yang and arrive at the claimed aspect ratio in Hsieh’s super junction device to further enhance device performance (¶2-3 of Yang).
In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990). “[A] prior art reference that discloses a range encompassing a somewhat narrower claimed range is sufficient to establish a prima facie case of obviousness." In re Peterson, 315 F.3d 1325, 1330, 65 USPQ2d 1379, 1382-83 (Fed. Cir. 2003). See MPEP § 2144.05, Obviousness of Ranges
Referring to MPEP § 2144.05, “…the applicant must show that the particular range is critical, generally by showing that the claimed range achieves unexpected results over the prior art range.” (See also MPEP § 716.02 for a discussion of criticality and unexpected results.)
Claim(s) 22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hsieh as applied to claim 12 above, and further in view of Fuchs et al. (US 20220028727 A1; hereinafter “Fuchs”).
In re Claim 22, Hsieh discloses in figs. 2A, 4A-4K, the method of claim 12.
Hsieh does not expressly disclose wherein a width of the P-type liner is less than or about 200 nm.
In the same field of endeavor, Fuchs discloses a method of forming a super junction device (figs. 5-6, 10), wherein a width of a pre-filler side wall layer liner 520 is a range from 100 nm to 500 nm (¶48), which overlaps the claimed range of less than or about 200 nm.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains from the teachings of Fuchs and arrive at the claimed width for the P-type liner in Sato’s super junction device to achieve a well-controlled process of trench formation and filling of the trench for the super junction device and reduce defect formation (¶2-5 of Fuchs).
In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990). “[A] prior art reference that discloses a range encompassing a somewhat narrower claimed range is sufficient to establish a prima facie case of obviousness." In re Peterson, 315 F.3d 1325, 1330, 65 USPQ2d 1379, 1382-83 (Fed. Cir. 2003). See MPEP § 2144.05, Obviousness of Ranges
Referring to MPEP § 2144.05, “…the applicant must show that the particular range is critical, generally by showing that the claimed range achieves unexpected results over the prior art range.” (See also MPEP § 716.02 for a discussion of criticality and unexpected results.)
Claim(s) 26 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hsieh, as applied to claim 12 above and further in view of Sato et al. (US 20150076589 A1; hereinafter “Sato”) and Lee et al. (US 20130149822 A1; hereinafter “Lee”).
In re Claim 26, Hsieh discloses in figs. 2A, 4A-4K, the method of claim 12.
Hsieh does not expressly disclose wherein a doping concentration of the P-type liner is higher than a doping concentration of the second N-type region.
In the same field of endeavor, Sato discloses in the embodiment shown in figs. 9-10, a method of forming a super junction device, wherein a doping concentration of a P-type liner is higher than a doping concentration of a second N-type region (¶34, 18; a second N-type region 12 is an n- type semiconductor layer and P-type liner 24 is a P type semiconductor layer).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains from the teachings of Sato and arrive at the claimed concentration difference in the P-type liner the second N-type region in Hsieh’s super junction device to achieve a goal of charge balance by controlling the dopant concentrations of the n-type doped regions and the p-type doped regions (¶29 of Lee).
Conclusion
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/NILUFA RAHIM/Primary Examiner, Art Unit 2893
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