Prosecution Insights
Last updated: October 04, 2026
Application No. 18/171,672

CHIP PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF

Final Rejection §103
Filed
Feb 21, 2023
Priority
Jan 05, 2023 — provisional 63/437,128
Examiner
VU, HUNG K
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Unimicron Technology Corp.
OA Round
4 (Final)
88%
Grant Probability
Favorable
5-6
OA Rounds
0m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allowance Rate
892 granted / 1018 resolved
+19.6% vs TC avg
Moderate +9% lift
Without
With
+9.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
41 currently pending
Career history
1043
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
43.8%
+3.8% vs TC avg
§102
37.1%
-2.9% vs TC avg
§112
11.8%
-28.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1018 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Horibe et al. (US 2022/0384412) in view of Gao et al. (US 2021/0296282, of record). Horibe et al. discloses, as shown in Figures 4E-17D, a chip package structure comprising: a package carrier (140), including a plurality of carrier pads (144A,144B, [0178]); a plurality of chips (100A,100B [0111]), arranged side by side on the package carrier, wherein each of the plurality of chips includes a plurality of first pads (no label, inherent there at 108A,108B, [0135]) and a plurality of second pads (no label, or 622,642, [0015],[0107], [0116],[0234]); a bridge (120, [0111]), located between the plurality of chips and the package carrier, wherein the bridge includes a plurality of bridge pads (not shown but inherent there at 126, [0142]), each of the plurality of first pads is bonded with each of the plurality of bridge pads to form the bonding pad, so that the plurality of chips is electrically connected to each other through the bridge, wherein the bridge is disposed on the plurality of chips such that the bridge is spaced apart from the package carrier by a gap, and a surface of the bridge facing the package carrier is free of direct physical contact with the package carrier; and a plurality of solder balls or C4 bumps (no label, [0015],[0107], [0116],[0234]), located between the package carrier and the plurality of chips, wherein the plurality of second pads of each of the plurality of chips is electrically connected with the plurality of carrier pads of the package carrier through the plurality of solder balls or C4 bumps. Horibe et al. does not disclose the bonding pad is a hybrid bonding pad. However, Gao et al. discloses a chip package having a plurality of first pads (4b) is hybrid bonded with each of a plurality of second pads (4a) to form the hybrid bonding pad (direct bonding pad). Note Figures 1A-1B, 2D and [0032]-[0033] of Gao et al. Therefore, it would have been obvious to one of ordinary skills in the art at the time the invention was made to form the bonding pad of Horibe et al. being the hybrid bonding pad, such as taught by Gao et al. in order to further improve the interconnect conductivity between the pads Regarding claim 2, Horibe et al. and Gao et al. disclose the material of each of the plurality of first pads and the material of each of the plurality of bridge pads are respectively metal materials ([0015],[0107], [0116],[0234])). Regarding claim 3, Horibe et al. and Gao et al. disclose the plurality of solder balls or C4 bumps is disposed on the plurality of carrier pads (144A,144B) of the package carrier (Figures 4E, 8C). Regarding claim 4, Horibe et al. and Gao et al. disclose the plurality of solder balls or C4 bumps (no label) is disposed on the plurality of second pads of each of the plurality of chips (Figures 4E-17D). Regarding claim 5, Horibe et al. and Gao et al. does not disclose the thickness of the bridge as claimed. However, the selection of these parameters such as energy, concentration, temperature, time, speed, molar fraction, depth, thickness, etc., would have been obvious and involve routine optimization which has been held to be within the level of ordinary skill in the art. "Normally, it is to be expected that a change in energy, concentration, temperature, time, molar fraction, depth, thickness, etc., or in combination of the parameters would be an unpatentable modification. Under some circumstances, however, changes such as these may impart patentability to a process if the particular ranges claimed produce a new and unexpected result which is different in kind and not merely degree from the results of the prior art... such ranges are termed "critical ranges and the applicant has the burden of proving such criticality.... More particularly, where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Alter 105 USPQ233, 255 (CCPA 1955). See also In re Waite 77 USPQ 586 (CCPA 1948); In re Scherl 70 USPQ 204 (CCPA 1946); In re Irmscher 66 USPQ 314 (CCPA 1945); In re Norman 66 USPQ 308 (CCPA 1945); In re Swenson 56 USPQ 372 (CCPA 1942); In re Sola 25 USPQ 433 (CCPA 1935); In re Dreyfus 24 USPQ 52 (CCPA 1934). Regarding claim 6, Horibe et al. and Gao et al. disclose the surface of the bridge is flush with an active surface of each of the plurality of chips (Figures 1A-1B and 2C of Gao et al.) Response to Arguments Applicant’s arguments with respect to claim(s) 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to HUNG K VU whose telephone number is (571)272-1666. The examiner can normally be reached Monday - Friday: 7am - 5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, JACOB CHOI can be reached at (469) 295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /HUNG K VU/ Primary Examiner, Art Unit 2897
Read full office action

Prosecution Timeline

Show 1 earlier event
Jul 30, 2025
Non-Final Rejection mailed — §103
Oct 08, 2025
Response Filed
Jan 14, 2026
Final Rejection mailed — §103
Mar 25, 2026
Request for Continued Examination
Apr 06, 2026
Response after Non-Final Action
Apr 22, 2026
Non-Final Rejection mailed — §103
Jul 07, 2026
Response Filed
Sep 22, 2026
Final Rejection mailed — §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
88%
Grant Probability
97%
With Interview (+9.4%)
2y 6m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 1018 resolved cases by this examiner. Grant probability derived from career allowance rate.

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