Prosecution Insights
Last updated: October 26, 2026
Application No. 18/183,189

METHOD AND STRUCTURE OF ACCURATELY CONTROLLING CONTACT GOUGING POSITION

Non-Final OA §102
Filed
Mar 14, 2023
Examiner
WHALEN, DANIEL B
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
International Business Machines Corporation
OA Round
3 (Non-Final)
80%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allowance Rate
826 granted / 1029 resolved
+12.3% vs TC avg
Strong +16% interview lift
Without
With
+15.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
50 currently pending
Career history
1080
Total Applications
across all art units

Statute-Specific Performance

§101
0.9%
-39.1% vs TC avg
§103
44.9%
+4.9% vs TC avg
§102
30.5%
-9.5% vs TC avg
§112
17.7%
-22.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1029 resolved cases

Office Action

§102
DETAILED ACTION Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 09/23/2026 has been entered. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-8 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Kang et al. (US 2023/0178476 A1; hereinafter “Kang”). Regarding claim 1, Kang teaches a microelectronic device comprising: a nanosheet transistor (a gate-all-around FET comprising a plurality of nanosheet stacks NSS) comprising a source/drain (a middle one of a plurality of source/drain regions 430 positioned below CA4 and CAV4) (See annotated Figs. 6-7A below and paragraphs 93-109. It is also noted that one skilled in the art would recognize that the middle one of the plurality of source/drain regions 430 positioned below CA4 and CAV4 as annotated in Fig. 6 would be structurally identical to the middle one of the plurality of source/drain regions 430 shown in Fig. 7A showing a cross-sectional view taken along line X4-X4’ of Fig. 6); a first dielectric shoulder and a second dielectric shoulder (left-side and right-side portions of a combination of 442, 444, and 454 formed of dielectric/insulating materials) located on top of the source/drain and in direct contact with the source/drain (the combination of 442, 444, and 454 is in direct contact with 430), wherein the first dielectric shoulder and the second dielectric shoulder are located at a perimeter of the source/drain and the source/drain includes a gouged area (a recess surface 130R) located at a center of the source/drain (Figs. 2C and 7A and paragraphs 33, 41-43, and 100-106); and a source/drain contact (a combination of CAV4 and 456 of CA4) connected to the source/drain, wherein the source/drain contact is in direct contact with a horizontal topmost surface of the first dielectric shoulder (CAV4 is in direct contact with the topmost surface of the combination of 442, 444, and 454 similar to how CAV2 is in direct contact with the topmost surface of 154 of CA as shown in Fig. 3) and a vertical side surface of the first dielectric shoulder (456 of CA4 is in direct contact with vertical side surface of the combination of 442, 444, and 454) (Figs. 3 and 6-7A), the source/drain contact includes a source/drain contact protrusion (456 of CA4) that extends into the source/drain, and the source/drain contact protrusion is located within the gouged area of the source/drain (Figs. 3 and 6-7A and paragraphs 72-72 and 109). PNG media_image1.png 1197 1464 media_image1.png Greyscale PNG media_image2.png 1480 1510 media_image2.png Greyscale Regarding claim 2, Kang teaches wherein the source/drain contact protrusion is located between the first dielectric shoulder and the second dielectric shoulder (Fig. 7A, 456 of CA4 is located between the left-side and right-side portions of the combination of 442, 444, and 454 formed). Regarding claim 3, Kang teaches wherein the source/drain contact protrusion is in contact with a side surface of the first dielectric shoulder (Fig. 7A). Regarding claim 4, Kang teaches wherein the source/drain contact protrusion is in contact with a side surface of the second dielectric shoulder (Fig. 7A). Regarding claim 5, Kang teaches wherein the source/drain contact is in contact with a top surface of the second dielectric shoulder (Figs. 3 and 6-7A, CAV4 is in contact with a top surface of the right-side portion of the combination of 442, 444, and 456). Regarding claim 6, Kang teaches wherein respective bottom surfaces of the first dielectric shoulder and the second dielectric shoulder are in contact with a top surface of the source/drain (Fig. 7A). Regarding claim 7, Kang teaches further comprising: a dielectric gate cut (444) located adjacent to the nanosheet transistor (Fig. 7A and paragraph 103-105). Regarding claim 8, Kang teaches wherein the source/drain contact extends into the dielectric gate cut (Fig. 7A). Allowable Subject Matter Claims 9-11 and 13-21 are allowable over cited prior arts of record. The following is a statement of reasons for the indication of allowable subject matter: The prior art of record, alone or in combination, and to the examiner’s knowledge does not teach, disclose, suggest, or render obvious, at least to the skilled artisan, the instant invention regarding: A microelectronic device in claim 9, particularly in combination with the limitation that a source/drain contact connected to the source/drain, wherein the source/drain contact is in direct contact with a horizontal topmost surface of the first dielectric shoulder and a vertical side surface of the first dielectric shoulder, wherein the source/drain contact does not contact a top surface of the second dielectric shoulder, wherein the source/drain contact includes a source/drain contact protrusion that extends into the source/drain, wherein the source/drain contact protrusion is located within the gouged area of the source/drain; a dielectric liner located on top of the second dielectric shoulder; and an oxide layer located on top of the dielectric liner; and A microelectronic device in claim 17, particularly in combination with the limitation that a first source/drain contact connected to the first source/drain, wherein the first source/drain contact is in contact with a top surface of the first dielectric shoulder and a top surface of the second dielectric shoulder, wherein the first source/drain contact includes a first source/drain contact protrusion that extends into the first source/drain, wherein the first source/drain contact protrusion is located within the gouged area of the first source/drain; and a second source/drain contact connected to the second source/drain, wherein the second source/drain contact is in contact with a top surface of the third dielectric shoulder, the second source/drain contact does not contact a top surface of the fourth dielectric shoulder, the second source/drain contact includes a second source/drain contact protrusion that extends into the second source/drain, the second source/drain contact protrusion is located within the gouged area of the second source/drain. Response to Arguments Applicant’s arguments with respect to amended claim 1 have been fully considered but are moot in view of a different ground of rejection by Kang et al. (US 2023/0178476 A1) as set forth above in this Office Action. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL B WHALEN whose telephone number is (571)270-3418. The examiner can normally be reached on M-F: 8AM-5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sue Purvis can be reached on (571)272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DANIEL WHALEN/Primary Examiner, Art Unit 2893
Read full office action

Prosecution Timeline

Show 4 earlier events
Jul 13, 2026
Examiner Interview Summary
Jul 20, 2026
Response Filed
Aug 03, 2026
Final Rejection mailed — §102
Sep 18, 2026
Interview Requested
Sep 23, 2026
Response after Non-Final Action
Sep 30, 2026
Request for Continued Examination
Oct 05, 2026
Response after Non-Final Action
Oct 13, 2026
Non-Final Rejection mailed — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12772777
METHOD FOR MANUFACTURING A SEMICONDUCTOR APPARATUS, SEMICONDUCTOR MANUFACTURING APPARATUS AND SEMICONDUCTOR APPARATUS
2y 9m to grant Granted Oct 20, 2026
Patent 12772829
SEMICONDUCTOR DEVICE WITH LINER STRUCTURE AND METHOD FOR FABRICATING THE SAME
2y 8m to grant Granted Oct 20, 2026
Patent 12772830
SEMICONDUCTOR DEVICE WITH LINER STRUCTURE AND METHOD FOR FABRICATING THE SAME
2y 8m to grant Granted Oct 20, 2026
Patent 12765360
SEMICONDUCTOR DEVICE WITH LINER STRUCTURE AND METHOD FOR FABRICATING THE SAME
2y 7m to grant Granted Oct 13, 2026
Patent 12757572
ORGANIC LIGHT EMITTING TRANSISTOR AND PREPARATION METHOD THEREOF, DISPLAY PANEL, DISPLAY APPARATUS
3y 3m to grant Granted Oct 06, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
80%
Grant Probability
96%
With Interview (+15.9%)
2y 4m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 1029 resolved cases by this examiner. Grant probability derived from career allowance rate.

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