Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-8, 11-12 and 20 is/are rejected under 35 U.S.C. 102(a)(1)/(2) as being anticipated by KONG (Pub. No.: US 2021/0265324).
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Re claim 1, KONG, FIGS. 2, 3A, 3B teaches a display device comprising:
a substrate (SUB) including a display area ([DA], FIG. 2 [as shown above]) and a non-display area (the other area that is not occupied by [DA]);
pixels in the display area, comprising a first sub-pixel [FSP], a second sub-pixel [SSP], and a third sub-pixel [TSP] each including an emission area (right in front of [FSP]/ [SSP]/ [TSP]) and a non-emission area (the areas which are not occupied by [FSP]/ [SSP]/ [TSP]) and arranged in a first direction,
wherein each of the first sub-pixel, the second sub-pixel, and the third sub-pixel comprises:
a pixel circuit layer on the substrate and including at least one transistor (DE/SCL/GE/SE, FIG. 11) and a data line (”A data signal of the data line may be applied to the any one electrode through the transistor”, [0129], or Dj, FIG. 9C, [0267]) electrically connected to the transistor and configured to receive a data signal; and
a display element layer on the pixel circuit layer and comprising a light-emitting element (LD1/LD2, FIG. 11) electrically connected to the transistor,
wherein the display element layer (LD1/LD2) comprises:
a first alignment electrode (REL1_1, [0106]) extending in the first direction;
a second alignment electrode (REL2) extending in the first direction (vertical), and spaced apart from the first alignment electrode (REL1_1) in a second direction (horizontal) different from the first direction;
the light-emitting element (LD1) between the first alignment electrode (REL1_1) and the second alignment electrode (REL2) and extending in a length direction parallel to the second direction (horizontal); and
a first electrode (CNE1_1) and a second electrode (CNE2) electrically connected to the light-emitting element and spaced apart from each other in the second direction (horizontal),
wherein the light-emitting element (LD1/LD2) comprises a first end and a second end formed at opposite ends in the length direction (horizontal), and the length direction is a same as a direction in which the data line extends (note that “one electrode of the source and drain electrodes of the transistor may be electrically connected to any one electrode of the first and second electrodes REL1 and REL2. A data signal of the data line may be applied to the any one electrode through the transistor”, [0129]),
wherein the first electrode (REL1_1) overlaps the first end of the light-emitting element and is electrically connected to the first end (left end) of the light-emitting element (LD1/LD2), and
wherein the second electrode overlaps the second end (right end) of the light-emitting element and is electrically connected to the second end of the light-emitting element (LD1/LD2).
Re claim 2, KONG, FIGS. 2, 3A, 3B teaches the display device according to claim 1,
wherein the emission area (front surface) of each of the first sub-pixel [FSP], the second sub-pixel [SSP], and the third sub-pixel [TSP] comprises a short side extending in the first direction and a long side extending in the second direction,
wherein the light-emitting element comprises a plurality of light-emitting elements that, in plan view, respectively overlap the first electrode (REL1), and that are arranged in the first direction, and
wherein at least a portion of the first electrode (REL2) extends in the first direction in each of the first sub-pixel, the second sub-pixel, and the third sub-pixel and continuously covers the plurality of light-emitting elements.
Re claim 3, KONG, FIGS. 2, 3A, 3B teaches the display device according to claim 1, wherein the first electrode (CNE1_1) of each of the first ([FSP] of FIG. 2 [as shown below]), second [SSP], and third sub-pixels [TSP] is spaced apart from the first electrode of one of the sub-pixels adjacent in the first direction, and
wherein the second electrode (CNE2) of each of the first, second, and third sub-pixels is connected to the second electrode of the one of the sub-pixels adjacent in the first direction and
wherein the second electrode (CNE2) of the first sub-pixel [FSP], the second electrode of the second sub-pixel [SSP], and the second electrode of the third sub-pixel [TSP] are integrally provided.
Re claim 4, KONG, FIGS. 2, 3A, 3B teaches the display device according to claim 2, further comprising:
a first bank (left PW2, [0089]) in the non-emission area, and defining a first opening (occupied by left INS1/LD1/INS2) corresponding to the emission area, and a second opening (occupied by right INS1/LD2/INS2) spaced apart from the first opening;
a first connection line (CNL1 of FIG. 2) extending in the second direction in the non-emission area of the first sub-pixel, and connected to the first alignment electrode; and
a second connection line (CNL2) extending in the second direction in the non-emission area of the third sub-pixel, and connected to the second alignment electrode.
Re claim 5, KONG, FIGS. 2, 3A, 3B teaches the display device according to claim 4, wherein the first alignment electrode (REL1_1) of the first sub-pixel [FSP], the first alignment electrode of the second sub-pixel [SSP], and the first alignment electrode of the third sub-pixel [TSP] are connected to each other, and
wherein the second alignment electrode (REL2) of the first sub-pixel, the second alignment electrode of the second sub-pixel, and the second alignment electrode of the third sub-pixel are connected to each other.
Re claim 6, KONG, FIGS. 2, 3A, 3B teaches the display device according to claim 5, further comprising:
a first bridge pattern (PW2) in the non-emission area of the first sub-pixel [FSP], and electrically connected to the second electrode of the first sub-pixel;
a second bridge pattern (PW2) in the non-emission area of the second sub-pixel [SSP], and electrically connected to the second electrode of the second sub-pixel; and
a third bridge pattern (PW2) in the non-emission area of the third sub-pixel [TSP], and electrically connected to the second electrode of the third sub-pixel,
wherein the first bridge pattern, the second bridge pattern, and the third bridge pattern are spaced apart from each other.
Re claim 7, KONG, FIGS. 2, 3A, 3B teaches the display device according to claim 6, wherein the third bridge pattern (PW2 of [TSP]) and the second connection line (CNL2) are integrally provided.
Re claim 8, KONG, FIGS. 2, 3A, 3B teaches the display device according to claim 7, wherein the first alignment electrode (REL1_1), the second alignment electrode (REL2), the first bridge pattern (PW2 of [FSP]), the second bridge pattern (PW2 of [SSP]), the third bridge pattern (PW2 of [TSP]), the first connection line (CNL1), and the second connection line (CNL2) are in a same layer, and comprise a same material.
Re claim 11, KONG, FIGS. 2, 3A, 3B teaches the display device according to claim 6, wherein the first alignment electrode comprises a (1-1)-th alignment electrode (REL1_1 of [FSP]), a (1-2)-th alignment electrode (REL1_1 of [SSP]), a (1-3)-th alignment electrode (REL1_1 of [TSP]), a (1-4)-th alignment electrode (REL1_1 of [FourSP]), and (1-5)-th alignment electrode (REL1_1 of [FifSP]) extending in the first direction, and spaced apart in the second direction,
wherein the second alignment electrode comprises a (2-1)-th alignment electrode (REL2 of [FSP]), a (2-2)-th alignment electrode (same scenario as first alignment electrode), a (2-3)-th alignment electrode, a (2-4)-th alignment electrode, and a (2-5)-th alignment electrode extending in the first direction, and spaced apart in the second direction, and
wherein the first alignment electrode and the second alignment electrode are alternately located along the second direction (horizontal).
Re claim 12, KONG, FIGS. 2, 3A, 3B teaches the display device according to claim 11, wherein the first electrode (CNE1_1) overlaps the (2-1)-th alignment electrode (REL2 of [FSP]), and wherein the second electrode (CNE2) overlaps the (1-5)-th alignment electrode (REL1_1 of [FifSP]).
Re claim 20, KONG, FIGS. 2, 3A, 3B teaches An electronic device comprising the display device of claim 1.
Allowable Subject Matter
Claims 13-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reasons for allowance:
In the claim 13 that is written, the prior arts fail to show or fairly suggest the process steps of: “a first intermediate electrode between the first electrode and the second electrode, spaced apart from the first and second electrodes in the second direction, and overlapping the (1-1)-th alignment electrode and the (2-2)-th alignment electrode; a second intermediate electrode between the first intermediate electrode and the second electrode, spaced apart from the first intermediate electrode and the second electrode in the second direction, and overlapping the (1-2)-th alignment electrode and the (2-3)-th alignment electrode; a third intermediate electrode between the second intermediate electrode and the second electrode, spaced apart from the second intermediate electrode and the second electrode in the second direction, and overlapping the (1-3)-th first alignment electrode and the (2-4)-th second alignment electrode; and a fourth intermediate electrode between the third intermediate electrode and the second electrode, spaced apart from the third intermediate electrode and the second electrode in the second direction, and overlapping the (1-4)-th alignment electrode and the (2-5)-th alignment electrode” in context with the other limitation as stated in claim 1-6 and 11-12.
Response to Arguments
Applicant's arguments filed 04/13/2026 have been fully considered but they are not persuasive because KONG, FIGS. 2, 3A, 3B teaches a display device comprising:
a substrate (SUB) including a display area ([DA], FIG. 2 [as shown above]) and a non-display area (the other area that is not occupied by [DA]);
pixels in the display area, comprising a first sub-pixel [FSP], a second sub-pixel [SSP], and a third sub-pixel [TSP] arranged in a first direction,
wherein each of the first sub-pixel, the second sub-pixel, and the third sub-pixel comprises:
a pixel circuit layer on the substrate and including at least one transistor (DE/SCL/GE/SE, FIG. 11) and a data line (Dj, FIG. 9C, [0267]) electrically connected to the transistor and configured to receive a data signal; and
a display element layer on the pixel circuit layer and comprising a light-emitting element (LD1/LD2, FIG. 11) electrically connected to the transistor,
wherein the display element layer (LD1/LD2) comprises
a first alignment electrode (REL1_1, [0106]) extending in the first direction;
a second alignment electrode (REL2) extending in the first direction (vertical), and spaced apart from the first alignment electrode (REL1_1) in a second direction (horizontal) different from the first direction;
the light-emitting element (LD1) between the first alignment electrode (REL1_1) and the second alignment electrode (REL2) and extending in a length direction parallel to the second direction (horizontal); and
a first electrode (CNE1_1) and a second electrode (CNE2) electrically connected to the light-emitting element and spaced apart from each other in the second direction (horizontal),
wherein the light-emitting element (LD1/LD2) comprises a first end and a second end formed at opposite ends in the length direction (horizontal), and the length direction is a same as a direction in which the data line extends (note that “one electrode of the source and drain electrodes of the transistor may be electrically connected to any one electrode of the first and second electrodes REL1 and REL2. A data signal of the data line may be applied to the any one electrode through the transistor”, [0129]),
wherein the first electrode (REL1_1) overlaps the first end of the light-emitting element and is electrically connected to the first end (left end) of the light-emitting element (LD1/LD2), and
wherein the second electrode overlaps the second end (right end) of the light-emitting element and is electrically connected to the second end of the light-emitting element (LD1/LD2).
For the above reasons, it is believed that the rejections should be sustained.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TONY TRAN whose telephone number is (571)270-1749. The examiner can normally be reached Monday-Friday, 8AM-5PM, EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Britt Hanley can be reached at 571-270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/TONY TRAN/Primary Examiner, Art Unit 2893
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