Office Action Predictor
Last updated: April 15, 2026
Application No. 18/184,141

SUBSTRATE TREATMENT METHOD, STORAGE MEDIUM, AND SUBSTRATE TREATMENT APPARATUS

Non-Final OA §103
Filed
Mar 15, 2023
Examiner
SULLIVAN, CALEEN O
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Tokyo Electron Limited
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
2y 0m
To Grant
99%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allow Rate
986 granted / 1115 resolved
+20.4% vs TC avg
Strong +18% interview lift
Without
With
+18.5%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
25 currently pending
Career history
1140
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
59.8%
+19.8% vs TC avg
§102
18.6%
-21.4% vs TC avg
§112
5.3%
-34.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1115 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election of claims 1-9 in the reply filed on 10/31/2025 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)). Claims 10-12 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention of Group II, there being no allowable generic or linking claim. Election is treated as being made without traverse in the reply filed on 10/31/2025. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 1-9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Weidman (US 2022/0308454). Weidman is directed to bake strategies to enhance lithographic performance of a metal-containing resist. Weidman discloses EUV lithography makes use of EUV resists that are patternable using EUV light to form masks for use in etching underlying layers and the EUV resists may be polymer-based chemically amplified resists (CARs) produced by liquid-based spin-on techniques. (Para, 0019). Weidman discloses an alternative to CARs are directly photopatternable metal-oxide based EUV photoresist (PR) films. (Para, 0019). Weidman explains photolithography processes typically involve one or more bake steps to facilitate the chemical reactions required to produce chemical contrast between exposed and unexposed areas of the photoresist. (Para, 0021). Weidman discloses for high volume manufacturing (HVM), such bake steps are typically performed on tracks where the wafers are baked on a hot-plate at a pre-set temperature under ambient-air or in some cases N2 flow. (Para, 0021). Weidman discloses more careful control of the bake ambient as well as introduction of an additional reactive gas component in the ambient during these bake steps can help further reduce the dose requirement and/or improve pattern fidelity. (Para, 0021). Weidman discloses a new bake strategy that involves careful control of the bake ambient, introduction of reactive gases, and in some cases careful control of the ramping rate of the bake temperature. (Para, 0022). Weidman discloses the strategy can be particularly useful for metal oxide based EUV photoresist (PR) and discloses various useful reactive gases, which may be provided in gaseous form, and may be vaporized before delivery to the reaction chamber. (Para, 0022). Weidman illustrates a flow chart according to various embodiments. (Para, 0024). Weidman discloses at operation 101, resist is deposited on the substrate and the substrate on which the resist is deposited typically includes underlying materials that will eventually be etched after the resist is patterned/developed. (Para, 0024). Weidman discloses in various embodiments, the substrate on which the resist is deposited may have an exposed layer of amorphous carbon, spin-on-carbon (SoC), spin-on glass (SoG), silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, silicon oxycarbide, etc. Weidman discloses the exposed layer may also be an ashable hardmask (AHM). (Para, 0024). Weidman discloses the resist that is deposited in operation 101 is a metal oxide based EUV photoresist. The deposition may occur through wet spin-on techniques or dry vapor-based techniques such as chemical vapor deposition (CVD) and/or atomic layer deposition (ALD), either of which may be driven by thermal energy, plasma energy, or both. (Para, 0024). Weidman discloses next, at operation 103, the substrate is exposed to heat in a first bake step often referred to as the post-application bake (PAB). (Para, 0024). Weidman discloses at operation 105, the substrate is exposed to EUV radiation to pattern the resist, thereby forming exposed areas and unexposed areas of the resist. (Para, 0024). Weidman discloses at operation 107, the substrate is exposed to heat in a second bake step often referred to as the post-exposure bake (PEB), and at operation 109, the resist is developed to selectively remove the unexposed areas. Weidman discloses in various embodiments herein, the atmosphere to which the substrate is exposed may be controlled during the PAB of operation 103 and/or during the PEB of operation 107. For instance, the substrate may be exposed to one or more reactive gases during these steps. (Para, 0024). Weidman discloses the post-exposure bake, performed after the resist is exposed to EUV radiation for patterning, and before the resist is developed to remove unexposed portions of the resist. (Para, 0031; Fig.1). Weidman explains the PEB may be performed for several purposes, for example: 1) to drive complete evaporation of the organic fragments that are generated during EUV exposure; 2) to oxidize the metal hydride species (the other product from the beta-H elimination reaction during EUV exposure) into metal hydroxide; and 3) to facilitate the cross-linking between neighboring —OH groups and form a cross-linked metal oxide network. (Para, 0031). Weidman also discloses that careful control on the bake ambient and introduction of reactive gas species during the PEB process, as described herein, provides an additional chemistry knob to fine-tune the cross-linking process. (Para, 0032). Weidman explains, that having polar and oxidative molecules like H2O2 present during the bake step can facilitate the oxidation of the metal hydride in the exposed area, because the exposed area tends to be more polar than unexposed area due to the loss of alkyl groups and formation of hydride/hydroxide components. (Para, 0032). Weidman discloses other gases such as those described below in the Reactive Gases section may also change the kinetics of hydride oxidation and hydroxide cross-linking reaction via oxidation, acid/base chemistry, coordination chemistry, and the combination of them. Weidman discloses the reactive gas(es) may be provided in a controlled atmosphere and are provided along with non-reactive gases such as Na, Ar, He, Ne, Kr, Xe, etc. (Para, 0033). Weidman discloses, in some cases, air or clean dry air may be provided in the atmosphere during the PEB. (Para, 0033). Weidman discloses the reactive gas may interact with the photoresist via oxidation, coordination, or acid/base chemistry. (Para, 0039). Weidman discloses that in some cases where the reactive gas is delivered during a PEB operation, the reactive gas may preferentially interact with the photoresist in areas that were exposed to EUV radiation and this preferential interaction may arise due to the chemical changes that occur during EUV exposure, for example the loss of alkyl groups within the photoresist. (Para, 0039). These disclosures and illustrations of Weidman as discussed above teach and/or suggest the limitation of claims 1 and 5. As discussed above the EUV resist may also be a chemically amplified resist material; therefore, one of ordinary skill in the art would appreciate this baking step would activate the acid generator in the resist composition. Therefore, these disclosures and illustrations of Weidman as discussed above also teach and/or suggest the limitation of claim 4. Weidman explains, the methods described may be used for different applications. (Para, 0034). Weidman discloses that in some cases, the photoresist layer has been applied to the substrate but not yet patterned, and the baking is a post-application bake (PAB). (Para, 0034). This disclosure and the disclosures of Weidman as discussed above teach and/or suggest the limitation of claim 3. Weidman discloses that in other cases, the photoresist layer has been applied to the substrate and patterned by partial exposure to EUV radiation resulting in exposed and unexposed portions of the photoresist layer, and the baking is a post-exposure bake (PEB). (Para, 0034). These disclosures and the disclosures of Weidman as discussed above teach and/or suggest the limitation of claims 7-8. Weidman also discloses apparatus for baking a photoresist layer on a substrate is provided, and the apparatus includes: a process chamber; an inlet for introducing a reactive gas species to the process chamber; an outlet for removing materials from the process chamber; a substrate support in the process chamber; a heater configured to heat the substrate through conduction, convection, and/or radiation; and a controller having at least one processor, where the at least one processor is configured to control the apparatus to cause any of the methods claimed or otherwise described herein. (Para, 0011). Weidman discloses the chamber in which baking takes place may be configured in a number of ways. (Para, 0050). Weidman explains the chamber is the same chamber used to deposit the photoresist, and/or the same chamber used to expose the photoresist to EUV radiation, and/or the same chamber used to develop the photoresist. (Para, 0050). Weidman also discloses in other embodiments, the chamber is a dedicated bake chamber that is not used for other processes such as deposition, etching, EUV exposure, or photoresist development. (Para, 0050). Weidman explains the chamber may be a standalone chamber, or it may be integrated into a larger processing tool such as the deposition tool used to deposit the photoresist, the EUV exposure tool used to expose the photoresist to EUV radiation, and/or the development tool used to develop the photoresist. (Para, 0050). Weidman the chamber used for baking may be combined with any one or more of these tools, as desired for a particular application. (Para, 0050). These disclosures and the disclosures of Weidman as discussed above teach and/or suggest the limitation of claim 2, ‘ The substrate treatment method according to claim 1, wherein: the substrate existence space includes: a treatment space where a predetermined treatment is performed on the substrate…and the acid concentration in the treatment space is increased, when the acid concentration in the substrate existence space is changed…’ Weidman discloses the chamber may also be equipped with a controller. (Para, 0051). Weidman discloses in some implementations, a controller is part of a system, where the system can comprise, semiconductor processing equipment, including a processing tool or tools, chamber or chambers, a platform or platforms for processing, and/or specific processing components (a wafer pedestal, a gas flow system, etc.). (Para, 0051). Weidman explains the systems may be integrated with electronics for controlling their operation before, during, and after processing of a semiconductor wafer or substrate and the electronics may be referred to as the “controller,” which may control various components or subparts of the system or systems. (Para, 0051). Weidman explains, the controller, depending on the processing requirements and/or the type of system, may be programmed to control any of the processes disclosed herein, including the delivery of processing gases, temperature settings (e.g., heating and/or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, positional and operation settings, wafer transfers into and out of a tool and other transfer tools and/or load locks connected to or interfaced with a specific system. (Para, 0051). These disclosures teach and/or suggest the limitation of claim 9. Moreover, these disclosures and the disclosures of Weidman as discussed above teach and/or suggest the limitation of claim 2, ‘ The substrate treatment method according to claim 1, wherein: the substrate existence space includes: …and a transfer space where a transfer mechanism configured to transfer the substrate to the treatment space is provided; …and the acid concentration in the transfer space is maintained equal to or lower than a minimum acid concentration in the treatment space.’ While the recitations of claims 1-9 are not exactly and/or identically disclosed by Weidman, one of ordinary skill in the art would have reasonably expected to successfully form a pattern in a metal-containing resist on a substrate, where the substrate and/or environment in which the substrate is contained is treated so the developed pattern is formed more accurately and results in the formation of a patterning mask that can be used to fabricate a semiconductor device. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CALEEN O SULLIVAN whose telephone number is (571)272-6569. The examiner can normally be reached Mon-Fri: 7:30 am-4:00 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at 571-270-7877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CALEEN O SULLIVAN/Primary Examiner, Art Unit 2899
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Prosecution Timeline

Mar 15, 2023
Application Filed
Dec 11, 2025
Non-Final Rejection — §103
Mar 18, 2026
Applicant Interview (Telephonic)
Mar 19, 2026
Examiner Interview Summary
Mar 30, 2026
Response Filed

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
99%
With Interview (+18.5%)
2y 0m
Median Time to Grant
Low
PTA Risk
Based on 1115 resolved cases by this examiner. Grant probability derived from career allow rate.

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