Prosecution Insights
Last updated: April 19, 2026
Application No. 18/189,299

DEFORMATION-RESISTANT INTERPOSER FOR A LOCAL SILICON INTERCONNECT AND METHODS FOR FORMING THE SAME

Non-Final OA §102
Filed
Mar 24, 2023
Examiner
PHAM, LONG
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company Limited
OA Round
1 (Non-Final)
91%
Grant Probability
Favorable
1-2
OA Rounds
2y 6m
To Grant
97%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allow Rate
1493 granted / 1633 resolved
+23.4% vs TC avg
Moderate +6% lift
Without
With
+5.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
38 currently pending
Career history
1671
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
39.9%
-0.1% vs TC avg
§102
41.8%
+1.8% vs TC avg
§112
11.1%
-28.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1633 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions The applicant’s election of claims 1-15 and 21-25 is noted. The species restriction of 8/13/25 has been withdrawn. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1, 5, 6, and 7 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Jeng et al. (US pub 20220375843). With respect to claim 1, Jeng et al. teach a semiconductor structure comprising a composite interposer, wherein the composite interposer comprises (see figs. 1-38, particularly fig. 6B and associated text): a local-silicon-interconnect-containing (LSI-containing) interposer (layer that contains 327) that comprises a local silicon interconnect (LSI) bridge (221, 225, 223, 147), a set of through-integrated-fan-out-via (TIV) structures 149,323 laterally surrounding the LSI bridge, and a molding compound interposer frame 327 that laterally surrounds the LSI bridge and the TIV structures; and an organic interposer 350 located on the LSI-containing interposer and comprising redistribution dielectric embedding redistribution wiring interconnects layers 313,317,315 (right/left) and metallic counter-deformation structures (connectors in middle of 350) that are electrically floating, wherein each of the metallic counter-deformation structures comprises: a respective plurality of metallic via structures (middle connectors through 310); a respective proximal metallic plate (bottom connectors, below 310) that contacts the respective plurality of metallic via structures and is more proximal to the LSI-containing interposer than the respective plurality of metallic via structures is to the LSI-containing interposer; and a respective distal metallic plate (top connectors, above 310) that contacts the respective plurality of metallic via structures and is more distal from the LSI-containing interposer than the respective plurality of metallic via structures is to the LSI-containing interposer. With respect to claim 5, Jeng et al. teach at least one metallic counter-deformation structure selected from the metallic counter-deformation structures comprises: a first portion having an area (presence of top connectors and bottom connectors) overlap with the LSI bridge in a plan view along a direction that is perpendicular to an interface between the LSI-containing interposer and the organic interposer; and a second portion that does not have any area (absence of top and bottom connectors) overlap within the LSI bridge in the plan view. See fig. 6B and associated text. With respect to claim 6, Jeng et al. teach the LSI bridge comprises two pairs of sidewalls; and the metallic counter-deformation structures have an area (edge areas of the 1metallic counter-deformation structures) overlap within at least two sidewalls selected from the two pairs of sidewalls in a plan view along a direction that is perpendicular to an interface between the LSI-containing interposer and the organic interposer. See fig. 6B and associated text. With respect to claim 7, Jeng et al. teach the composite interposer comprises an additional organic interposer 150 located on the LSI-containing interposer on an opposite side of the organic interposer and comprising additional redistribution dielectric layers embedding additional redistribution wiring interconnects. See fig. 6B and associated text. Claim(s) 11-15 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Jeng et al. (US pub 20220375843). With respect to claim 11, Jeng et al. teach a semiconductor structure comprising a composite interposer, wherein the composite interposer comprises (see figs. 1-38, particularly fig. 6B and associated text): a local-silicon-interconnect-containing (LSI-containing) interposer (layer that contains 327) that comprises a local silicon interconnect (LSI) bridge (221, 225, 223, 147); and an organic interposer 350 located on the LSI-containing interposer, comprising redistribution dielectric layers embedding redistribution wiring interconnects 313,317,315 (right/left) and a metallic counter-deformation structure (connectors in middle of 350), wherein the metallic counter-deformation structure comprises: a plurality of metallic via structures (middle connectors through 310) ; a first metallic plate (bottom connectors, below 310) located on a first side of the plurality of metallic via structures; and a second metallic plate located (top connectors, above 310) on a second side of the plurality metallic via structures and vertically spaced from the first metallic plate. With respect to claim 12, Jeng et al. teach each of the metallic counter-deformation structures is electrically floating, and is electrically isolated from each of the redistribution wiring interconnects. See fig. 6B and associated text. With respect to claim 13, Jeng et al. teach the first metallic plate comprises a first portion having an area (presence of the first metallic plate) overlap within the second metallic plate in a plan view along a direction that is perpendicular to an interface with the LSI-containing interposer and the organic interposer, and a second portion that does not have any area (absence of the first metallic plate) overlap with the second metallic plate in the plan view; and the second metallic plate comprises a portion that does not have any area (presence of the second metallic plate) overlap with the first metallic plate in the plan view. See fig. 6B and associated text. With respect to claim 14, Jeng et al. teach the first metallic plate comprises at least one first opening therein; the second metallic plate comprises at least one second opening therein; and the at least one second opening has an area overlap with the at least one first opening in a plan view along a direction that is perpendicular to an interface with the LSI-containing interposer and the organic interposer. See fig. 6B and associated text. With respect to claim 15, Jeng et al. teach the metallic counter-deformation structure comprises: a first portion having an area (the presence of metallic counter-deformation structure) overlap with the LSI bridge in a plan view along a direction that is perpendicular to an interface between the LSI-containing interposer and the organic interposer; and a second portion that does not have any area (the absence of metallic counter-deformation structure) overlap within the LSI bridge in the plan view. See fig. 6B and associated text. Claim(s) 21-24 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Jeng et al. (US pub 20220375843). With respect to claim 21, Jeng et al. teach a semiconductor structure comprising a composite interposer, wherein the composite interposer comprises (see figs. 1-38, particularly fig. 6B and associated text): a local-silicon-interconnect-containing (LSI-containing) interposer (layer that contains 327) that comprises a local silicon interconnect (LSI) bridge (221, 225, 223, 147), a set of through-integrated-fan-out-via (TIV) structures 149,323 laterally surrounding the LSI bridge, and a molding compound interposer frame that laterally surrounds the LSI bridge and the TIV structures; and an organic interposer 350 located on the LSI-containing interposer and comprising redistribution dielectric layers embedding redistribution wiring interconnects 313,317,315 (right/left) and metallic counter-deformation structures that are electrically floating, wherein each of the metallic counter-deformation structures comprises a respective proximal metallic plate (bottom connectors, below 310) and a respective distal metallic plate (top connectors, above 310) that are interconnected to each other by a respective plurality of metallic via structures (middle connectors through 310). With respect to claim 22, Jeng et al. teach the respective proximal metallic plate is vertical spaced from an interface between the LSI-containing interposer and the organic interposer. See fig. 6B and associated text. With respect to claim 23, Jeng et al. teach the respective distal metallic plate is vertically spaced from a horizontal plane including a horizontal surface of the redistribution dielectric layers that is most distal from the LSI-containing interposer. See fig. 6B and associated text. With respect to claim 24, Jeng et al. teach sidewalls of the molding compound interposer frame are vertically coincident with sidewalls of the organic interposer. See fig. 6B and associated text. Allowable Subject Matter Claims 2, 3, 4, 8, 9, 10, and 25 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Examiner’s Cited References The cited references generally show the similar or related structure a composite interposer having an interposer having an interconnect bridge and a through via connector and an interposer having an interconnect structure and a metal electrically floated or isolated structure as presently claimed by applicant. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to LONG PHAM whose telephone number is (571)272-1714. The examiner can normally be reached Mon-Friday. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jacob Choi can be reached at 469-295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. LONG . PHAM Examiner Art Unit 2823 /LONG PHAM/Primary Examiner, Art Unit 2897
Read full office action

Prosecution Timeline

Mar 24, 2023
Application Filed
Sep 25, 2025
Applicant Interview (Telephonic)
Sep 25, 2025
Examiner Interview Summary
Oct 03, 2025
Response after Non-Final Action
Feb 06, 2026
Non-Final Rejection — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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Patent 12604766
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2y 5m to grant Granted Apr 07, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
91%
Grant Probability
97%
With Interview (+5.6%)
2y 6m
Median Time to Grant
Low
PTA Risk
Based on 1633 resolved cases by this examiner. Grant probability derived from career allow rate.

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