DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Species 1 (reading on Fig. 12) in the reply filed on February 11, 2026, is acknowledged.
Claims 8 and 12-15 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-2 and 16 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Youn et al. (US 20220149134).
Regarding claim 1, Youn teaches, in Figs. 2-4, a display device (100, [0130]) comprising:
a first emission area (EA, Figs. 3-4, [0074]) comprising a first light emitting element (EL, [0161], see Fig. 4);
a first driving transistor (DRT/T1, Figs. 2-4, [0077]) configured to provide a driving current to the first light emitting element (ED) ([0051]) and having a first driving channel ([0087], see Fig. 4, part of 330 overlapped with 340) containing a first material ([0136], oxide semiconductor);
a first transistor (EMT/T2, Figs. 2-4, [0077]) connected to the first driving transistor (DRT/T1) (see Fig. 2) and having a first channel ([0094], part of 330 overlapped with 342, see Fig. 4);
a second transistor (SCT/T3, Figs. 2-3, [0077]) connected to the first driving transistor (DRT/T1) and the first transistor (EMT/T2, connected through DRT) (see Fig. 2) and having a second channel (335, [0110], see Fig. 3);
a first data conductive layer (313) comprising a connection electrode (313, [0080], see Figs. 3-4, connected to DVL) connected to the first transistor (EMT/T2) (see Fig. 4); and
a second data conductive layer (DL/312 and DVL/311) comprising a first data line (DL/312, [0079]) connected to the second transistor (SCT/T3) (see Fig. 2) and a first driving voltage line (DVL/311, [0192]) connected to the first transistor (EMT/T2) through the connection electrode (313) (see Fig. 3),
wherein the connection electrode (313) overlaps the first emission area (EA) (see Fig. 4), and wherein the first data line (DL/312) overlaps the connection electrode (313) and does not overlap the first emission area (EA) (see Fig. 3).
Regarding claim 2, Youn further teaches, in Fig. 3, that the first data line (DL/312) and the first driving voltage line (DVL/311) extend in a first direction ("first direction" Fig. 3), and that the first data line (DL/312) and the first driving voltage line (DVL/311) are spaced apart from each other in a second direction crossing the first direction (“second direction”; Fig. 3).
Regarding claim 16, Youn teaches, in Fig. 4,
a substrate (400, [0130]);
a first transistor (T2/EMT, [0077]) on the substrate (400), and comprising a first semiconductor layer (330, [0094]) containing a first material ([0136], oxide semiconductor) and a first gate electrode (342, [0142]) on the first semiconductor layer (330);
a first insulating layer (402, [0196]) between the first semiconductor layer (330) and the first gate electrode (342), and covering the first semiconductor layer (330);
a second insulating layer (403, [0141]) on the first gate electrode, and covering the first gate electrode (342);
a first data conductive layer (313, [0080]) on the second insulating layer (403), and comprising a connection electrode (313) connected to the first transistor (T2/EMT) (see Fig. 4, [0080]);
a first via insulating layer (404, [0158]) on the first data conductive layer (313), and covering the connection electrode (313);
a second data conductive layer (312/DL and 311/DVL) on the first via insulating layer (404), and comprising a data line (312/DL, [0079]) configured to receive data voltages and a driving voltage line (311/DVL, [0192]) connected to the first transistor (T2/EMT) by the connection electrode (313, see Fig. 3) ([0085], note that 312/DL and 311/DVL are on the same layer as 320);
a second via insulating layer (401, [0134]) on the second data conductive layer, and covering the second data conductive layer (312/DL and 311/DVL); and
a light emitting element layer (EL/EA) on the second via insulating layer (401), and comprising a first light emitting element (EL, [0161]) and a first emission area (EA, Figs. 3-4, [0074]) defined by a first opening of a pixel defining layer (306, [0166]-[0167]) on the first light emitting element,
wherein the connection electrode (313) overlaps the first emission area (EA) (see Fig. 4) and the pixel defining layer (306) (see Fig. 3 how 313 extends past the edge of EA to where the pixel defining layer would be), and
wherein the data line (312/DL) and the driving voltage line (311/VDL) overlap the connection electrode (313), and do not overlap the first emission area (see Fig. 3).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 3 and 6 are rejected under 35 U.S.C. 103 as being unpatentable over Youn et al. (US 20220149134) in view of Zhang et al. (US 20240268172).
Regarding claim 3, Youn teaches the limitations of claim 2. Youn further teaches, in Fig. 15A, a second emission area (EA of SP2, [0190]) spaced apart from the first emission area (EA of SP1) in a third (diagonal) direction crossing the first (vertical) and second (horizontla0 directions, and comprising a second light emitting element (EL of SP2),
wherein the first driving voltage line (VDL/311) does not overlap the first emission area (EA of SP1) (see Fig. 15A).
Youn does not teach that the first driving voltage line overlaps the second emission area.
In a similar field of endeavor, Zhang teaches, in Fig. 16, that the first driving voltage line (VDD2 that drives sub-pixel of first emission area 12, [0026], [0118]) overlaps the second emission area (11) ([0124]), in order to ensure the flatness of the anode pattern under the pixel opening of the sub-pixel, which effectively improves the color shift parameter of the display substrate and ensures the display quality of the display substrate ([0047], [0207]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the first driving voltage line and second emission area configuration of Youn with the first driving voltage line and second emission area configuration of Zhang, in order to ensure the flatness of the anode pattern under the pixel opening of the sub-pixel, which effectively improves the color shift parameter of the display substrate and ensures the display quality of the display substrate ([0047], [0207]).
Regarding claim 6, Youn in view of Zhang teaches the limitations of claim 3. Zhang further teaches, in Fig. 16, a third emission area (13, [0085]) spaced apart from the first emission area (12) in the first (vertical) direction and comprising a third light emitting element ([0083]);
a second driving transistor (T3 connected to VDD3 that drives sub-pixel of emission area 13, see Fig. 1 circuit, [0026], [0174]) configured to provide a driving current to the third light emitting element ([0026], [0174]) and having a second driving channel (43, [0181]); and
a fourth transistor (T4 for sub-pixel of emission area 13) connected to the second driving transistor (T3 of VDD3) (see Fig. 1) and having a fourth channel (44, [0181]),
wherein the second data conductive layer further comprises a second data line (left data line, also see Fig. 14, [0057]) connected to the fourth transistor (T4 for sub-pixel of emission area 13) (see Fig. 1 circuit),
wherein the second data line (left data line) extends in the first (vertical) direction, wherein the second data line (left data line) is spaced apart from the first data line (middle data line) in the second direction with the first emission area (Red) interposed therebetween (see Fig. 16), and
wherein the second data line (left data line) does not overlap the first emission area (12) (see Fig. 16).
Youn further teaches that the second driving channel (330) of the second driving transistor (DRT/T1 of SP2) contains the first material ([0136], oxide semiconductor) ([0248], a driving transistor of each sub-pixel SP1 and SP2 has 330 as its channel).
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Youn et al. (US 20220149134) in view of Zhang et al. (US 20240268172), and further in view of Liu et al. (US 20230058293).
Regarding claim 7, Youn in view of Zhang teaches the limitations of claim 6. Zhang further teaches, in Fig. 16, that the first light emitting element (12/52, [0079]-[0080]) is configured to emit red light, the second light emitting element (11/51, [0059]) is configured to emit blue light, and the third light emitting element (13/52, [0086]-[0087]) is configured to emit green light ([0165]).
Youn in view of Zhang does not explicitly teach the order of: the first light emitting element is configured to emit green light, the second light emitting element is configured to emit red light, and the third light emitting element is configured to emit blue light.
However, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to rearrange the first, second, and third light emitting elements such that the first light emitting element is configured to emit green light, the second light emitting element is configured to emit red light, and the third light emitting element is configured to emit blue light, because it is known in the art that the placement of the light emitting elements impact visual granularity, strength of color edge, degree of dislocation, and visual resolution, and sub-pixel density (Liu, [0074], [0123]).
In In re Japikse and In re Kuhle, the court determined that the position of an element was not a patentable feature if it did not modify operation of the device or did not provide a novel or unexpected result. In In re Japikse, 181 F.2d 1019, 86 USPQ 70 (CCPA 1950), the court held that the position of the starting switch for a hydraulic press was held unpatentable because shifting the position of the starting switch would not have modified the operation of the device. See also MPEP 2144.04. Also, in In re Kuhle, 526 F.2d 553, 188 USPQ 7 (CCPA 1975), the court held that the particular placement of a contact in a conductivity measuring device was an obvious matter of design choice because “the particular placement of the contact provides no novel or unexpected result” and “use of a spring-loaded contact in the manner claimed is well known with the common flashlight.” See also MPEP 2144.04.
Similarly, the Specification of the Present Application has not established the criticality of the disposition of particular colors (see Specification [0014]-[0015], [00119], [00177]), and thus is not a patentable feature. Thus, it would have been obvious to a person having ordinary skill in the art to rearrange the light emitting elements to have the colors as required by claim 7 as an obvious matter of design choice for visual granularity, strength of color edge, degree of dislocation, and visual resolution requirements (Liu, [0074], [0123]).
Allowable Subject Matter
Claims 4-5, 9-11, and 17-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reasons for allowance:
Regarding claim 4, the closest art is Youn et al. (US 20220149134), which teaches a third transistor (SENT/T4, Fig. 2) connected to the first driving transistor (DRT/T1) (see Fig. 2) and having a third channel (336, [0122]), but does not teach, in Fig. 15A, that the third transistor overlaps the second emission area (EA of SP2). Claim 5 depends from claim 4.
Regarding claim 9, the closest art is Youn et al. (US 20220149134), which teaches connection electrode 313 (Figs. 2-4), but does not teach that the connection electrode completely overlaps the first emission area in a plan view. Claims 10-11 depend from claim 9.
Regarding claim 17, the closest art is Lee et al. (US 20210241689), which teaches, in Figs. 9-10, most of the limitations of claim 17, but teaches against independent claim 16’s limitation wherein the driving voltage line (183, [0103]) do not overlap the first emission area (opening in pixel definition layer 120). Thus, a person having ordinary skill in the art would not have used Lee to modify Youn et al. (US 20220149134). Claims 18-20 depend from claim 17.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIKA HEERA SON whose telephone number is 703-756-4644. The examiner can normally be reached Monday - Friday 12:30-9:30 PM ET.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yara Green can be reached on 571-270-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/ERIKA H SON/Examiner, Art Unit 2893
/YARA B GREEN/Supervisor Patent Examiner, Art Unit 2893