DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim 9 is rejected under 35 U.S.C. 102(a)(1) and/or 102(a)(2) as being anticipated by Ankireddi et al. (US Pub. 2013/0148305).
Regarding claim 9, Ankireddi teaches a semiconductor die package, comprising;
an integrated circuit die 104, having a cooling interface region (e.g. note plates 112) in a first side (top), comprising, in a top-down view of the integrated circuit die 104, an array of at least two columns and at least two rows of pillar structures separated by channel regions (see Fig. Fig. 2A-2C, 3A & Para [0008 & 0036]), orthogonal to each other (e.g. see Fig. 3A below),
wherein the array comprises:
a first row of pillar structures comprising a first pillar structure and a second pillar structure separated from the first pillar structure by a first channel region of the channel regions (see Fig. 3A below, note that the same mapping can apply to Fig. 2A-2C), and
a second row of pillar structures comprising a third pillar structure and a fourth pillar structure, wherein the fourth pillar structure is separated from the second pillar structure by a second channel region of the channel regions (see Fig. 3A below, note that the same mapping can apply to Fig. 2A-2C), and
wherein the third pillar structure and the fourth pillar structure are separated by the first channel region (see Fig. 3A below, note that the same mapping can apply to Fig. 2A-2C),
wherein the array is configured to transfer heat from the integrated circuit die to a fluid using thermal convection (note the transfer of heat via introduction and movement of fluid, see Fig. 1 and associated text); and
one or more connection structures 106 connected to a second side (bottom) of the integrated circuit die 104 that is opposite the first side (Fig. 1),
wherein the one or more connection structure structures 106 are configured to conduct heat from the integrated circuit die to a substrate 102 below the integrated circuit die 104 using thermal conduction (Fig. 1 and Fig. 2A-3A).
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Claim 21-22, 25 & 27-28 are rejected under 35 U.S.C. 102(a)(1) and/or 102(a)(2) as being anticipated by Liu et al. (US Pub. 2023/0262938).
Regarding claim 21, Liu teaches a semiconductor die package 200, comprising:
a substrate (PCB); and
an integrated circuit die, mounted to the substrate (Liu teaches wherein the PCB includes integrated circuit in Para [0026]), comprising
a first set of pillar structures along a first horizontal axis (see Fig. 4 below), wherein the first set of pillar structures comprises a first pillar structure (see Fig. 4 below) and a second pillar structure (see Fig. 4 below) separated by a first channel region (note the gap/space between each pillar 104 in Fig. 4 below), wherein the first pillar structure extends to a first height above a bottom of the channel region, and wherein the second pillar structure extends to a second height above the bottom of the first channel region (note the height of each pillar, Fig. 4); and
a second set of pillar structures along a second horizontal axis (Fig. 4) that is approximately parallel to the first horizontal axis (Fig. 4 below),
wherein the second set of pillar structures comprises a third pillar structure and a fourth pillar structure separated by the first channel region, wherein the third pillar structure extends to the first height above the bottom of the first channel region (note the gap/space between each pillar 104), wherein the fourth pillar structure and the second pillar structure are separated by a second channel region that is approximately orthogonal to the first channel region (see Fig. 4 below and note the second channel region between the fourth and second pillar structures), and wherein the fourth pillar structure extends to the second height above the bottom of the channel region (note the height of the fourth pillar in Fig. 4).
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Regarding claim 22, Liu teaches the semiconductor die package of claim 21, wherein the integrated circuit die further comprises integrated circuitry.
Regarding claim 25, Liu teaches the semiconductor die package of claim 21, wherein the first set of pillar structures and the second set of pillar structures are formed in a backside surface of the integrated circuit die opposite a side including integrated circuitry (Fig. 4).
Regarding claim 27, Liu teaches the semiconductor die package of claim 21, wherein the channel region is configured to induce a turbulent component in a flow of a fluid to increase a convective heat transfer rate (para [0012, 0014, 0026, 0031, 0060]).
Regarding claim 28, Liu teaches the semiconductor die package of claim 21, wherein the first horizontal axis and the second horizontal axis define an array of at least two rows and at least two columns of alternating pillar structures and channel regions configured to create a phase change in a fluid during heat transfer.
With respect to claims 27-28, the limitations that the first chip is configured "to induce a turbulent component in a flow of a fluid to increase a convective heat transfer rate" and “to create a phase change in a fluid during heat transfer” are recitations of the intended use of the claimed invention, and such use must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2 & 7-8 are rejected under 35 U.S.C. 103 as being unpatentable over Liu et al. (US Pub. 2023/0262938).
Regarding claim 1, Liu teaches a device 200, comprising:
a substrate 202 (Fig. 4); and
an integrated circuit die mounted to the substrate 202 and having a cooling interface region on a side (top surface) facing away from the substrate 202 (Liu teaches wherein the PCB includes integrated circuit in Para [0026]), the cooling interface region comprising:
a first channel region (see Fig. 4 below);
a second channel region approximately orthogonal to the first channel region (see Fig. 4 below);
a first row of pillar structures 104, along a first horizontal axis, (see Fig. 4 below) comprising:
a first pillar structure extending approximately vertically to a first height above a bottom of the first channel region (see Fig. 4 below/above); and
a second pillar structure extending approximately vertically to a second height above the bottom of the first channel region (see Fig. 4 below/above),
wherein the first pillar structure and the second pillar structure are separated by the first channel region (Fig. 4), and
wherein the second height is lesser relative to the first height (Liu teaches in Para [0019] wherein the pillar structures can be of any length (height) where some fins 104 can be longer than the other fins. Furthermore, it would have been an obvious matter of design choice to employ multiple sets of pillar structures with varying length and/or width, since such a modification would have involved a mere change in the size of a component. A change in size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955)); and
a second row of pillar structures, along a second horizontal axis parallel to the first horizontal axis (see Fig. 4 below), comprising
a third pillar structure (Fig. 4 below), and
a fourth pillar structure (Fig. 4 below),
wherein the fourth pillar structure is separated from the second pillar structure by the second channel region, and wherein the third pillar structure and the fourth pillar structure are separated by the first channel region (see Fig. 4 below).
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Regarding claim 2, Liu teaches the device of claim 1, wherein a shape of a top-down view of the first pillar structure or the second pillar structure corresponds to: a triangular shape, a rectangular shape, a hexagonal shape, or a circular shape (Fig. 1 & Fig. 4).
Regarding claim 7, Liu teaches the device of claim 1, wherein at least one of: the third pillar structure extends approximately vertically to the second height, the third pilar structure is separated from the first pillar structure by the second channel region (see Fig. 4 above), or wherein the fourth pillar structure extends approximately vertically to the first height (see Fig. 4 above).
Regarding claim 8, Liu is silent on the device of claim 1, wherein a width of the first channel region is greater than approximately 10 microns. However, it would have been obvious to one having ordinary skill in the art at the time of the invention was made to employ said claim dimension, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). Furthermore, it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980).
Claims 3-4 are rejected under 35 U.S.C. 103 as being unpatentable over Liu as applied to claim 1 above, and further in view of Zhou et al. (US Pub. 2023/0152047).
Regarding claim 3, Liu is silent on the device of claim 1, wherein at least one of the first pillar structure, the second pillar structure, the first channel region, or the second channel region comprises porous surfaces. However, Zhou teaches in Fig. 5A-5B wherein at least one of a first pillar structure, a second pillar structure, a first channel region, or a channel region comprise porous surfaces. This has the advantage of allowing for fluids to flow and provide a fluid path for the plurality of pillars/fins in the cooling structure. Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to modify the invention of Liu with porous surface for the pillars, as taught by Zhou, so as to provide a fluid path for the plurality of pillars in the cooling structure.
Regarding claim 4, the combination of Liu and Zhou is silent on the device of claim 3, wherein a width of a pore included in the porous surfaces is included in a range of greater than 0 microns to less than approximately 15 microns. However, it would have been obvious to one having ordinary skill in the art at the time of the invention was made to employ said claim dimension, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). Furthermore, it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980).
Claims 5-6 are rejected under 35 U.S.C. 103 as being unpatentable over Liu as applied to claim 1 above, and further in view of ZHOU et al. (US Pub. 2021/0239310).
Regarding claim 5, while Liu teaches the device of claim 1, wherein the first channel region is adjacent to a first side of the first pillar structure and wherein the second channel region is adjacent to a second side of the first pillar structure that is opposite the first side of the first pillar structure; however, Liu is silent on wherein a width of the second channel region is greater relative to a width of the first channel region. Nonetheless, ZHOU teaches in Fig. 6A-6B a cooling structure comprising a plurality of pins and a first channel region that is adjacent to a first side of a first pillar structure and wherein a second channel region adjacent to a second side of the first pillar structure that is opposite the first side of the first pillar structure; wherein a width W4’ of the second channel region is greater relative to a width W4 of the first channel region. This has the advantage of providing a channel structure having non-uniform channel density, whereby regions of higher channel density remove more heat and regions of lower channel density remove lesser heat. Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to modify the invention of Liu with the channel structures having different width, as taught by ZHOU, so as to obtain a cooling structure with non-unform channel density to control the heat transfer coefficient.
Regarding claim 6, the combination of Liu and ZHOU teaches the device of claim 5, wherein a ratio of the width of the second channel region to the width of the first channel region can be greater than approximately 3:2 (see Fig. 5A-Fig. 6B). Notwithstanding, it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Furthermore, it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980).
Claims 10 is rejected under 35 U.S.C. 103 as being unpatentable over Ankireddi as applied to claim 9 above, and in further view of Liu et al.
Regarding claim 10, Ankireddi is silent on the semiconductor die package of claim 9, wherein the first pillar structure includes a first height; and wherein the second pillar structure includes a second height that is lesser relative to the first height. However, Liu teaches a semiconductor device, wherein a first pillar structure includes a first height; and wherein a second pillar structure includes a second height that is lesser relative to the first height (Liu teaches in Para [0019] wherein the pillar structures can be of any length where some fins can be longer than the other fins). This has the advantages of providing a pillar structure of different heights to optimize the removal of heat. Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to modify the invention of Ankireddi with the fins/pillar structures of different heights, as taught by Liu, so as to obtain a cooling structure with optimized heat removal capability.
Claims 11 is rejected under 35 U.S.C. 103 as being unpatentable over Ankireddi as applied to claim 9 above, and in further view of ZHOU et al.
Regarding claim 11, Ankireddi is silent the semiconductor die package of claim 9, wherein the first channel region includes a first width; and wherein the second channel region includes a second width that is lesser relative to the first width. However, ZHOU teaches in Fig. 6A-6B a cooling structure, wherein a first channel region includes a first width W4’; and wherein a second channel region includes a second width W4 that is lesser relative to the first width. This has the advantage of providing a channel structure having non-uniform channel density, whereby regions of higher channel density remove more heat and regions of lower channel density remove lesser heat. Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to modify the invention of Liu with the channel structures having different width, as taught by ZHOU, so as to obtain a cooling structure with non-unform channel density to control the heat transfer coefficient.
Claims 12 is rejected under 35 U.S.C. 103 as being unpatentable over Ankireddi as applied to claim 9 above, and in further view of Zhou et al.
Regarding claim 12, Ankireddi is silent the semiconductor die package of claim 9, wherein the array and the channel regions comprise: porous surfaces configured to increase a Reynolds number of the fluid, wherein the porous surfaces are configured to be directly exposed to the fluid without an intervening thermal interface material, without an intervening heat spreader component, and without an intervening lid component. However, Zhou teaches in Fig. 5A-5B, wherein an array of at least two columns and the at least two rows of the pillar structures and the channel regions comprise: porous surfaces configured to increase a Reynolds number of the fluid, wherein the porous surfaces are configured to be directly exposed to the fluid without an intervening thermal interface material, without an intervening heat spreader component, and without an intervening lid component. This has the advantage of allowing for fluids to flow and provide a fluid path for the plurality of pillars/fins in the cooling structure. Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to modify the invention of Liu with porous surface for the pillars, as taught by Zhou, so as to provide a fluid path for the plurality of pillars in the cooling structure.
Claims 23-24 are rejected under 35 U.S.C. 103 as being unpatentable over Liu as applied to claim 21 above, and further in view of Zhou et al.
Regarding claim 23, Liu is silent on the device of claim 21, wherein each of the first set of pillar structure, the second set of pillar structure, the first channel region and the second channel region has a porous surfaces. However, Zhou teaches in Fig. 5A-5B wherein a first pillar structure, a second pillar structure, a first channel region and a second channel region comprise porous surfaces. This has the advantage of allowing for fluids to flow and provide a fluid path for the plurality of pillars/fins in the cooling structure. Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to modify the invention of Liu with porous surface for the pillars, as taught by Zhou, so as to provide a fluid path for the plurality of pillars in the cooling structure.
Regarding claim 24, the combination of Liu and Zhou is silent on the device of claim 3, wherein a width of a pore included in the porous surfaces is included in a range of greater than 0 microns to less than approximately 5 microns. However, it would have been obvious to one having ordinary skill in the art at the time of the invention was made to employ said claim dimension, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). Furthermore, it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980).
Claims 26 is rejected under 35 U.S.C. 103 as being unpatentable over Liu as applied to claim 21 above, and further in view of ZHOU et al.
Regarding claim 26, Liu is silent on the semiconductor die package of claim 21, wherein the channel region includes a first width between the first and second pillar structures and a second width between the third and fourth pillar structures, and wherein the first width is greater than the second width. However, ZHOU teaches in Fig. 6A-6B a cooling structure, wherein the channel region includes a first width W4’ between the first and second pillar structures and a second width W4 between the third and fourth pillar structures, and wherein the first width is greater than the second width. This has the advantage of providing a channel structure having non-uniform channel density, whereby regions of higher channel density remove more heat and regions of lower channel density to remove lesser heat. Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to modify the invention of Liu with the channel structures having different width, as taught by ZHOU, so as to obtain a cooling structure with non-unform channel density to control the heat transfer coefficient.
Response to Arguments
Applicant's arguments filed 01/05/2026 have been fully considered but they are not persuasive. The Examiner maintains that the prior art teaches all of the claim features as discussed in the rejection above (note annotations of drawings). The amended claim 1 presents a different scope than the previous version and the Liu reference teaches all of the claim features as addressed in the rejection above.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TIMOR KARIMY whose telephone number is (571)272-9006. The examiner can normally be reached Monday - Friday: 8:30 AM -5:00 PM.
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/TIMOR KARIMY/Primary Examiner, Art Unit 2818
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