Office Action Predictor
Application No. 18/192,158

DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME

Non-Final OA §102
Filed
Mar 29, 2023
Examiner
TRAPANESE, WILLIAM C
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Display Co., LTD.
OA Round
1 (Non-Final)
76%
Grant Probability
Favorable
1-2
OA Rounds
3y 3m
To Grant
87%
With Interview

Examiner Intelligence

76%
Career Allow Rate
479 granted / 626 resolved
Without
With
+10.9%
Interview Lift
avg trend
3y 3m
Avg Prosecution
26 pending
652
Total Applications
career history

Statute-Specific Performance

§101
10.9%
-29.1% vs TC avg
§103
54.6%
+14.6% vs TC avg
§102
24.2%
-15.8% vs TC avg
§112
3.1%
-36.9% vs TC avg
Black line = Tech Center average estimate • Based on career data

Office Action

§102
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al. (hereinafter Lee, US 2021/0202905). In regards to independent claim 1, Lee teaches a display device, comprising: a display area and a non-display area surrounding the display area (Lee, Fig. 6, DA vs NDA); a substrate (Lee, Fig. 8, Item 110); a plurality of pixels disposed in the display area (Lee, Fig. 8, Item T, [0055], “The active layer ACT can be provided in a pixel area of the substrate 110”); a grounding part disposed in the non-display area (Lee, Fig. 6 Item 200); and a flexible printed circuit board disposed in the non-display area to apply a driving signal to drive the pixels (Lee, Fig. 6 Item 180, display driving circuit 180, flexible circuit film 181), wherein: the non-display area comprises a first portion, a second portion, a third portion, and a fourth portion (Lee, Fig 6. Left, Bottom, Right, Top, of NDA area) , wherein the flexible printed circuit board being disposed in the fourth portion (Lee, Fig. 6, Item 180 is on top portion of NDA), and the second portion being disposed opposite from the fourth portion and being spaced-apart from the fourth portion by the display area (Lee, Fig. 6 Item 200 on bottom of NDA, the DA is between the top and bottom of NDA, and the grounding part comprises a first ground pattern and a second ground pattern that are arranged alternately in the second portion of the non-display area (Lee, Fig.6 Item 210 vs 230, grounding line 200 contains convex 230 and concave 210 parts that alternate along the bottom of the NDA). Allowable Subject Matter Claim 11-20 are allowed. The following is a statement of reasons for the indication of allowable subject matter: The prior art fails to disclose or teach an obvious combination of the following limitations when taken with the claim as a whole: a first ground pattern and a second ground pattern alternately and repeatedly arranged in the non-display area, wherein the first signal line and the first ground pattern overlap each other in a thickness direction and each receive a first voltage, and the second signal line and the second ground pattern overlap each other in the thickness direction and each receive a second voltage having a level different from a level of the first voltage. Claims 2-10 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILLIAM C TRAPANESE whose telephone number is (571)270-3304. The examiner can normally be reached Monday - Friday 7am-12pm & 8pm-10pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached at (571)272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /WILLIAM C TRAPANESE/Primary Examiner, Art Unit 2812
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Prosecution Timeline

Mar 29, 2023
Application Filed
Dec 27, 2025
Non-Final Rejection — §102
Mar 30, 2026
Response Filed

Precedent Cases

Applications granted by this same examiner with similar technology. Study what changed to get past this examiner.

Patent 12588341
DISPLAY PANEL AND ELECTRONIC DEVICE
2y 5m to grant Granted Mar 24, 2026
Patent 12588561
LIGHT EMITTING DISPLAY DEVICE
2y 5m to grant Granted Mar 24, 2026
Patent 12575277
Display Substrate and Display Apparatus
2y 5m to grant Granted Mar 10, 2026
Patent 12568673
A LATERAL SURFACE GATE VERTICAL FIELD EFFECT TRANSISTOR WITH ADJUSTABLE OUTPUT CAPACITANCE
2y 5m to grant Granted Mar 03, 2026
Patent 12563791
NITRIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR DEVICE
2y 5m to grant Granted Feb 24, 2026

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Prosecution Projections

1-2
Expected OA Rounds
76%
Grant Probability
87%
With Interview (+10.9%)
3y 3m
Median Time to Grant
Low
PTA Risk
Based on 626 resolved cases by this examiner