Prosecution Insights
Last updated: April 19, 2026
Application No. 18/193,596

LEAD FRAME WITH A TIE BAR HAVING BRANCH PART

Final Rejection §102
Filed
Mar 30, 2023
Examiner
CHAMBLISS, ALONZO
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Diodes Incorporated
OA Round
2 (Final)
90%
Grant Probability
Favorable
3-4
OA Rounds
2y 3m
To Grant
65%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allow Rate
1050 granted / 1168 resolved
+21.9% vs TC avg
Minimal -25% lift
Without
With
+-25.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
24 currently pending
Career history
1192
Total Applications
across all art units

Statute-Specific Performance

§101
1.7%
-38.3% vs TC avg
§103
35.5%
-4.5% vs TC avg
§102
36.2%
-3.8% vs TC avg
§112
14.8%
-25.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1168 resolved cases

Office Action

§102
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . The amendments filed on 11/13/2025 have been fully considered and made of record in this application. Response to Arguments Applicant's arguments filed 11/13/2025 have been fully considered but they are not persuasive. In regards to Li failing to teach the semiconductor device further comprises a plurality of lead fingers, each lead finger has a surface in the second plane, the surface of each lead finger is used for receiving a lead connected to the semiconductor chip. Each lead finger has an edge which is distant from the first edge of the base island by the first distance. However, this is deemed unpersuasive since Li teaches the semiconductor device further comprises a plurality of lead fingers 4, each lead finger 4 has a top surface in the second plane, the top surface of each lead finger is used for receiving a lead 28 connected to the semiconductor chip 16. Each lead finger 4 has an edge which is distant from the first edge of the base island by the first distance (see Figs. 3A, 3B, 4A, and 4B). Furthermore, in the top view of Fig. 3A leads 4 are spaced the same distance as the branch part of lead 14. This action is made final. Claim Objections Claim 3 is objected to because of the following informalities: Claim 3 depends on cancel claim 2. Appropriate correction is required. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 5. Claims 1-6, 10, 12, 13, and 17-19 are rejected under 35 U.S.C. 102(a)(1) as being clearly anticipated by Li et al. (US 2008/0128741). With respect to Claims 1 and 10, Li teaches at least one semiconductor chip 16 attached to a surface of a base island 10 in a first plane, wherein a connecting rib 14 is connected to the base island 10. The at least one semiconductor chip 16 has a first part obliquely connected to the base island 10. The connecting rib 14 has a second part having a surface in a second plane parallel to the first plane and in a plane different from the first plane. The connecting rib has a branch part 14a-14d divided from the second part 14b and not directly connected to the adjacent lead finger. The branch part is in the second plane, a surface used for receiving a lead connected to the semiconductor chip 16. The branch part 14a-14d has an edge that is distant from a first edge of the base island by a first distance. A plurality of lead fingers 4 each lead finger 4 has a surface in the second plane. The surface of each lead finger 4 is used for receiving a lead connected to the semiconductor chip. Each lead finger has an edge which is distant from the first edge of the base island by the first distance (see paragraphs 36-46; Figs. 3A, 3B, 4A, and 4B). With respect to Claim 3, Li teaches a lead 24 connecting the semiconductor chip to the branch part of the connecting rib (see paragraph 39; Figs. 3B and 4A). With respect to Claim 4, Lin teaches a lead 24 connecting the semiconductor chip to the lead finger 4 (see Figs. 3A, 3B, 4A, and 4B). With respect to Claims 5, 12, and 18, Lin teaches the semiconductor device further comprises a second connecting rib 15 connected to the base island at an opposite side of the base island 10 (see Fig. 3A). With respect to Claims 6 and 19, Lin teaches the second connecting rib 15 has a branch part divided from the second connecting rib. The branch part has in the second plane a surface used for receiving a lead connected to the semiconductor chip 16. The branch part of the second connecting rib has an edge which is distant from a second edge of 5 the base island 10 by a second distance (see Fig. 3A). With respect to Claim 13, Lin teaches the second connecting rib 15 has a branch part divided from the second connecting rib. The branch part has in the second plane, a surface used for receiving a lead connected to the semiconductor chip. The branch part of the second connecting rib is not directly connected to the adjacent lead finger (see Fig. 3A) With respect to Claim 17, Lin teaches a lead frame comprising at least one base island 10 that has in a first plane, a surface used for receiving a semiconductor chip 16. A connecting rib 14 that is connected to the base island 10 and has a first part obliquely connected to the base island 10. The connecting rib 14 having a second part 14b, wherein the second part 14b having a surface in a second plane. The second plane being parallel to the first plane and being a plane different from the first plane. A plurality of lead fingers 4 adjacent to the connecting rib. The connecting rib 14 has a branch part 14a, 14d divided from the second part, wherein the branch part has in the second plane a surface used for receiving a lead connected to the semiconductor chip The branch part 14a, 14d is not directly connected to the adjacent lead finger 4. Attaching a semiconductor chip 16 to the base island 10 of the lead frame. Forming wire bonds 24 between pads on the semiconductor chip 16 and the lead fingers 4. Forming an encapsulating material 26 over the semiconductor chip 16 and the lead frame distance. Th branch part has an edge which is distant from a first edge of the base island by a first distance (see paragraphs 36-46; Figs. 3A, 3B, 4A, and 4B). Allowable Subject Matter 6. Claims 7-9, 14-16, and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowance subject matter: none of the prior art of record does not teach or suggest the combination of the semiconductor device further comprises a second connecting rib, a third connecting rib and a fourth connecting rib which are connected to the base island at four corners of the base island in claims 7 and 14. A second connecting rib, a third connecting rib and a fourth connecting rib which are connected to the base island at four corners of the base island. The second connecting rib, the third connecting rib and the fourth connecting rib each have a branch part divided from a corresponding connecting rib. The branch parts each have in the second plane, a surface used for receiving a lead connected to the semiconductor chip in claim 20 The prior art made of record and not relied upon is cited primarily to show the product of the instant invention. Conclusion 7. THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning the communication or earlier communications from the examiner should be directed to Alonzo Chambliss whose telephone number is (571) 272-1927. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Jacob Y. Choi can be reached on (469) 295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571 - 273- 8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system Status information for published applications may be obtained from either Private PMR or Public PMR. Status information for unpublished applications is available through Private PMR only. For more information about the PMR system see hittp://pair-dkect.uspto. gov. Should you have questions on access to the Private PMR system contact the Electronic Center (EBC) at 866-217-9197 (toll-free). AC/February 8, 2026 /Alonzo Chambliss/ Primary Examiner, Art Unit 2897
Read full office action

Prosecution Timeline

Mar 30, 2023
Application Filed
Aug 17, 2025
Non-Final Rejection — §102
Nov 13, 2025
Response Filed
Feb 08, 2026
Final Rejection — §102 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
90%
Grant Probability
65%
With Interview (-25.2%)
2y 3m
Median Time to Grant
Moderate
PTA Risk
Based on 1168 resolved cases by this examiner. Grant probability derived from career allow rate.

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