Office Action Predictor
Last updated: April 15, 2026
Application No. 18/196,453

DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF

Non-Final OA §102§103
Filed
May 12, 2023
Examiner
INOUSSA, MOULOUCOULAY
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Hannstar Display Corporation
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
93%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allow Rate
645 granted / 752 resolved
+17.8% vs TC avg
Moderate +7% lift
Without
With
+7.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
36 currently pending
Career history
788
Total Applications
across all art units

Statute-Specific Performance

§101
2.1%
-37.9% vs TC avg
§103
38.3%
-1.7% vs TC avg
§102
41.4%
+1.4% vs TC avg
§112
18.0%
-22.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 752 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 3-6 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Sakong et al. (US 2021/0005794 A1 hereinafter referred to as “Sakong”). With respect to claim 1, Sakong discloses, in Figs.1-21, a manufacturing method of a display device, comprising: forming a plurality of light emitting components (130) on a first substrate (110), wherein the light emitting components (130) comprise a first side/(lower side) and a second side/(upper side) opposite to the first side, and the second side is away from the first substrate (110) (see step Fig.9, Par.[0028] wherein semiconductor light emitters LED1, LED2, and LED3 may include a semiconductor laminate 130 in which epitaxial layers such as a first conductive semiconductor layer 131, an active layer 132, and a second conductive semiconductor layer 133 are stacked; see Par.[0050]-[0051] wherein the semiconductor laminate 130 may be formed by sequentially growing the first conductive semiconductor layer 131, the active layer 132, and the second conductive semiconductor layer 133 on the substrate 110 and the semiconductor laminate 130 may be etched to form a mesa region M); forming a circuit layer (141, 150, 162) on the first substrate (110) and on the second side/(upper side) of the light emitting components (130) (see step of Figs.10-12, Par.[0050]-[0052] wherein an ITO layer 141 (for improving contact characteristics of the second conductive semiconductor layer 133) may be formed on the semiconductor laminate 130; second electrodes 150N and 150P may be formed in the contact holes H1 and H); forming a first protective layer (161) on the circuit layer (141, 150) and forming an insulating layer (180) on the first protective layer (161) (see steps of Figs.13-14, Par.[0054]-[0055] wherein an insulating layer 161 covering the first to third semiconductor light emitters LED1, LED2, and LED3 and a reflective layer 162 covering the insulating layer 161 may be formed; the molding 180 may be formed of a material having a modulus lower than that of the semiconductor laminate 130 and having high tensile properties; the molding 180 may include, e.g., polyimide (PI), polycyclohexylenedimethylene terephthalate (PCT), or an epoxy molding compound (EMC)); removing the first substrate (110) after forming a second substrate (300) on the insulating layer (180) (see Steps of Figs.15-16, Par.[0057] wherein the substrate 110 may be separated from the first to third semiconductor light emitters LED1, LED2, and LED3, and grooves HSR, HSG, and HSB, defined by a partition wall structure when viewed from the top, may be provided); forming a black matrix layer (1161) on the first side of the light emitting components (130), wherein the black matrix layer (1161) comprises a plurality of openings (see steps of Figs.17-18, Par.[0060] wherein the first molding 1161 may fill the trench T to isolate the first to third semiconductor light emitters LED11, LED12, and LED13 from each other; the first molding 1161 may be formed of a material having a low modulus to have flexible characteristics, and may be formed of a material having a modulus lower than that of the semiconductor laminate 1130 and having high tensile properties; see Par.[0021] wherein the molding material may include a (e.g., black) matrix); forming a plurality of light conversion layers (190) in the openings of the black matrix layer; forming a second protective layer (1400) on the black matrix layer (1161) and the light conversion layers (190); and forming a third substrate (2/1110) on the second protective layer (1400) (see steps of Figs.20-21, 5, Par.[0063] wherein the substrate 1110 may be separated from the first to third semiconductor light emitters LED11, LED12, and LED13, and grooves H6R, H6G, and H6B (e.g., defined by a partition wall structure when viewed from the top), may be provided. Subsequently, a wavelength conversion material, e.g., a quantum dot (QD), may be filled in the grooves H6R, H6G, and H6B while being dispersed in a liquid binder resin to form wavelength converters 1190R, 1190G, and 1190B, and a protective layer 1400 may be attached to an upper portion to manufacture the display panel 2 of FIG. 5). With respect to claim 3, Sakong discloses, in Figs.1-21, the manufacturing method of the display device, wherein a manufacturing method of the circuit layer (150, 161-162) comprises: forming a first conductive layer (150) on the first substrate (110) and on the second side of the light emitting components (130); forming an interlayer dielectric layer (161) on the first conductive layer (150); and forming a second conductive layer (162) on the interlayer dielectric layer (161), wherein the first conductive layer (150) and the second conductive layer (162) are electrically connected to the light emitting components (130), and the first conductive layer (150) is electrically isolated from the second conductive layer (162) (see step of Fig.13). With respect to claim 4, Sakong discloses, in Figs.1-21, the manufacturing method of the display device, wherein the light emitting components (130) comprise a plurality of micro-light emitting diodes (see step Fig.9, Par.[0028] wherein semiconductor light emitters LED1, LED2, and LED3 may include a semiconductor laminate 130 in which epitaxial layers such as a first conductive semiconductor layer 131, an active layer 132, and a second conductive semiconductor layer 133 are stacked). With respect to claim 5, Sakong discloses, in Figs.1-21, the manufacturing method of the display device, wherein the first substrate (110) comprises a sapphire substrate (see Par.[0050] wherein he substrate 110 may include, e.g., sapphire, Si, SiC, MgAl2O.sub.4, MgO, LiAlO.sub.2, LiGaO.sub.2, GaN, or the like. In an implementation, the substrate 110 may be doped with boron at a concentration equal to or more than 10.sup.19 atoms/cm.sup.3, in order to help secure etching selectivity in a subsequent process). With respect to claim 6, Sakong discloses, in Figs.1-21, the manufacturing method of the display device, wherein the first protective layer and the second protective layer comprise an inorganic insulating material. Claims 1, 3-4, 6, 8, 10-11, 13-18 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim et al. (US 2023/0335689 A1 hereinafter referred to as “Kim”). With respect to claim 1, Kim discloses, in Figs.1-40, a manufacturing method of a display device, comprising: forming a plurality of light emitting components (ED) on a first substrate (SUB), wherein the light emitting components (ED) comprise a first side/(lower surface) and a second side/(upper surface) opposite to the first side/(lower surface), and the second side/(upper surface) is away from the first substrate (SUB) (see step of Fig.13, Par.[0061]-[0165] wherein the light emitting element ED over target substrate SUB is disclosed; see Par.[0064] wherein the display area DPA may include multiple pixels PX and each of the pixels PX may include one or more light emitting elements ED emitting light in a specific wavelength band to display a specific color); forming a circuit layer/(transistor elements) on the first substrate (SUB) and on the second side of the light emitting components (ED) (see Fig.16, Par.[0087] wherein multiple elements of transistor T1 over ED and SUB; see Par.[0090]-[0091] wherein the circuit layer may include at least one first transistor T1 and may transmit an electrical signal to the light emitting element ED); forming a first protective layer (SL) on the circuit layer/(transistor elements) and forming an insulating layer (BDM) on the first protective layer (SL); removing the first substrate (SUB) after forming a second substrate (BS) on the insulating layer (BDM) (see steps of Figs.17-18, Par.[0107]-[0108] wherein first planarization layer SL may be disposed to cover the second data conductive layer; the first planarization layer SL may include an organic insulating material, for example, an organic material such as polyimide (PI), and serve to planarize a step formed by the first bank BNL and the circuit layers; see Par.[0217] wherein the filling layer BDM_S may be made of a Si-based organic material (e.g.; organosilicon compound characterized by alternating oxide material of silicon-oxygen (Si-O) backbones with organic side chains attached to the silicon atoms), an epoxy organic material, or the like, but the disclosure is not limited thereto; see Par.[0180]-[0182] wherein a process of separating the target substrate SUB from the display element substrate DS and removing the auxiliary layer PIL and the alignment electrodes RME1 and RME2 may be performed); forming a black matrix layer (BM, MBM, PNL, BDM, BAB) on the first side/(lower surface) of the light emitting components (ED), wherein the black matrix layer (BM, MBM/PNL, BDM, BAB) comprises a plurality of openings/(opened space between MBM); forming a plurality of light conversion layers (WCL) in the openings of the black matrix layer (BM, MBM/PNL, BDM, BAB) (see steps of Figs.22-25, Par.[0187]-[0188] wherein a first capping layer CPL1 may be formed on the color control structures TPL, WCL1, and WCL2, and a color mixing preventing member MBM may be formed in a space in which the color control structures TPL, WCL1, and WCL2 are spaced apart from each other on the first capping layer CPL1; see Par.[0122], [0216] wherein the color mixing preventing member MBM may include an organic light blocking material (i.e.; black matrix); the lower light absorbing member BAB may include an organic material similarly to the light blocking member BM; for example, the lower light absorbing member BAB may be made of a material used as a black matrix of the display device); forming a second protective layer (CPL1) on the black matrix layer (MBM/PNL) and the light conversion layers (WCL) (see step of Fig.37, Par.[0120] wherein the first capping layer CPL1 may prevent materials of the color control structures TPL, WCL1, and WCL2 from spreading to other components; the first capping layer CPL1 may be made of an inorganic material. For example, the first capping layer CPL1 may include silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, titanium oxide, tin oxide, or silicon oxynitride); and forming a third substrate (FS) on the second protective layer (CPL1) (see, for example, step of Fig.32, Par.[0210] wherein the display device 10_4 may be manufactured by forming the color control structures TPL, WCL1, and WCL2 and the color filter layers CFL1, CFL2, and CFL3 on the second base substrate FS and bonding the color control structures TPL, WCL1, and WCL2 and the color filter layers CFL1, CFL2, and CFL3 to the display layer DL without directly forming the color control structures TPL, WCL1, and WCL2 on the second surface of the first insulating layer PAS1). With respect to claim 3, Kim discloses, in Figs.1-40, the manufacturing method of the display device, wherein a manufacturing method of the circuit layer comprises: forming a first conductive layer (CNE1,2) on the first substrate (SUB) and on the second side of the light emitting components (ED) (see Par.[0067] wherein FIG. 2 schematically illustrates a planar arrangement of a display layer DL and a color control layer CL in one pixel PX of the display device 10, and FIG. 3 illustrates a planar arrangement of a light emitting element ED and electrodes CNE1 and CNE2 of the display layer DL); forming an interlayer dielectric layer (PAS3) on the first conductive layer (CNE1,2) (see Par.[0088]-[0091] wherein the third insulating layer PAS3 may prevent direct contact between the light emitting elements ED and the circuit layer disposed, and the electrodes CNE1 and CNE2 disposed on the first base substrate BS); and forming a second conductive layer (BML1) on the interlayer dielectric layer (PAS3), wherein the first conductive layer (CNE1,2) and the second conductive layer (BML1) are electrically connected to the light emitting components (ED), and the first conductive layer (CNE1,2) is electrically isolated from the second conductive layer (BML1) (see Par.[0090]-[0091] wherein the lower metal layer BML1 may include a material blocking light to prevent the light from being incident on the first active layer ACT1 of the first transistor T1; it is submitted that CNE1,2 and BML1 are at least partially electrically isolated from each other by insulating material of PAS3). With respect to claim 4, Kim discloses, in Figs.1-40, the manufacturing method of the display device, wherein the light emitting components (ED) comprise a plurality of micro-light emitting diodes (see Par.[0145] wherein the light emitting element ED may be a light emitting diode. For example, the light emitting element ED may be an inorganic light emitting diode having a size of a nano-meter to a micro-meter and made of an inorganic material). With respect to claim 6, Kim discloses, in Figs.1-40, the manufacturing method of the display device, wherein the first protective layer (SL) and the second protective layer (CPL1) comprise an inorganic insulating material (see steps of Figs.17-18, Par.[0107]-[0108] wherein first planarization layer SL may be disposed to cover the second data conductive layer; the first planarization layer SL may include an organic insulating material, for example, an organic material such as polyimide (PI), and serve to planarize a step formed by the first bank BNL and the circuit layers; see step of Fig.37, Par.[0120] wherein the first capping layer CPL1 may prevent materials of the color control structures TPL, WCL1, and WCL2 from spreading to other components; the first capping layer CPL1 may be made of an inorganic material. For example, the first capping layer CPL1 may include silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, titanium oxide, tin oxide, or silicon oxynitride). With respect to claim 8, Kim discloses, in Figs.1-40, the manufacturing method of the display device, wherein the second substrate comprises a glass substrate (BS) (see Par.[0072] wherein the first base substrate BS may be made of an insulating material such as glass, quartz, or a polymer resin). With respect to claim 10, Kim discloses, in Figs.1-40, the manufacturing method of the display device, wherein a manufacturing method of the light conversion layers (WCL) comprises an inkjet print process or an exposure and development process (see Par.[0119] wherein the color control structures TPL, WCL1, and WCL2 are not limited thereto and may be formed through an inkjet-printing process). With respect to claim 11, Kim discloses, in Figs.1-40, the manufacturing method of the display device, further comprising performing a cleaning step and a roughening step on the first side of the light emitting components after removing the first substrate and before forming the black matrix layer (see Par.[0181] wherein the target substrate SUB may be readily removed through a detachment process from the auxiliary layer PIL. The auxiliary layer PIL may be removed through a dry etching process or a polishing process, and the alignment electrodes RME1 and RME2 may be removed by an etching process using an etchant; it is submitted that etching, in the context of surface preparation, is a process that uses a chemical or abrasive action to slightly roughen a surface, creating better adhesion for coatings or other treatments; and cleaning is a crucial preliminary step before etching, ensuring the surface is free of contaminants that could interfere with the etching process or the subsequent application). With respect to claim 13, Kim discloses, in Figs.1-40, a display device, comprising: a first substrate; a second substrate, disposed opposite to the first substrate; a first protective layer (BNL), disposed between the first substrate (BS) and the second substrate, wherein the first protective layer (PAS1) comprises a plurality of recesses; a plurality of light emitting components (ED), disposed in the recesses of the first protective layer (BNL) (see Fig.38, Par.[0070] wherein a first base substrate BS, and a light emitting element ED, electrodes CNE1 and CNE2, color control structures TPL, WCL1, and WLC2, and color filter layers CFL1, CFL2 and CFL3 disposed on the first base substrate BS; see Par.[0210] wherein a second base substrate FS disposed on the color filter layers CFL1, CFL2, and CFL3 and may further include a filling layer BDM_S and a lower light absorbing member BAB disposed between the color control structures TPL, WCL1, and WCL2 and the display layer DL; see Par.[0071] wherein the light emitting element ED that emits light in a specific wavelength band and the color control structures TPL, WCL1, and WLC2 that convert the light into light of different colors may be directly disposed on a surface (or a first surface) and another surface (or a second surface) of a first insulating layer PAS1, respectively); and a circuit layer (SL), disposed on the first protective layer (PAS1) and extending into the recesses, wherein the circuit layer is electrically connected to the light emitting components (ED), and a portion of the circuit layer (SL) is disposed between the light emitting components (ED) and the first protective layer (PAS1) (see Par.[0107] wherein a first planarization layer SL may be disposed to cover the second data conductive layer; the first planarization layer SL may include an organic insulating material, for example, an organic material such as polyimide (PI), and serve to planarize a step formed by the first bank BNL and the circuit layers). With respect to claim 14, Kim discloses, in Figs.1-40, the display device, wherein the circuit layer comprises: a first conductive layer (CN1), disposed on the first protective layer (PAS1) and extending into the recesses; a second conductive layer (CN2), disposed in the recesses of the first protective layer (PAS1), wherein the first conductive layer (CN1) is disposed between the light emitting components (ED) and the second conductive layer (CN2); and an interlayer dielectric layer (PAS3), disposed on the first protective layer (PAS1) and extending into the recesses, wherein the interlayer dielectric layer (PAS2, PAS3) is disposed between the first conductive layer (CN1) and the second conductive layer (CN2), wherein the first conductive layer (CN1) and the second conductive layer (CN2) are electrically connected to the light emitting components (ED), and the first conductive layer (CN1) is electrically isolated from the second conductive layer (CN2) (see Par.[0088]-[0089] wherein the first insulating layer PAS1, the second insulating layer PAS2, and the third insulating layer PAS3 described above may include an inorganic insulating material or an organic insulating material. For example, the first insulating layer PAS1, the second insulating layer PAS2, and the third insulating layer PAS3 may include an inorganic insulating material such as silicon oxide (SiO.sub.x), silicon nitride (SiN.sub.x), silicon oxynitride (SiO.sub.xN.sub.y), aluminum oxide (AlO.sub.y), or aluminum nitride (Al.sub.xN.sub.y)). With respect to claim 15, Kim discloses, in Figs.1-40, the display device, further comprising a driving component (T1) disposed on the first protective layer (PAS1) and on one side of the light emitting components (ED), wherein the circuit layer (SL) is electrically connected to the driving component (see Par.[0139] wherein the first transistor T1 may be a driving transistor for driving the light emitting element ED). With respect to claim 16, Kim discloses, in Figs.1-40, the display device, further comprising: a black matrix layer (BM, MBM), disposed on the first protective layer (PAS1) and the light emitting components (ED), wherein the black matrix layer (BM, MBM) includes a plurality of openings (see Par.[0216] wherein the lower light absorbing member BAB may include an organic material similarly to the light blocking member BM; and the lower light absorbing member BAB may be made of a material used as a black matrix of the display device; see Par.[0121] wherein the color mixing preventing member MBM may be made of a material capable of blocking transmission of light to prevent color mixing from occurring due to light emitted from the color control structures TPL, WCL1, and WCL2 and permeating into adjacent sub-pixels PXn); and a plurality of light conversion layers (WCL), disposed in the openings of the black matrix layer (see Par.[0070] wherein the display device 10 may also include a circuit layer disposed between the light emitting element ED and the first base substrate BS. The circuit layer, the light emitting element ED, the electrodes CNE1 and CNE2, the color control structures TPL, WCL1, and WCL2, and the color filter layers CFL1, CFL2, and CFL3 may be sequentially disposed on the first base substrate BS). With respect to claim 17, Kim discloses, in Figs.1-40, the display device, further comprising a second protective layer (CPL1) disposed between the light conversion layers (WCL) and the second substrate (FS) (see Par.[0120]-[0121] wherein he first capping layer CPL1 may be made of an inorganic material. For example, the first capping layer CPL1 may include silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, titanium oxide, tin oxide, or silicon oxynitride). With respect to claim 18, Kim discloses, in Figs.1-40, the display device, further comprising an insulating layer (BDM) disposed between the first protective layer (PAS1) and the first substrate (BS) (see Par.[0217] wherein he filling layer BDM may be made of a Si-based organic material, an epoxy organic material, or the like, but the disclosure is not limited thereto). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 2, 20 are rejected under 35 U.S.C. 103 as being unpatentable over Sakong in view of Lin et al. (US 2020/0227484 A1 hereinafter referred to as “Lin”). With respect to claim 2, Kim discloses all the claimed limitations of claim 1. Moreover, Kim discloses in Figs.1-40, the manufacturing method of the display device, further comprising: removing the second substrate after forming the third substrate; and forming a fourth substrate (1300) on the insulating layer (180). However, Sakong does not explicitly disclose that the fourth substrate comprises a high transmittance substrate, and a transmittance of the high transmittance substrate is greater than or equal to 90%. Lin discloses, in Figs.1-11, the manufacturing method of the display device, further comprising: substrate comprises a high transmittance substrate, and a transmittance of the high transmittance substrate is greater than or equal to 90% (see Par.[0036], [0040]-[0041] wherein the second substrate 102 may include the combination of two of these materials (for example, groups B, C D, F, G and H in the table 1). Taking the group A as an example, the value represents the transmittance of the second substrate 102 when it includes 1-20wt % metal ions, and the second transmittance T2 (or the fifth transmittance T5) may be in a range from 90-91% (90%≤transmittance ≤91%)). Kim and Lin are analogous art because they are all directed to a display device, and one of ordinary skill in the art would have had a reasonable expectation of success by modifying Kim to include Lin because they are from the same field of endeavor. Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was made to modify the fourth substrate material of display device in Kim by including substrate material with high transmittance of more than 90% as taught by Lin in order to utilize advantages offered by high transmittance material for display such as improved image quality, energy efficiency, durability and stability thereby considerably improve the overall quality of display device. With respect to claim 20, Kim discloses all the claimed limitations of claim 13. Moreover, Kim discloses in Figs.1-40, the manufacturing method of the display device, further comprising: removing the second substrate after forming the third substrate; and forming a fourth substrate (1300) on the insulating layer (180). However, Sakong does not explicitly disclose that the fourth substrate comprises a high transmittance substrate, and a transmittance of the high transmittance substrate is greater than or equal to 90%. Lin discloses, in Figs.1-11, the manufacturing method of the display device, further comprising: substrate comprises a high transmittance substrate, and a transmittance of the high transmittance substrate is greater than or equal to 90% (see Par.[0036], [0040]-[0041] wherein the second substrate 102 may include the combination of two of these materials (for example, groups B, C D, F, G and H in the table 1). Taking the group A as an example, the value represents the transmittance of the second substrate 102 when it includes 1-20wt % metal ions, and the second transmittance T2 (or the fifth transmittance T5) may be in a range from 90-91% (90%≤transmittance ≤91%)). Kim and Lin are analogous art because they are all directed to a display device, and one of ordinary skill in the art would have had a reasonable expectation of success by modifying Kim to include Lin because they are from the same field of endeavor. Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was made to modify the fourth substrate material of display device in Kim by including substrate material with high transmittance of more than 90% as taught by Lin in order to utilize advantages offered by high transmittance material for display such as improved image quality, energy efficiency, durability and stability thereby considerably improve the overall quality of display device. Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Sakong. With respect to claim 7, Sakong discloses all the claimed limitation of claim 1. Moreover, Sakong discloses in Figs.1-21, the manufacturing method of the display device, wherein the insulating layer comprises an organic insulating material, and the insulating layer is with given thickness. However, Sakong does not explicitly disclose that the thickness of the insulating layer is greater than or equal to 10 micrometers and less than or equal to 20 micrometers. Even though Sakong does not disclose insulating layer a thickness range greater than or equal to 10 micrometers and less than or equal to 20 micrometers, the said range is predictable by simple engineering optimization motivated by a design choice, such as overall size of display. In cases like the present, where patentability is said to be based upon particular chosen dimensions or upon another variable recited within the claims, applicant must show that the chosen dimensions are critical. As such, the claimed dimensions appear to be an obvious matter of engineering design choice and thus, while being a difference, does not serve in any way to patentably distinguish the claimed invention from the applied prior art. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990); In re Kuhle, 526 F2d. 553,555,188 USPQ 7, 9 (CCPA 1975). Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Sakong in view of Cho et al. (US 2010/0109035 A1 hereinafter referred to as “Cho”). With respect to claim 11, Sakong discloses all the claimed limitations of claim 1. Moreover, Sakong teaches removal of the first substrate and before forming the black matrix layer (see Figs.15-18). However, Sakong does not explicitly disclose that the manufacturing method of the display device according to claim 1, further comprising performing a cleaning step and a roughening step on the first side of the light emitting components after removing the first substrate and before forming the black matrix layer. Cho discloses, in Figs.1-18, the manufacturing method of the display device, further comprising performing a cleaning step and a roughening step on the first side of the light emitting components after removing the first substrate and before forming the black matrix layer (see Par.[0080] wherein the Si--Al substrate 101 passes through a cleaning process using chemicals such as acid to remove a native oxide film before forming the bonding metal layer 102, the Al of the surface of the Si--Al substrate 101 is etched and surface unevenness of average 200 to 500 nm is formed at the same time, while, in accordance with the first embodiment of the present invention, if Ni CMP (Chemical Mechanical Polishing) is performed after forming the metal such as Ni as the protection layer 120 on the surface of the Si--Al substrate 101, the surface unevenness is reduced below 5nm, thereby improving the surface roughness like a mirror surface). Sakong and Choi are analogous art because they are all directed to a display device, and one of ordinary skill in the art would have had a reasonable expectation of success by modifying Sakong to include Choi because they are from the same field of endeavor. Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was made to modify the step of removal the first substrate in Sakong by including cleaning and roughening steps as taught by Choi in order to utilize the improve surface roughness during substrate removal for better lightning and adhesion. Claims 12, 19 are rejected under 35 U.S.C. 103 as being unpatentable over Kim in view of Wang et al. (US 2024/0276846 A1 hereinafter referred to as “Wang”). With respect to claim 12, Kim discloses all the claimed limitations of claim 1. However, Kim does not explicitly disclose the limitations of claim 12. Wang discloses, in Fig.20, the manufacturing method of the display device according to claim 1, further comprising: forming a polarizer (500) on the third substrate; adhering a touch panel (900) to the polarizer (500); and forming a cover plate (300) on the touch panel (900), wherein the touch panel (900) is disposed between the cover plate (300) and the polarizer (500). Kim and Wang are analogous art because they are all directed to a display device, and one of ordinary skill in the art would have had a reasonable expectation of success by modifying Kim to include Wang because they are from the same field of endeavor. Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was made to modify display panel structure in Kim by including polarizer as taught by Wang in order to utilize the primary role of polarizer such as to control the light that passes through the screen, enabling the creation of visible images thereby improving image clarity, enhance contrast, reduce glare and providing energy efficiency. With respect to claim 19, Kim discloses all the claimed limitations of claim 13. However, Kim does not explicitly disclose the limitations of claim 19. Wang discloses, in Fig.20, the manufacturing method of the display device according to claim 1, further comprising: forming a polarizer (500) on the third substrate; adhering a touch panel (900) to the polarizer (500); and forming a cover plate (300) on the touch panel (900), wherein the touch panel (900) is disposed between the cover plate (300) and the polarizer (500). Kim and Wang are analogous art because they are all directed to a display device, and one of ordinary skill in the art would have had a reasonable expectation of success by modifying Kim to include Wang because they are from the same field of endeavor. Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was made to modify display panel structure in Kim by including polarizer as taught by Wang in order to utilize the primary role of polarizer such as to control the light that passes through the screen, enabling the creation of visible images thereby improving image clarity, enhance contrast, reduce glare and providing energy efficiency. Citation of Pertinent Prior Art The prior art made of record (e.g.; see PTO-892) and not relied upon is considered pertinent to applicant's disclosure. Examiner’s Telephone/Fax Contacts Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOULOUCOULAYE INOUSSA whose telephone number is (571)272-0596. The examiner can normally be reached Monday-Friday (10-18). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, JEFF W NATALINI can be reached at 571-272-2266. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Mouloucoulaye Inoussa/ Primary Examiner, Art Unit 2818
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Prosecution Timeline

May 12, 2023
Application Filed
Jul 28, 2025
Non-Final Rejection — §102, §103
Mar 30, 2026
Response after Non-Final Action

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
93%
With Interview (+7.1%)
2y 5m
Median Time to Grant
Low
PTA Risk
Based on 752 resolved cases by this examiner. Grant probability derived from career allow rate.

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