Prosecution Insights
Last updated: May 29, 2026
Application No. 18/198,355

METAL OXIDE PRECLEANING PRIOR TO METAL FILLING

Non-Final OA §103§112
Filed
May 17, 2023
Priority
Jun 16, 2022 — provisional 63/352,799
Examiner
PHAM, THOMAS T
Art Unit
1713
Tech Center
1700 — Chemical & Materials Engineering
Assignee
Tokyo Electron Limited
OA Round
3 (Non-Final)
52%
Grant Probability
Moderate
3-4
OA Rounds
2m
Est. Remaining
68%
With Interview

Examiner Intelligence

Grants 52% of resolved cases
52%
Career Allowance Rate
293 granted / 567 resolved
-13.3% vs TC avg
Strong +16% interview lift
Without
With
+16.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
49 currently pending
Career history
636
Total Applications
across all art units

Statute-Specific Performance

§103
84.6%
+44.6% vs TC avg
§102
2.5%
-37.5% vs TC avg
§112
12.6%
-27.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 567 resolved cases

Office Action

§103 §112
DETAILED ACTION This is the Office action based on the 18198355 application filed May 17, 2023, and in response to applicant’s argument/remark filed on April 23, 2026. Claims 1-20 are currently pending and have been considered below. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on April 23, 2026 has been entered. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a):(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. Claim 1 rejected under 35 U.S.C. 112(a) as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor(s), at the time the application was filed, had possession of the claimed invention. Examiner is unable to find support for the limitation “performing a non-plasma, hot vapor-phase etching process that exposes the substrate to a vapor-phase fluorine-containing agent and a temperature above approximately 100 degrees Celsius to remove the oxide film from the metal-containing surface” in the specification. The specification does not contain the term “non-plasma”, and the claim does not define the term “non-plasma” in the phrase “performing a non-plasma, hot vapor-phase etching process”. Although the specification teaches that “the surface of the substrate shown in FIG. 1 is exposed to a plasma (e.g., a CCP or radical hydrogen plasma) to remove the native oxide film 120 from the first metal material 115 via dry etching. As shown in FIG. 1, the plasma process used to clean the first metal material 115 can result in undesirable rounding of the dielectric structures and/or other damage “ [0005], “the techniques disclosed herein provide native oxide removal without plasma-based damage” ([0032] and “(i)nstead of using plasma cleaning, hot vapor HF etching is used to clean metal-containing surfaces, in combination with TMSDMA deposition (or a similar protective chemical) before and/or after the hot vapor HF etching to enable selective metal (e.g., Ru) deposition on the cleaned metal-containing surfaces” ([0032]), these features have a different scope than the claimed limitation. For examples, in the sentence “the surface of the substrate shown in FIG. 1 is exposed to a plasma (e.g., a CCP or radical hydrogen plasma) to remove the native oxide film 120 from the first metal material 115 via dry etching”, the oxide film may be exposed to a plasma to form a modified layer prior to the removal, i.e. etching, of the modified layer by using a non-plasma gas as taught by Moffatt ([0060]). Although the specification discloses “(t)he techniques disclosed herein provide native oxide removal without plasma-based damage” it is well known in the art that a remote plasma may achieve the same task. Thus, the claimed limitation has a different scope than described in the specification. Claim 11 rejected under 35 U.S.C. 112(a) as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor(s), at the time the application was filed, had possession of the claimed invention. Examiner is unable to find support for the limitation “performing a non-plasma, hot vapor-phase etching process that delivers a vapor-phase fluorine-containing or chlorine-containing agent to the substrate while the substrate is held at a temperature above approximately 100 degrees Celsius, to remove the oxide film from the metal-containing surface” in the specification. The specification does not contain the term “non-plasma”, and the claim does not define the term “non-plasma” or its metes and bounds. Although the specification teaches that “the surface of the substrate shown in FIG. 1 is exposed to a plasma (e.g., a CCP or radical hydrogen plasma) to remove the native oxide film 120 from the first metal material 115 via dry etching. As shown in FIG. 1, the plasma process used to clean the first metal material 115 can result in undesirable rounding of the dielectric structures and/or other damage “ [0005], “the techniques disclosed herein provide native oxide removal without plasma-based damage” ([0032] and “(i)nstead of using plasma cleaning, hot vapor HF etching is used to clean metal-containing surfaces, in combination with TMSDMA deposition (or a similar protective chemical) before and/or after the hot vapor HF etching to enable selective metal (e.g., Ru) deposition on the cleaned metal-containing surfaces” ([0032]), these features have a different scope than the claimed limitation. For examples, in the sentence “the surface of the substrate shown in FIG. 1 is exposed to a plasma (e.g., a CCP or radical hydrogen plasma) to remove the native oxide film 120 from the first metal material 115 via dry etching”, the oxide film may be exposed to a plasma to form a modified layer prior to the removal, i.e. etching, of the modified layer by using a non-plasma gas, as taught by Moffatt ([0060]). Although the specification discloses “(t)he techniques disclosed herein provide native oxide removal without plasma-based damage” it is well known in the art that a remote plasma may achieve the same task. Thus, the claimed limitation has a different scope than described in the specification. Claims 2-10 and 12-20 rejected under 35 U.S.C. 112(a) because they are directly or indirectly dependent on claim 1 or 11. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. Claim 1 rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention. Claim 1 recites “performing a non-plasma, hot vapor-phase etching process that exposes the substrate to a vapor-phase fluorine-containing agent and a temperature above approximately 100 degrees Celsius to remove the oxide film from the metal-containing surface”. However, the specification does not contain the term “non-plasma”, and the claim does not define the term “non-plasma” in the above phrase. One of skill in the art would not be clear how to perform the etching process. For example, one of skill in the art would not be clear whether the limitation “non-plasma” is applicable during the producing the vapor-phase fluorine-containing agent, the exposing the substrate to the vapor-phase fluorine-containing agent, the etching the oxide film, or all of the above. For example, the oxide film may be exposed to a plasma to form a modified layer prior to the removal, i.e. etching, of the modified layer by using a non-plasma gas, as taught by Moffatt ([0060]). Claim 11 recites “performing a non-plasma, hot vapor-phase etching process that delivers a vapor-phase fluorine-containing or chlorine-containing agent to the substrate while the substrate is held at a temperature above approximately 100 degrees Celsius, to remove the oxide film from the metal-containing surface”. However, the specification does not contain the term “non-plasma”, and the claim does not define the term “non-plasma” in the above phrase. One of skill in the art would not be clear how to perform the etching process. For example, one of skill in the art would not be clear whether the limitation “non-plasma” is required only during the exposing the substrate. For example, one of skill in the art would not be clear whether the limitation “non-plasma” is applicable during the producing the vapor-phase fluorine-containing agent, the delivering the vapor-phase fluorine-containing or chlorine-containing agent, the exposing the substrate to the vapor-phase fluorine-containing or chlorine-containing agent, the etching the oxide film, or all of the above. For example, the oxide film may be exposed to a plasma to form a modified layer prior to the removal, i.e. etching, of the modified layer by using a non-plasma gas, as taught by Moffatt ([0060]). Claims 2-10 and 12-20 rejected under 35 U.S.C. 112(b) because they are directly or indirectly dependent on claim 1 or 11. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1-4, 10-15 and 20 rejected under 35 U.S.C. 103 as being obvious over Khaderbad et al. (U.S. PGPub. No. 20190164817), hereinafter “Khaderbad”, in view of Moffatt et al. (U.S. PGPub. No. 20170271131), hereinafter “Moffatt”:--Claims 1, 2, 3, 4, 11, 12, 13, 14, 15: Khaderbad teaches a method of manufacturing a semiconductor device, comprisingi) forming a gate electrode layer 94 over a substrate, wherein the gate electrode layer 94 may comprise TiN (Fig. 15B, [0053]);ii) forming a ILD layer 102 over the gate electrode layer 94, then forming via holes 108 and 106 through the ILD layer 102 to expose the gate electrode layer 94 and a source/drain layer, respectively (Fig. 16B, [0054]);iii) forming a silicide layer 110 in the via hole 106, wherein the silicide layer 110 comprises cobalt ([0055, Fig. 16B);iv) filling the holes by depositing a conductive material 112, wherein the conductive material 112 is deposited into the via hole 106 in a bottom-up manner (Fig. 17A and B, [0056]). Khaderbad further teaches that after forming the hole 108 and before filling the hole 108 by depositing conductive material 112, a surface treatment may be performed on the exposed surface of the ILD layer 102 to improve the deposition selectivity on the gate electrode layer 94 versus the ILD layer 102 ([0061], Fig. 19B), the surface treatment may comprise a silylation process performed using chemicals, such as trimethylsilane (TMS) to form a silicon-containing material 129 on the exposed surface of the ILD layer 102 (Fig. 20-23B), wherein the surface treatment may be a vapor-phase treatment ([0063-0064], Fig. 19B-20), then performing a cleaning process, then filling the hole 108 by depositing conductive material 112 ([0070]). Khaderbad further teaches that the cleaning process may be a plasma cleaning using a process gas comprising H2, BCl3, NF3, HF, HCl, SiCl4, Cl2, SF6, CF4, CHxFy, He, Ar, a mixture thereof, or the like, wherein the cleaning would remove native oxide from a surface in the holes ([0056, 0070]). Therefore, it would have been obvious to one of ordinary skill in the art at the effective filing date of the invention to remove at least an amount of native oxide from the exposed surface of the gate electrode layer 94 during the cleaning process in step (iv) above. Khaderbad is silent about a temperature during the cleaning and fails to teach the claimed temperature of above approximately 100 degrees Celsius. Moffatt, also directed to manufacturing a semiconductor device, teaches that a native oxide layer may be removed from a substrate by exposing to a remote plasma containing fluorine at a temperature below about 100 degrees Celsius to form a sublimation layer from a native oxide layer on the substrate, and then the temperature of the substrate may be elevated above about 100 degrees Celsius to remove the sublimation layer. Moffat further teaches that, alternately, the exposure may be performed by using HF vapor or plasma ([0060]). Therefore, it would have been obvious to one of ordinary skill in the art at the effective filing date of the invention, in routine experimentations, to perform the cleaning in the invention of Khaderbad comprising exposing the substrate to HF vapor in the invention of Khaderbad because Khaderbad teaches that the cleaning may use a plasma comprising HF to remove native oxide from the substrate, and Moffatt teaches that either HF vapor or HF plasma would be effective for the native oxide removal. It would also have been obvious to one of ordinary skill in the art at the effective filing date of the invention, in routine experimentations, to expose the perform the exposure at a temperature above approximately 100 degrees Celsius in the invention of Khaderbad because Moffat teaches to perform the exposure at below about 100 degrees Celsius. It is also noted that normal fluctuation in manufacturing conditions and temperature sensor calibration would cause temperature fluctuation around a setpoint. It is noted that, according to MPEP 2144.05, " Generally, differences in concentration or temperature will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such concentration or temperature is critical. "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)”.--Claims 10, 20: Khaderbad further teaches that the conductive material 112 may comprise W ([0056]) Claims 5-8 and 16-18 rejected under 35 U.S.C. 103 as being obvious over Khaderbad in view of Moffat as applied to claim 1 above, and further in view of Wang et al. (U.S. PGPub. No. 20190214296), hereinafter “Wang”:--Claims 5, 6, 7, 16, 17, 18: Khaderbad modified by Moffat teaches the invention as above. Khaderbad fails to teach exposing the substrate to a second silicon-containing gas after the cleaning process. Wang, also directed to filling a contact hole by depositing a conductive material, teaches to perform a silylation after the cleaning process and before the depositing a conductive material to render the dielectric surface hydrophobic so that a subsequent deposition of metal has a higher selectivity to deposit the metal at a greater rate on a metallic surface than the dielectric surfaces compared to without such treatment (Steps 216 in Fig. 11, [0039]), the silylation may comprise N-(trimethylsilyl)dimethylamine (TMSDMA) or trimethylsilane (TMS) ([0039]). Therefore, it would have been obvious to one of ordinary skill in the art at the effective filing date of the invention, in routine experimentations, to use TMSDMA as the silylation both before and after the cleaning process in the invention of Khaderbad.--Claim 8: Although Khaderbad modified by Moffat fails to disclose the silylation after the cleaning process restores portions of the dielectric material that are damaged during the cleaning process, since the dielectric material, the silylation agent and the cleaning process taught by Khaderbad modified by Moffat are the same as Applicant’s, such restoration would inherently occur, as taught by Applicant. Claims 9 and 19 rejected under 35 U.S.C. 103 as being obvious over Khaderbad in view of Moffat as applied to claims 1 and 11 above, and further in view of Yasuda (U.S. PGPub. No. 20040259374), hereinafter “Yasuda”:--Claims 9, 19: Khaderbad modified by Moffat teaches the invention as above, wherein Khaderbad teaches performing a cleaning process to remove a native oxide on a conductive layer comprising TiN. Khaderbad is silent about a chemical formula of the native oxide. Yasuda, also directed to a method of manufacturing a semiconductor device, teaches that a native oxide of a TiN layer is TiO2 ([0012]). Therefore, it would have been obvious to one of ordinary skill in the art at the effective filing date of the invention to perform the cleaning process to remove a native oxide comprising TiO2 in the invention of Khaderbad because Khaderbad is silent about a chemical formula of the native oxide, and Yasuda teaches that a native oxide of a TiN layer is TiO2. Response to Arguments Applicant's arguments filed April 23, 2026 have been fully considered as follows:--Regarding Applicant’s argument that the previously cited prior arts do not teach all of the amended features, this arguments is persuasive. New grounds of rejection based on newly found prior arts are shown above. --Regarding Applicant’s argument that Khaderbad teaches depositing the SAM after the plasma cleaning, and does not teaches a plasma cleaning after the depositing the SAM, this argument is not persuasive. Khaderbad clearly teaches that “the openings 104, 106 and 108 (see FIG. 16B) are filled with a conductive material 112 to form contact plugs 114, 116, and 118 in the openings 104, 106 and 108, respectively. In some embodiment, before filling the openings 104, 106 and 108 with the conductive material 112, a cleaning process may be performed” ([0056]). It is clear that the cleaning is performed immediately before the conductive material is deposited in order to ensure a good contact to the underlying conductive layers. Khaderbad further teaches “FIG. 19B illustrates a structure similar to the structure shown in FIG. 17B, with like elements labeled by like numerical references. In the illustrated embodiment, after forming the openings 104, 106, and 108 (see FIG. 16B) and before filling the openings 104, 106, and 108 with the conductive material 112, a surface treatment is performed on exposed surfaces of the ESL 87 and the ILDs 88 and 102” ([0061]). Since the surface treatment deposits a non-conductive layer of self-assembled monolayers (SAMs) on the surface, one of skill in the art would perform the cleaning after the surface treatment and before the filling the contact holes with a conductive material 112 to ensure a good contact to the underlying conductive layers. Regarding Applicant’s argument that “Khaderbad makes clear that "surface treatment" is used to tune the parameters of the deposition process and improve the non-conformal bottom-up deposition of the conductive material 112 within the openings 104, 106, and 108. Accordingly, a skilled artisan having the benefit of Khaderbad's teaching would readily understand that Khaderbad's "surface treatment" is performed after the plasma cleaning step, just prior to filling the openings 104, 106, and 108 with the conductive material 112”, this argument is not persuasive. Khaderbad clearly emphasizes the need to clean the contact in order to ensure the conductive layer makes good contact with the underlying layer. Since the SAM, comprises silicon containing molecules, is blank deposited over the whole substrate, and would readily form native oxide upon exposing to the environment, this emphasizes the need to perform the cleaning to remove the native oxide layer prior to depositing the conductive material into the contact holes. One of skills in the art would recognize the providing a good contact between conductive layers at the contact surface would be far more important than a good bottom-up deposition.--It is noted that the amended features lack support in the specification under 35 U.S.C. 112(a) and are not definite under 35 U.S.C. 112(b), as explained above. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to THOMAS PHAM whose telephone number is (571) 270-7670 and fax number is (571) 270-8670. The examiner can normally be reached on MTWThF9to6 PST. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Joshua Allen can be reached on (571) 270-3176. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /THOMAS T PHAM/Primary Examiner, Art Unit 1713
Read full office action

Prosecution Timeline

May 17, 2023
Application Filed
Sep 17, 2025
Non-Final Rejection mailed — §103, §112
Oct 28, 2025
Response Filed
Feb 09, 2026
Final Rejection mailed — §103, §112
Mar 10, 2026
Response after Non-Final Action
Apr 23, 2026
Request for Continued Examination
Apr 24, 2026
Response after Non-Final Action
May 20, 2026
Non-Final Rejection mailed — §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
52%
Grant Probability
68%
With Interview (+16.3%)
3y 2m (~2m remaining)
Median Time to Grant
High
PTA Risk
Based on 567 resolved cases by this examiner. Grant probability derived from career allowance rate.

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