Prosecution Insights
Last updated: April 19, 2026
Application No. 18/200,588

TRANSISTOR STRUCTURE

Non-Final OA §102§103§112
Filed
May 23, 2023
Examiner
AHMED, SHAHED
Art Unit
2813
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Invention And Collaboration Laboratory Pte. Ltd.
OA Round
1 (Non-Final)
91%
Grant Probability
Favorable
1-2
OA Rounds
2y 1m
To Grant
91%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allow Rate
866 granted / 955 resolved
+22.7% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
45 currently pending
Career history
1000
Total Applications
across all art units

Statute-Specific Performance

§101
1.8%
-38.2% vs TC avg
§103
50.9%
+10.9% vs TC avg
§102
22.0%
-18.0% vs TC avg
§112
19.8%
-20.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 955 resolved cases

Office Action

§102 §103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION This action is responsive to application No. 18200588 filed on 5/23/2023. Information Disclosure Statement Acknowledgment is made of Applicant’s Information Disclosure Statement (IDS) form PTO-1449. These IDS has been considered. Election/Restrictions Applicant’s election without traverse of claims 1-21 in the reply filed on 10/2/2025 is acknowledged. Allowable subject matter Claims 6, 10, 15 (for claim 15 pending resolution of drawing objection) are objected to as being dependent upon a rejected base claim (independent claims 1 & 11), but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is an examiner’s statement of reasons for allowance: The closest prior art known to the Examiner is listed on the PTO 892 forms of record. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Basu et al. (US 2015/0123205). With respect to dependent claim 6, the cited prior art does not anticipate or make obvious, inter alia, the step of: “further comprising a STI layer surrounding the isolation wall”. With respect to dependent claim 10, the cited prior art does not anticipate or make obvious, inter alia, the step of: “an L-shape oxide layer positioned in the first concave, wherein the oxide layer comprises a vertical portion facing the conductive channel region and a lateral portion covering a bottom of the first concave”. With respect to dependent claim 15, the cited prior art does not anticipate or make obvious, inter alia, the step of: “a source region contacting with a first end of the conductive channel region, and electrically connecting to the first vertical conductive sheet and the second vertical conductive sheet; a drain region contacting with a second end of the conductive channel region, and electrically connecting to the first vertical conductive sheet and the second vertical conductive sheet; and a gate region crossing over the conductive channel region and the central pole; wherein a bottom of a gate conductive material of the gate region outside the convex structure is lower than the bottom surface of the source region or the drain region”. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (B) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 13 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. Claim 13 recites the limitation “the non-conductive sheet”. The metes and bounds of the claimed limitation can not be determined for the following reasons: This limitation has not been defined before and therefore it is not clear what this limitation is referring to. For the purpose of the examination, the term “the non-conductive sheet” will be interpreted as “the conductive sheet”. Drawings The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the highlighted limitation of claim 11 “wherein the convex structure has a conductive channel region which comprises a first vertical conductive sheet and a second vertical conductive sheet” must be shown or the feature(s) canceled from the claim(s). Additionally, the limitation of claim 15 “wherein a bottom of a gate conductive material of the gate region outside the convex structure is lower than the bottom surface of the source region or the drain region” must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-5, 7-8, 11, 16-19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Basu et al. (US 2015/0123205). Regarding independent claim 1, Basu et al. teach a transistor structure comprising: a substrate (Figs. 9A-9D, element 10, paragraph 0046) with a convex structure (Figs. 9A-9D, elements 22,30B,56,50,52, 30S, 30D), wherein the convex structure has a conductive channel region (Figs. 9A-9D, element 30B, paragraph 0075); a source region (Figs. 9A-9D, element 30S, paragraph 0068) contacting with a first end of the conductive channel region; a drain region (Figs. 9A-9D, element 30D, paragraph 0068) contacting with a second end of the conductive channel region; a trench (Fig. 5B, element 49, paragraph 0066) formed in the convex structure and between the first end and the second end; and a central pole (Figs. 9A-9D, element 22, paragraph 0069) in the trench, wherein a material of the central pole (paragraph 0071 discloses oxide) is different from that of the conductive channel region (paragraph 0075 discloses semiconductor material). Regarding claim 2, Basu et al. teach wherein the substrate is made of silicon (paragraph 0046), and the central pole is encompassed by a surrounding ring of silicon within the convex structure (Figs. 9A-9D). Regarding claim 3, Basu et al. teach wherein the material of the central pole is a non-conductive material (paragraph 0071). Regarding claim 4, Basu et al. teach wherein the non-conductive material is oxide (paragraph 0071) thermally grown in the trench (The limitation “thermally grown in the trench” is a product-by-process limitation. Even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process." In re Thorpe, 777 F.2d 695,698,227 USPQ 964, 966 (Fed. Cir. 1985), MPEP §2113). Regarding claim 5, Basu et al. teach a gate (Figs. 9A-9D, element 50,52, paragraph 0083) region crossing over the conductive channel region and the non-conductive material; and an isolation wall (Figs. 9A-9D, element 60, paragraph 0065) clamping sidewalls of the convex structure. Regarding claim 7, Basu et al. teach further comprising a spacer layer (Figs. 9A-9D, element 56, paragraph 0081) on a sidewall of the gate region. Regarding claim 8, Basu et al. teach a first concave being in the convex structure and accommodating the source region, wherein an edge of the first concave is aligned or substantially aligned with an edge of the gate region; and a second concave being in the convex structure and accommodating the drain region, wherein an edge of the second concave is aligned or substantially aligned with another edge of the gate region; wherein the source region and the drain region are independent from the substrate (Figs. 9A-9D). Regarding independent claim 11, Basu et al. teach a transistor structure comprising: a substrate (Figs. 9A-9D, element 10, paragraph 0046) with a convex structure (Figs. 9A-9D, elements 22,30B,56,50,52), wherein the convex structure has a conductive channel region (Figs. 9A-9D, element 30B, paragraph 0075) which comprises a first vertical conductive sheet (vertical portion of channel near element 30S) and a second vertical conductive sheet (vertical portion of channel near element 30D); wherein the first vertical conductive sheet is separate from the second vertical conductive sheet by a central pole (Figs. 9A-9D, element 22, paragraph 0069) positioned in the conductive channel region. Regarding claim 16, Basu et al. teach a selective grown (the limitation “selective grown” is a product by process limitation. Even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process." In re Thorpe, 777 F.2d 695,698,227 USPQ 964, 966 (Fed. Cir. 1985), MPEP §2113) semiconductor layer (Figs. 9A-9D, element 30S) covering the first vertical conductive sheet and the second vertical conductive sheet. Regarding independent claim 17, Basu et al. teach a transistor structure comprising: a substrate (Figs. 9A-9D, element 10, paragraph 0046) with a convex structure structure (Figs. 9A-9D, elements 22,30B,56,50,52), wherein the convex structure has a conductive channel region (Figs. 9A-9D, element 30B, paragraph 0075); a first conductive region (Figs. 9A-9D, element 30S, paragraph 0068) contacting with a first end of the conductive channel region; and a second conductive region (Figs. 9A-9D, element 30D, paragraph 0068) contacting with a second end of the conductive channel region; wherein a conductive current during an ON state of the transistor structure is diverged in the conductive channel region extending from the first conductive region to the second conductive region (Manner of operating the device does not differentiate apparatus claim from the prior art “[A]pparatus claims cover what a device is, not what a device does.” Hewlett-Packard Co.v.Bausch & Lomb Inc., 909 F.2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990) (emphasis in original). A claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987)). MPEPE 2114.II.). Regarding claim 18, Basu et al. teach wherein the conductive current is diverged into multiple paths in the conductive channel region (Manner of operating the device does not differentiate apparatus claim from the prior art “[A]pparatus claims cover what a device is, not what a device does.” Hewlett-Packard Co.v.Bausch & Lomb Inc., 909 F.2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990) (emphasis in original). A claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987)). MPEPE 2114.II.). Regarding claim 19, Basu et al. teach wherein a leakage current during an OFF state of the transistor structure is lower than 1 pA (Manner of operating the device does not differentiate apparatus claim from the prior art “[A]pparatus claims cover what a device is, not what a device does.” Hewlett-Packard Co.v.Bausch & Lomb Inc., 909 F.2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990) (emphasis in original). A claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987)). MPEPE 2114.II.). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Basu et al. (US 2015/0123205) in view of Kang (US 2023/0036029). Regarding claim 9, Basu et al. teach all of the limitations as discussed above. Basu et al. do not explicitly disclose wherein the source region comprises: an LDD region laterally extending from the first end of the conductive channel region; a heavily doped region laterally extending from the LDD region; and a metal region contacting the heavily doped region. Kang teach a transistor comprising wherein the source region comprises: an LDD region (Fig. 1, element 40, paragraph 0042) laterally extending from the first end of the conductive channel region; a heavily doped region (Fig. 1, element 50, paragraph 0042) laterally extending from the LDD region; and a metal region (Fig. 1, element 80, paragraph 0042) contacting the heavily doped region. It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to modify the teachings of Basu et al. according to the teachings of Kang with the motivation to optimize electrical conductivity and provide interconnection to the transistor. Claims 12-14 are rejected under 35 U.S.C. 103 as being unpatentable over Basu et al. (US 2015/0123205). Regarding claim 12, Basu et al. teach wherein a width of the first vertical conductive sheet or the second vertical conductive sheet is between 1˜5 nm (the width of the vertical conductive sheet can be changed to optimize the electrical conductivity. Accordingly, the width is an art recognized variable. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to vary, through routine optimization, the width and arrive at the claimed limitation. Furthermore, the applicant has not presented persuasive evidence that the claimed width is for a particular purpose that is critical to the overall claimed invention). Regarding claim 13, Basu et al. teach wherein a height of the non-conductive sheet is between 30˜60 nm (the height of the vertical conductive sheet can be changed to optimize the electrical conductivity. Accordingly, the height is an art recognized variable. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to vary, through routine optimization, the height and arrive at the claimed limitation. Furthermore, the applicant has not presented persuasive evidence that the claimed height is for a particular purpose that is critical to the overall claimed invention). Regarding claim 14, Basu et al. teach wherein a length of the central pole is shorter than that of the first vertical conductive sheet or the second vertical conductive sheet (Figs. 9A-9D). Claims 20-21 are rejected under 35 U.S.C. 103 as being unpatentable over Basu et al. (US 2015/0123205). Regarding independent claim 20, Basu et al. teach a transistor structure comprising: a substrate (Figs. 9A-9D, element 10, paragraph 0046) with a convex structure (Figs. 9A-9D, elements 22,30B,56,50,52), wherein the convex structure comprises a conductive channel region Figs. 9A-9D, element 30B, paragraph 0075) made of a semiconductor material (paragraph 0075 discloses semiconductor material); a trench (Fig. 5B, element 49, paragraph 0066) formed in the convex structure, wherein the trench is encompassed by a ring shape of the semiconductor material (Figs. 9A-9D, a portion of the trench is encompassed by the semiconductor material, the shape of the semiconductor material is a matter of choice which a person skilled in the art would have found obvious absent persuasive evidence that the particular shape of the claimed limitation was significant, In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). MPEP 2144.04.); and a gate region (Figs. 9A-9D, element 50,52) crossing over the conductive channel region and the trench. Regarding claim 21, Basu et al. teach wherein the conductive channel region comprises the ring shape of the semiconductor material (Figs. 9A-9D). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAHED AHMED whose telephone number is (571)272-3477. The examiner can normally be reached M-F 9-5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven Gauthier can be reached on 571-270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SHAHED AHMED/ Primary Examiner, Art Unit 2813
Read full office action

Prosecution Timeline

May 23, 2023
Application Filed
Sep 13, 2023
Response after Non-Final Action
Nov 26, 2025
Non-Final Rejection — §102, §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
91%
Grant Probability
91%
With Interview (+0.0%)
2y 1m
Median Time to Grant
Low
PTA Risk
Based on 955 resolved cases by this examiner. Grant probability derived from career allow rate.

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