DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Claims 6-8 is/are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 9/26/25.
Response to Arguments
Applicant’s arguments, see Remarks, filed 1/8/26, with respect to the rejection(s) of claim(s) 1-5 under 35 USC 103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration in light of the amendments, a new ground(s) of rejection is made in view of Yoshida.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-5 is/are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Amended claim 1 recites:
“an area, where only the insulating portion is arranged, exists” because it is unclear as to what “only” excludes. Does “only” exclude conductive structures, vias, lower-layer wiring, buried traces?
Further, “an area” also makes the terminology “any of an interval” unclear and should be --greater than each of-- or --greater than both--.
Furthermore, “an area” makes the terminology “side by side” imprecise.
The other claims are rejected as being dependent on claim 1.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-5 is/are, to the extent taught and understood, 35 U.S.C. 102(a)(2) as being anticipated by U.S. Patent Application Publication No. 2019/0171075 (Yoshida).
The applied reference has a common assignee with the instant application. Based upon the earlier effectively filed date of the reference, it constitutes prior art under 35 U.S.C. 102(a)(2). This rejection under 35 U.S.C. 102(a)(2) might be overcome by: (1) a showing under 37 CFR 1.130(a) that the subject matter disclosed in the reference was obtained directly or indirectly from the inventor or a joint inventor of this application and is thus not prior art in accordance with 35 U.S.C. 102(b)(2)(A); (2) a showing under 37 CFR 1.130(b) of a prior public disclosure under 35 U.S.C. 102(b)(2)(B) if the same invention is not being claimed; or (3) a statement pursuant to 35 U.S.C. 102(b)(2)(C) establishing that, not later than the effective filing date of the claimed invention, the subject matter disclosed in the reference and the claimed invention were either owned by the same person or subject to an obligation of assignment to the same person or subject to a joint research agreement.
Yoshida discloses (at least Figs. 6, 7, 9-17, 22, 21)
1. (Currently Amended) A wiring substrate comprising:
a first terminal 20B (second from far left);
a second terminal 20B (far right) disposed side by side at an interval from the first terminal in a first direction Y;
a third terminal 20B (far left) disposed side by side at an interval from the first terminal in the first direction Y on a side opposite the second terminal;
a first wiring 28 positioned between the first terminal and the second terminal, and extending along a second direction X intersecting the first direction Y;
a second wiring 28 connected to the first terminal and the third terminal; and
an insulating portion IN disposed on an upper layer side of the first terminal, the second terminal, the third terminal, the first wiring, and the second wiring.
wherein:
in a plan view, the first terminal 20B (second from far left), the second terminal 20B (far right), and the third terminal 20B (far left) are rectangles long sides of which extend in the second direction X and are arranged parallel to each other in the first direction Y, the first wiring 28 is arranged only between the first terminal and the second terminal, and an area, where only the insulating portion IN is arranged, exists between the first terminal and the third terminal, and
the third terminal third terminal 20B (far left) is further disposed at a position where an interval between the third terminal and the first terminal 20B (second from far left) is longer than any of an interval between the first wiring 28 and the first terminal 20B (second from far left) and an interval between the first wiring 28 and the second terminal 20B (far right).
Yoshida discloses
2. (Previously Presented) The wiring substrate according to claim 1, further comprising:
a fourth terminal (there are a total of 6 terminals) disposed at an interval from the first terminal in the second direction;
a fifth terminal (there are a total of 6 terminals) disposed at an interval from the second terminal in the second direction, and disposed side by side at an interval from the fourth terminal in the first direction; and
a sixth terminal (there are a total of 6 terminals) disposed at an interval from the third terminal in the second direction, and disposed side by side at an interval from the fourth terminal in the first direction on a side opposite the fifth terminal, wherein:
mounted components 21, 23 are mounted on positions
the first terminal, the second terminal, and the third terminal are positioned closer to an end of the mounted components 21, 23 than the fourth terminal, the fifth terminal, and the sixth terminal.
Yoshida teaches
3. (Previously Presented) The wiring substrate according to claim 2, further comprising:
a third wiring (there are 6 wirings) connected to the third terminal and the sixth terminal.
Yoshida teaches
4. (Previously Presented) The wiring substrate according to claim 2, further comprising:
a fourth wiring (there are 6 wirings) connected to the fourth terminal and the sixth terminal.
Yoshida teaches
5. (Previously Presented) The wiring substrate according to claim 4, wherein
the sixth terminal (any of the middle 20B) is further disposed at a position where an interval between the sixth terminal and the third terminal in the second direction is longer than any of an interval between the first terminal and the fourth terminal in the second direction and an interval between the second terminal and the fifth terminal in the second direction.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. U.S. Patent Application Publication Nos. 2023/0165077 (Wei), 2022/0101801 (Zhang), 2016/0071884 (Miyamoto), 2015/0070616 (Ogasawara) teach a wiring substrate having multiple terminals and wirings.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TERESA M ARROYO whose telephone number is (703)756-1576. The examiner can normally be reached Monday - Friday (8:30 A.M. E.T. - 5:00 P.M. E.T.).
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sue Purvis can be reached at 571.272.1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format.
For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/TERESA M. ARROYO/ Primary Examiner, Art Unit 2893