Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 03/26/2024, 08/29/2024 and, 08/18/2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Election/Restrictions
Applicant’s election of claims 1-7 and 19-31 without traverse in the reply filed on 09/09/2025 is acknowledged.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-4, 6-7. 19, 22-25, 29-31 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Takayama et al JP 2001007347 A. Takayama et al will be referenced to as Takayama henceforth.
Regarding Claim 1,
Takayama teaches:
“A power diode device comprising (FIG. 13) a substrate (substrate 110, cathode layer 120, RESURF layer 114, [0003], [0005]), the substrate comprising: a first diffusion layer (cathode layer 120, [0005]: the cathode layer is a n+ type diffusion layer.) of a first conductivity type (The first conductivity type being negative.), the first diffusion layer comprising a first surface and a second surface opposite to each other (FIG. 13: 120 has a top and bottom surface. The bottom surface is the first surface. The top surface is the second surface.), and the first surface of the first diffusion layer forming a bottom surface of the substrate (FIG. 13: The bottom surface of the substrate is also the bottom surface of 120.);
a second diffusion layer (RESURF layer 114, [0003]: the RESURF layer is a p-type diffusion layer.) of a second conductivity type (114 is p-type), the second diffusion layer comprising a first surface and a second surface opposite to each other (114 has a top and bottom surface. The top surface is the second surface and the bottom one is the first surface.), and the second surface of the second diffusion layer forming a top surface of the substrate (The top surface of 114 is also the top surface of the substrate.);
a core layer of the first conductivity type (substrate 110, [0003]: the substrate 110 is n-type.) between the first diffusion layer and the second diffusion layer (110 is between 114 and 120 in a vertical direction.), the core layer comprising a first surface and a second surface opposite to each other (110 has a top surface and a bottom surface. The bottom surface is the first surface. The top surface is the second surface.), the first surface of the core layer facing the first diffusion layer (The first surface of 110 also makes up a face of the first diffusion layer.), the second surface of the core layer facing the second diffusion layer (The second surface of 110 is also makes up a face of the second diffusion layer.), and a thickness of the core layer being greater than a thickness of the second diffusion layer (The thickness of the core layer in the vertical direction is greater than that of the second diffusion layer in the vertical direction.);
and a heavily doped region of the second conductivity type in the second diffusion layer (anode layer 112, [0003]: 112 is heavily doped relative to 114.) and extending toward the core layer (112 extends vertically toward 110.), the heavily doped region comprising a first surface (the bottom curved surface of 112.) and a second surface (the top flat surface of 112.) opposite to each other (FIG. 13), the second surface of the heavily doped region being coplanar with the second surface of the second diffusion surface (FIG. 13), the first surface of the heavily doped region reaching the second surface of the core layer or reaching in-between the first surface of the core layer and the second surface of the core layer without reaching the first surface of the core layer (the first surface of the heavily doped region reaches in-between the first surface of the core layer and the second surface of the core layer without reaching the first surface of the core layer.), with a first PN junction formed between the heavily doped region and the core layer (FIG. 13: 112 is p-type and 110 is n-type and 112 and 110 contact each other. Therefore, 110 and 112 form a PN junction.).”
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FIG. 13
Regarding Claim 2,
Takayama teaches:
“The power diode device of claim 1 (FIG. 13), wherein a second PN junction is formed between the core layer and the second diffusion layer (110 is n-type. 114 is p-type. 110 and 114 are in physical contact and therefore form a PN-junction.), the first PN junction and the second PN junction forming a continuous junction (FIG 13: 114 and 112 are continuously connected along a surface which is in contact with 110.).”
Regarding Claim 3,
Takayama teaches:
“The power diode device of claim 2, wherein the first PN junction protrudes over the second PN junction in a direction from the top surface of the substrate to the bottom surface of the substrate (FIG. 13).”
Regarding Claim 4,
Takayama teaches:
“The power diode device of claim 1 (FIG. 13), wherein the substrate further comprises: an isolation structure surrounding the heavily doped region (n+ type channel stopper layer 116, [0004]: the isolation structure laterally surrounds the heavily doped region.), the isolation structure being separated from the heavily doped region by the second diffusion layer (FIG. 13).”
Regarding Claim 6,
Takayama teaches:
“The power diode device of claim 1, further comprising: a first electrode layer (cathode electrode 134, [0008], FIG. 13), disposed on the bottom surface of the substrate and in contact with the first diffusion layer (FIG. 13);
and a second electrode layer, disposed on the top surface of the substrate and in contact with the heavily doped region (anode electrode 130, [0006], FIG. 13).”
Regarding Claim 7,
Takayama teaches:
“The power diode device of claim 6, further comprising: a passivation layer (oxide layer 124, [0007], FIG. 13), disposed on the top surface of the substrate and in contact with the heavily doped region (FIG. 13), the passivation layer surrounding the second electrode layer ([0007], FIG. 13: the oxide layer is laterally surrounding the second electrode layer.).”
Regarding Claim 19,
Takayama teaches:
“A power diode (FIG. 13) comprising:
a first diffusion layer of a first conductivity type (cathode layer 120, [0005]: the cathode layer is a n+ type diffusion layer.) in a substrate (substrate 110, cathode layer 120, RESURF layer 114, [0003], [0005]), the first diffusion layer comprising a first surface and a second surface opposite to each other (FIG. 13: 120 has a top and bottom surface. The bottom surface is the first surface. The top surface is the second surface.), and the first surface of the first diffusion layer being a bottom surface of the substrate (FIG. 13: The bottom surface of the substrate is also the bottom surface of 120.);
a second diffusion layer of a second conductivity type in the substrate (RESURF layer 114, [0003]: the RESURF layer is a p-type diffusion layer.), the second diffusion layer comprising a first surface and a second surface opposite to each other (114 has a top and bottom surface. The top surface is the second surface and the bottom one is the first surface.), and the second surface of the second diffusion layer being a top surface of the substrate (The top surface of 114 is also the top surface of the substrate.);
a core layer of the first conductivity type (substrate 110, [0003]: the substrate is n-type.) between the first diffusion layer and the second diffusion layer (110 is between 114 and 120 in a vertical direction.), the core layer comprising a first surface and a second surface opposite to each other (110 has a top surface and a bottom surface. The bottom surface is the first surface. The top surface is the second surface.), the first surface of the core layer facing the first diffusion layer (The first surface of 110 also makes up a face of the first diffusion layer.), and the second surface of the core layer facing the second diffusion layer (The second surface of 110 is also makes up a face of the second diffusion layer.);
a heavily doped region of the second conductivity type in the second diffusion layer (anode layer 112, [0003]: 112 is heavily doped relative to 114.), the heavily doped region extending into the core layer without reaching the first surface of the core layer (112 extends vertically toward 110 without reaching the bottom layer of 110.), with a first PN junction formed between the heavily doped region and the core layer (FIG. 13: 112 is p-type and 110 is n-type and 112 and 110 contact each other. Therefore, 110 and 112 form a PN junction.); and
an isolation structure separated from the heavily doped region by the second diffusion layer (n+ type channel stopper layer 116, [0004]).”
Regarding Claim 22,
Takayama teaches:
“The power diode of claim 19, wherein the isolation structure surrounds the heavily doped region and the second diffusion layer (n+ type channel stopper layer 116, [0004]: the isolation structure laterally surrounds the heavily doped region and the second diffusion layer.), and is separated from the heavily doped region by the second diffusion layer (FIG. 13).”
Regarding Claim 23,
Takayama teaches:
“The power diode of claim 19, further comprising:
a first electrode layer (cathode electrode 134, [0008]), disposed on the bottom surface of the substrate and in contact with the first diffusion layer (FIG. 13); and
a second electrode layer, disposed on the top surface of the substrate and covering a portion of the heavily doped region (anode electrode 130, [0006], FIG. 13).”
Regarding Claim 24,
Takayama teaches:
“The power diode of claim 19, further comprising:
a passivation layer (oxide layer 124, [0007], FIG. 13), disposed on the top surface of the substrate and in contact with the heavily doped region (FIG. 13), the passivation layer surrounding the second electrode layer ([0007], FIG. 13: the oxide layer is laterally surrounding the second electrode layer.).”
Regarding Claim 25,
Takayama teaches:
“A power diode device comprising (FIG. 13):
a first diffusion layer of a first conductivity type (cathode layer 120, [0005]: the cathode layer is a n+ type diffusion layer.);
a core layer of the first conductivity type on the first diffusion layer (substrate 110, [0003]: the substrate is n-type. 110 is on 120.);
a second diffusion layer of a second conductivity type on the core layer (RESURF layer 114, [0003]: the RESURF layer is a p-type diffusion layer. 114 is on 110.), the second diffusion layer having a first surface facing away from the core layer (the top layer of 114 is facing away from 110.), and first diffusion layer having a second surface facing away from the core layer (the bottom layer of 120 is facing away from the core layer.); and
a heavily doped region of the second conductivity type (anode layer 112, [0003]: 112 is heavily doped relative to 114.), extending from the first surface toward the core layer and through the second diffusion layer (112 extends vertically toward 110. 112 extends through 114.);
wherein a first PN junction formed between the heavily doped region and the core layer (FIG. 13: 112 is p-type and 110 is n-type and 112 and 110 contact each other. Therefore, 110 and 112 form a PN junction), and a second PN junction is formed between the core layer and the second diffusion layer (110 is n-type. 114 is p-type. 110 and 114 are in physical contact and therefore form a PN-junction.).”
Regarding Claim 29,
Takayama teaches:
“The power diode device of claim 25, wherein the heavily doped region has a thickness same as or greater than that of the second diffusion layer (FIG. 13: 112 extends vertically past 114.).”
Regarding Claim 30,
Takayama teaches:
“The power diode device of claim 25, further comprising:
a first electrode layer (cathode electrode 134, [0008]), disposed on the second surface and covering the first diffusion layer (FIG. 13); and
a second electrode layer, disposed on the first surface and covering a portion of the heavily doped region (anode electrode 130, [0006], FIG. 13).”
Regarding Claim 31,
Takayama teaches:
“The power diode device of claim 25, further comprising:
a passivation layer (oxide layer 124, [0007], FIG. 13), disposed on the first surface and covering a portion of the heavily doped region and the second diffusion layer (124 is covering both 114 and 112.), the passivation layer surrounding the second electrode layer ([0007], FIG. 13: the oxide layer is laterally surrounding the second electrode layer.).”
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 5, 20-21, 26-28 are rejected under 35 U.S.C. 103 as being unpatentable over Takayama as applied to claims 1-4, 6-7. 19, 22-25, 29-31 above, and further in view of Kudo JP 2006073710 A.
Regarding Claim 5,
Takayama teaches:
“The power diode device of claim 4,”
Takayama doesn’t substantially teach:
“wherein a depth of the isolation structure is greater than a depth of the heavily doped region.”
However, Kudo teaches:
“wherein a depth of the isolation structure is greater than a depth of the heavily doped region (Kudo: [0034-0035], FIG. 4).”
It would have been obvious to one with ordinary skill in the art before the effective filing
date of the invention to recognize that the device of Takayama is modifiable in view of Kudo.
This is because one of ordinary skill in the art would recognize that thermal diffusion is an inexpensive method of forming the impurity concentrations of both a channel stopper region and a high concentration p-type layer (Kudo [0036-0040]). One of ordinary skill in the art would further recognize that different concentration profiles entail different thicknesses (Kudo: [0035]). The cheaper method of Kudo entails a channel stopper with a greater thickness than a high concentration p-type layer as seen in FIG. 4 of Kudo. Therefore, one of ordinary skill in the art using the method of Kudo for the purpose of cost reduction would attain a greater thickness of a channel layer than a high concentration p-type layer.
Regarding Claim 20,
Takayama teaches:
“The power diode of claim 19, wherein a second PN junction is formed between the second diffusion layer and the core layer (Takayama: 110 is n-type. 114 is p-type. 110 and 114 are in physical contact and therefore form a PN-junction.),”
Takayama doesn’t substantially teach:
“and a third PN junction is formed between the isolation structure and the second diffusion layer.”
However, Kudo teaches:
“and a third PN junction is formed between the isolation structure and the second diffusion layer (Kudo: FIG. 4).”
It would have been obvious to one with ordinary skill in the art before the effective filing
date of the invention to recognize that the device of Takayama is modifiable in view of Kudo.
This is because one of ordinary skill in the art would recognize that a purpose of a channel stopper layer is to prevent the formation of parasitic channels (parasitic channels are unwanted conductive paths). When the power diode is placed in reverse bias, positive charges in the top of the device are attracted to the negative potential at the top of the device and negative charges are repelled away. Therefore, a depletion region forms between the channel stopper region and the p-type semiconductor region 3. No parasitic current can travel through a depletion region making for an effective channel stopper layer.
Regarding Claim 21,
Takayama/Kudo teaches:
“The power diode of claim 20, wherein the first PN junction and the second PN junction form a continuous junction (Takayama: FIG 13: 114 and 112 are continuously connected along a surface which is in contact with 110.).”
Regarding Claim 26,
Takayama/Kudo teaches:
“The power diode device of claim 25, further comprising:
an isolation structure of the first conductivity type (Takayama: n+ type channel stopper layer 116, [0004]: the isolation structure laterally surrounds the heavily doped region.), extending from the first surface toward the core layer (Takayama: FIG. 13), and surrounding the second diffusion layer and the heavily doped region (Takayama: FIG. 13: the isolation structure laterally surrounds 114 and 112.), the isolation structure being separated from the heavily doped region by the second diffusion layer (Takayama: FIG. 13: the second diffusion layer is horizontally separating the isolation structure from the heavily doped region.), wherein a third PN junction is formed between the isolation structure and the second diffusion layer (Kudo: FIG. 4). ”
Regarding Claim 27,
Takayama/Kudo teaches:
“The power diode device of claim 26, wherein the isolation structure has a thickness same as or greater than that of the second diffusion layer (Takayama: FIG. 13: 116 extends vertically past 114.).”
Regarding Claim 28,
Takayama/Kudo teaches:
“The power diode device of claim 26, wherein a thickness of the isolation structure is greater than that of the heavily doped region (Kudo: [0034-0035], FIG. 4).”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALEXANDRE XAVIER RAMIREZ whose telephone number is (571)272-2715. The examiner can normally be reached Monday - Friday 8:30 AM to 6:00 PM.
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/ALEXANDRE X RAMIREZ/Examiner, Art Unit 2812
/William B Partridge/Supervisory Patent Examiner, Art Unit 2812