Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This action is responsive to application No. 18205678 filed on 06/05/203.
Information Disclosure Statement
Acknowledgment is made of Applicant’s Information Disclosure Statement (IDS) form PTO-1449. These IDS has been considered.
Election/Restrictions
Applicant’s election without traverse of claims 16-18, 20 in the reply filed on 10/21/2025 is acknowledged.
Claims 21-36 have been added.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the limitations of dependent claim 32 “further comprising forming a source region on the first well region, wherein the source region and the first pick up region are butted against each other” along with the limitations of independent claim 28 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Allowable subject matter
Claims 17 (pending resolution of 112(b) issue), 27, 32-33 (pending resolution of drawing objection), 35-36 are objected to as being dependent upon a rejected base claim (independent claims 16 & 21 & 28), but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reasons for allowance: The closest prior art known to the Examiner is listed on the PTO 892 forms of record.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Liu et al. (US 2012023/0380136).
With respect to dependent claim 17, the cited prior art does not anticipate or make obvious, inter alia, the step of: “wherein the substrate comprises a first well region of a first conductivity type and a second well region of a second conductivity type opposite the first conductivity type, and the first opening is formed in the first and second well regions”.
With respect to dependent claim 27, the cited prior art does not anticipate or make obvious, inter alia, the step of: “further comprising performing a second planarization process after depositing the dielectric material, wherein a top surface of the oxide layer and a top surface of the dielectric material are coplanar”.
With respect to dependent claims 32-33, the cited prior art does not anticipate or make obvious, inter alia, the step of: “further comprising forming a source region on the first well region, wherein the source region and the first pick up region are butted against each other”.
With respect to dependent claims 35-36, the cited prior art does not anticipate or make obvious, inter alia, the step of: “wherein the forming of the isolation structure comprises: wherein the forming of the isolation structure comprises: forming a first opening; depositing a dielectric layer in the first opening; depositing a conductive material on the dielectric layer to fill the first opening; removing a portion of the conductive material to form a second opening; and depositing a dielectric material in the second opening”.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(B) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 16 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Claim 16 recites the limitation “patterning the conductive material to form a second opening separating two conductive layers”. The metes and bounds of the claimed limitation can not be determined for the following reasons: It is unclear what the limitation “two conductive layers” is referring to as this limitation has not been defined.
For the purpose of the examination, the examiner interprets the limitation to mean segmenting the conductive material into two separate conductive layers.
Claims 17-18, 20 are also rejected under 112(b) as they depend on base claim 16.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 16, 18, 20-26 are rejected under 35 U.S.C. 103 as being unpatentable over Liu et al. (US 2023/0380136) in view of Wang et al. (CN 217239434 U).
Regarding Independent claim 16, Liu et al. teach a method comprising:
forming a first opening (Fig. 5E’, element 506, paragraph 0091) in a substrate (Fig. 5E’, element 501, paragraph 0086);
forming an oxide layer (Fig. 5G’, element 514, paragraph 0094) in the first opening;
depositing a conductive material (Fig. 5G’, element 515, paragraph 0095) on the dielectric layer to fill the first opening;
patterning the conductive material to form a second opening (Fig. 5H’, paragraph 0096, opening between lower portions of 515) separating two conductive layers; and
depositing a dielectric material (Fig. 5I’, element 516, paragraph 0097) in the second opening.
Liu et al. do not explicitly disclose depositing a dielectric layer on the oxide layer in the first opening.
Wang et al. teach a method comprising depositing a dielectric layer (Fig. 2M, element 8) on the oxide layer (Fig. 2M, element 7, specification discloses “In one embodiment, pad 7 comprises oxide, such as silicon oxide”) in the first opening (Fig. 2I, element 51).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to modify the teachings of Liu et al. according to the teachings of Wang et al. with the motivation to provide additional isolation.
Regarding claim 18, Liu et al. teach wherein the patterning the conductive material comprises removing a center portion of the conductive material (Fig. 6H’ discloses bottom center portion).
Regarding claim 20, Liu et al. teach wherein the dielectric material is formed by atomic layer deposition (paragraph 0086).
Regarding Independent claim 21, Liu et al. teach a method comprising:
forming a first opening (Fig. 5E’, element 506, paragraph 0091) in a substrate (Fig. 5E’, element 501, paragraph 0086);
forming an oxide layer (Fig. 5G’, element 514, paragraph 0094) in the first opening;
depositing a conductive material (Fig. 5G’, element 515, paragraph 0095) on the dielectric layer to fill the first opening;
removing a side portion of the conductive material to form a second opening (Fig. 5H’, paragraph 0096, opening between lower portions of 515),
wherein the dielectric layer and a remaining portion of the conductive material are exposed in the second opening (Fig. 5H’); and
depositing a dielectric material (Fig. 5I’, element 516, paragraph 0097) in the second opening.
Liu et al. do not explicitly disclose depositing a dielectric layer on the oxide layer in the first opening.
Wang et al. teach a method comprising depositing a dielectric layer (Fig. 2M, element 8) on the oxide layer (Fig. 2M, element 7, specification discloses “In one embodiment, pad 7 comprises oxide, such as silicon oxide”) in the first opening (Fig. 2I, element 51).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to modify the teachings of Liu et al. according to the teachings of Wang et al. with the motivation to provide additional isolation.
Regarding claim 22, Liu et al. teach wherein the oxide layer is formed by an oxidation process (paragraph 0094).
Regarding claim 23, Liu et al. teach wherein the oxide layer is formed on the substrate (Fig. 5G’).
Regarding claim 24, Liu et al. modified by Wang et al. teach wherein the dielectric layer is deposited by an atomic layer deposition process (paragraph 0093 of Liu et al. discloses the capability of forming a dielectric layer by an ALD process).
Regarding claim 25, Liu et al. modified by Wang et al. teach wherein the dielectric layer is deposited over the substrate (Fig. 2M of Wang).
Regarding claim 26, Liu et al. modified by Wang et al. teach further comprising performing a first planarization process after depositing the conductive material, wherein a top surface of the dielectric layer and a top surface of the conductive material are coplanar (Fig. 2M of Wang discloses top surface of dielectric layer 8 and conductive layer 61 coplanar after planarization).
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 28-31, 34 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Parris et al. (US 2016/0099349).
Regarding independent claim 28, Parris et al. teach a method comprising forming a guard structure on opposite sides of a high-voltage metal-oxide- semiconductor (HVMOS) transistor (paragraph 0025), comprising:
forming a deep well (Fig. 1, element 24, paragraph 0020) region in a substrate (Fig. 1, element 22, paragraph 0020), wherein the deep well region is a first conductivity type (Fig. 1, p type);
forming a first well region (Fig. 1, right element 36, paragraph 0024) on a first side of the deep well region;
forming a first pick up region (Fig. 1, element 38, paragraph 0024) on the first well region;
forming a second well region (Fig. 1, left element 36) on a second side of the deep well region opposite the first side; and
forming a second pick up region (Fig. 1, element 38) on the second well region; and
forming a doped region (Fig. 1, element 58, paragraph 0027) on the deep well region, wherein the doped region is a second conductivity type (Fig. 1, n type) opposite the first conductivity type.
Regarding claim 29, Parris et al. teach wherein the first conductivity type is p-type, and the second conductivity type is n-type (Fig. 1).
Regarding claim 30, Parris et al. teach wherein the first and second well regions interface the doped region (Fig. 1).
Regarding claim 31, Parris et al. teach wherein the first and second well regions are p-type well regions (Fig. 1).
Regarding claim 34, Parris et al. teach further comprising forming an isolation structure (Fig. 1, element 50, paragraph 0027) adjacent the first pick up region.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAHED AHMED whose telephone number is (571)272-3477. The examiner can normally be reached M-F 9-5.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven Gauthier can be reached on 571-270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/SHAHED AHMED/
Primary Examiner, Art Unit 2813