Attorney’s Docket Number: 2206005US
Filing Date: 06/06/2023
Claimed Priority Date: 06/07/2020 (TW 111121072)
Applicant: Yu et al
Examiner: Aneesa Baig
DETAILED ACTION
This Office action responds to the Amendment filed on 02/13/2026.
Remarks
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Acknowledgment
The Amendment filed on 02/13/2026, responding to the Office action mailed on 10/20/2025, has been entered. The present Office action is made with all the suggested amendments being fully considered. Applicant amended claims 1 and 3, and cancelled claims 2 and 4.
Response to Amendment
Applicant amendments to the Claims have overcome the respective claim rejections under 35 U.S.C. 112, as previously formulated in the Non-Final Office action mailed on 10/20/2025. The amendments to claim 1 and 3 as understood by the examiner do not overcome the prior rejections under 35 U.S.C. 103, as they introduce new matter as described under 35 U.S.C. 112. Accordingly, the previous rejections are relevant and are repeated below, with additional rejections.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
Claims 1 and 3 are rejected under 35 U.S.C. 112(a) as failing to comply with the written description requirement. The claims contain subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, at the time the application was filed, had possession of the claimed invention.
Claim 1 requires in part “wherein a thickness of the gold (Au) layer in the bump is 0.005m<=(Au) layer< 0.05 um and the rest of the thickness of the bump is a thickness of the nickel (Ni) layer”
While the disclosure recites in Fig 7 and page 9 that the thickness of the gold (Au) layer in the bump may be 0.005-0.2 um, it is void of any mention or explanation of the thickness of the gold bump being 0.005m<=(Au) layer< 0.05 um, specifically, the upper limit of 0.05 is not mentioned and neither is the criticality of the upper limit to the improved function of the bump. Given the thickness of the gold layer is important for allegedly improving the structural strength while reducing manufacturing costs, the claims are deemed to contain subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor, at the time the application was filed, had possession of the claimed invention.
Since there is no support for the upper limit in the disclosure, the examiner will understand thickness of the gold layer to be between 0.005-0.2 um, as best understood by the examiner in view of the original disclosure, until further clarifications are provided by the applicant.
Claim 3 requires in part “wherein a thickness of the gold (Au) layer 33 combine a thickness of the palladium (Pd) layer 34 in the bump is 0.005 um ≤Au layer and Pd layer<0.05 um and the rest of the thickness of the bump is a thickness of the nickel (Ni) layer.”
While the disclosure recites in Fig 8 and page 5 that a thickness of the gold (Au) layer and a thickness of the palladium (Pd) layer in the bump are respectively 0.005-0.2 am and 0.005~0.3 am while the rest of the thickness of the bump is a thickness of the nickel (Ni) layer, it is void of any mention or explanation of the thickness of the gold (Au) layer 33 combine a thickness of the palladium (Pd) layer 34 in the bump is <0.05 um. Given the thickness of the gold and Pd layer is important for allegedly improving the structural strength while reducing manufacturing costs, the claims are deemed to contain subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor, at the time the application was filed, had possession of the claimed invention.
Since there is no support for the upper limit in the disclosure, the examiner will understand a thickness of the gold (Au) layer and a thickness of the palladium (Pd) layer in the bump to be respectively 0.005-0.2 am and 0.005~0.3 am, as best understood by the examiner in view of the original disclosure, until further clarifications are provided by the applicant.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over Tonegawa (US 20170092605 A1, Hereinafter Tonegawa).
Regarding Claim 1, Tonegawa (e.g., Figure1, 2, 24, 26, [0047]-[0058][0133]) shows most aspects of the instant invention, including,
A bump of a chip package (e.g., OPM1 and OPM2) with higher bearing capacity in wire bonding (bonding wire BW) comprising the chip package having a chip (semiconductor substrate S, [0133], at least one dielectric layer, (PRO2 protective film) and at least one bump (Fig 26);
wherein the chip includes at least one internal circuit (Fig 24 shows circuiting metal layers) and a first surface which is provided with at least one die pad (interconnection M1)and at least one protective layer (PRO1, [0090]);
wherein the chip is formed by cutting of a wafer ([0133]);
wherein the first surface of the chip is covered by each said dielectric layer correspondingly while each said dielectric layer is provided at least one opening which is corresponding to the die pad of the chip PRO1 has an opening where die pad PD is placed);
wherein the bump is mounted in the opening of the at least one dielectric layer, facing upwards and exposed (e.g., Fig 26);
the bump is a stacked layered member electrically connected with a top surface of the die pad of the chip (e.g., OPM1 and OPM2);
wherein while performing the wire bonding, a first bonding point and a second bonding point are respectively formed on the bump and an electronic component by a bonding wire for electrical connection between the chip package and the electronic component ([0003]The pad region is coupled to an external terminal via wire bonding)
wherein the bump is a metal stacked member with a thickness and including a nickel (Ni) layer and a gold (Au) layer stacked from the top surface of the die pad in turn (OPM1 is Ni, while OPM2 is Gold [0051]);
wherein the thickness of the bump is ([0081]-[0082]The thickness of OPM1 is about 2.5um, and the thickness of OPM2 is 0.05 um);
thus structural strength of the bump is enhanced and able to bear a positive pressure generated in the wire bonding or formation of the first bonding point;
thereby the internal circuit of the chip will not be damaged by the positive pressure and being allowed to pass through an area under the die pad, or arranged under the die pad.
Tonegawa shows most aspects of the invention, and while the thickness of the gold layer is between 0.005-0.2um. However, Tonegawa is silent about the thickness of the bump being between 4.5 to 20um.
Additionally, with regards to the particular dimensions claimed, it is also noted that the specification fails to provide teachings about the criticality of having the thickness of the bump being between 4.5 to 20um and the courts have held that differences in (widths) will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such widths are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation”. In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
Since the applicant has not established the criticality (see next paragraph below) of the claimed the thickness of the bump being between 4.5 to 20um and since Tonegawa teaches an arrangement of (widths) known in the art, it would have been obvious to one of ordinary skill in the art to use the thickness of the bump being between 4.5 to 20um in the device of Tonegawa.
CRITICALITY: The specification contains no disclosure of either the critical nature of the claimed dimensions ratios or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions ratios or upon another variable recited in a claim, the applicant must show that the chosen ratios are critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1939 (Fed. Cir. 1990).
Additionally, and with respect to claim 1, note that a limitation in a claim with respect to the manner in which a claimed device is intended to be used does not differentiate the claimed device from a prior-art device if the prior-art device teaches all structural limitations in the claims and the functional limitations are found to be inherent in the prior-art device. In re Schreiber, 128 F.3d 1473, 1477-78, 44 USPQ2d 1429, 1431-32 (Fed. Cir. 1997); Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987). See Hewlett-Packard Co. v. Bausch & Lomb Inc. and the related case law cited therein which makes it clear that it is the final product per se which must be determined in a device claim, and not the patentability of its functions (909 F.2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990)).
As stated in Best, where the claimed and prior art products are identical or substantially identical in structure or composition, a prima facie case of either anticipation or obviousness has been established. In re Best, 562 F.2d 1252, 1255, 195 USPQ 430, 433 (CCPA 1977).
Note that the applicant has burden of proof once the examiner establishes a sound basis for believing that the products of the applicant and the prior art are the same. See In re Spada, 911 F.2d 705, 709, 15 USPQ2d 1655, 1658 (Fed. Cir. 1990).
In the instant case, Tonegawa teaches all structural aspects of the bump package according to the claimed invention. Furthermore, the structure of Tonegawa is capable of performing the claimed function due to its thickness and composition of Au plating over Ni plating.
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Tonegawa (20180138136 A1, Hereinafter Tonegawa-2).
Regarding Claim 3, Tonegawa-2 (e.g., Figure 42-44, Fig 5 [0251]-[0262] [0003][0069]-[0080]) shows most aspects of the instant invention, including,
A bump of a chip package (package PKG, Fig 5) with higher bearing capacity in wire bonding comprising the chip package having a chip ((semiconductor chip) CP and CP1[0069]), at least one dielectric layer (insulating film PA [0136]), and at least one bump (PDG);
wherein the chip includes at least one internal circuit (TGL [0124]) and a first surface which is provided with at least one die pad ( conductive film CD) and at least one protective layer (IL); wherein the chip is formed by cutting of a wafer (wafer SB, is cut to form chips [0176]);
wherein the first surface of the chip is covered by each said dielectric layer correspondingly while each said dielectric layer is provided at least one opening which is corresponding to the die pad of the chip (PDG is provided in PA);
wherein the bump is mounted in the opening of each said dielectric layer (PDG is provided in PA); facing upwards and exposed; the bump is a stacked layered member electrically connected with a top surface of the die pad of the chip (PDG is connected to CD);
wherein while performing the wire bonding, a first bonding point and a second bonding point are respectively formed on the bump and an electronic component by a bonding wire for electrical connection between the chip package and the electronic component (e.g., Fig 5 shows bonding with wire WA and external terminal LD [0070]);
wherein the bump is a metal 14 stacked member with a thickness and including a nickel (Ni) layer (PL1), a palladium (Pd) layer (PL3), and a gold (Au) layer (PL2) stacked upward from the top surface of the die pad in turn;
thus structural strength of the bump is enhanced and able to stand a positive pressure generated in the wire bonding or formation of the first bonding point (See [0262] the formation of Pd to reduce stress on the package and reduce cracks);
thereby the internal circuit of the chip will not be damaged by the positive pressure and being allowed to pass through an area under the die pad, or arranged under the die pad (See [0262]).
Tonegawa-2 shows most aspects of the invention, and while the thickness of the gold layer is substantially 0.03 to 0.1 μm and the nickel layer is preferably less than 3um. Tonegawa-2 is silent about the overall thickness of the bump being between 4.5 to 20um.
Additionally, with regards to the particular dimensions claimed, it is also noted that the specification fails to provide teachings about the criticality of having the thickness of the bump being between 4.5 to 20um and the courts have held that differences in (widths) will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such widths are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation”. In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
Since the applicant has not established the criticality (see next paragraph below) of the claimed the thickness of the bump being between 4.5 to 20um and since Tonegawa-2 teaches an arrangement of (widths) known in the art and it teaches that adjusting the thickness of the Ni and Pd, Au layers ( e.g., Fig 40-42) can lead to reduced stress on the Ni layer. Therefore, it would have been obvious to one of ordinary skill in the art to use the thickness of the bump being between 4.5 to 20um in the device of Tonegawa-2.
CRITICALITY: The specification contains no disclosure of either the critical nature of the claimed dimensions ratios or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions ratios or upon another variable recited in a claim, the applicant must show that the chosen ratios are critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1939 (Fed. Cir. 1990).
Additionally, and with respect to claim 1, note that a limitation in a claim with respect to the manner in which a claimed device is intended to be used does not differentiate the claimed device from a prior-art device if the prior-art device teaches all structural limitations in the claims and the functional limitations are found to be inherent in the prior-art device. In re Schreiber, 128 F.3d 1473, 1477-78, 44 USPQ2d 1429, 1431-32 (Fed. Cir. 1997); Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987). See Hewlett-Packard Co. v. Bausch & Lomb Inc. and the related case law cited therein which makes it clear that it is the final product per se which must be determined in a device claim, and not the patentability of its functions (909 F.2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990)).
As stated in Best, where the claimed and prior art products are identical or substantially identical in structure or composition, a prima facie case of either anticipation or obviousness has been established. In re Best, 562 F.2d 1252, 1255, 195 USPQ 430, 433 (CCPA 1977).
Note that the applicant has burden of proof once the examiner establishes a sound basis for believing that the products of the applicant and the prior art are the same. See In re Spada, 911 F.2d 705, 709, 15 USPQ2d 1655, 1658 (Fed. Cir. 1990).
In the instant case, Tonegawa-2 teaches all structural aspects of the bump package according to the claimed invention. Furthermore, the structure of Tonegawa-2 is capable of performing the claimed function due to its thickness and composition of Au and Pd plating over Ni layer.
Response to Arguments
Applicant’s arguments with respect to the claims filed on 02/13/2026 have been considered but are not persuasive.
Applicant has failed to show support for the amendments and the criticality of the ranges in the most recent filing of claims. As MPEP 716.02 (d) states “To establish unexpected results over a claimed range, applicants should compare a sufficient number of tests both inside and outside the claimed range to show the criticality of the claimed range. In re Hill, 284 F.2d 955, 128 USPQ 197 (CCPA 1960).
Applicant states regarding Claim 1, “Such a difference is not obvious. The inventor(s) of the present application discovered that by controlling the Gold (Au) layer thickness to be less than 0.05 um, or even as low as 0.005 um, the usage of precious metal (Gold) can be substantially reduced-thereby significantly lowering manufacturing costs-while maintaining the reliability of wire bonding.”
The statement provided above does not provide empirical data or proof of unexpected results over a claimed range, and the specification is void of the limitation of Au layer to be less than 0.5 um, as mentioned above.
Applicant states regarding Claim 3, “The distribution ratio mentioned above can reduce the amount of the gold (Au) layer 33 having higher cost and used in the bump 30 while without losing a certain amount of structural strength. The above design is beneficial to cost reduction at the manufacturing end." (emphasis added). The statement of “certain amount” and “beneficial” does not provide proof or empirical data of unexpected results over a claimed range of Au and Pd layers, as required by MPEP 716.02 (d). Hence the examiner has construed the claims as per the original disclosure.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Specifically, JP 2003068738, JP2005033131, JP2008028069 are considered relevant to the claims as they show a similar bump of a chip package with the claimed ranges of Gold, Pd, and nickel.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action.
Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANEESA RIAZ BAIG whose telephone number is (571)272-0249. The examiner can normally be reached Monday-Friday 8am-5pm EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Wael Fahmy can be reached on 571-272-1705. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/ANEESA RIAZ BAIG/Examiner, Art Unit 2814
/WAEL M FAHMY/Supervisory Patent Examiner, Art Unit 2814
Prosecution Insights