Prosecution Insights
Last updated: August 15, 2026

Walton Advanced Engineering Inc.

8 pending office actions • 7 art units • 8 examiners • 0 of 8 (0%) have an AI response strategy ready • 9 patents granted in the last 365 days

Portfolio Summary

8
Total Pending OAs
4
Non-Final OAs
2
Final Rejections
2
Advisory / Quayle

Response Deadline Pressure

Based on the USPTO statutory response window for each pending office action. 5 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.

3
Overdue
0
Due this week
0
Due this month
0
Due in next 60 days
2
Due later

Deadline Fire Line

Every pending office action with a known statutory deadline, placed on a days-until-due axis. Dots left of Today are overdue; the further right, the more runway. Cases that share a deadline window stack vertically. 5 of the docket's apps have a known mailing date.

-30dToday30d60d90d120d
Overdue (3)Due later (2)

Case Difficulty Mix

Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.

6
Hard (75%)
2
Medium (25%)
0
Easy (0%)
0
Unknown (0%)

Rejection Statute Mix

BucketCases
§103 only2 (25%)
Multi-statute (no §101)6 (75%)

Industry Mix

How the docket's pending cases split across USPTO tech-center bands.

0
Life Sciences
0% of docket
1
Information Tech
12% of docket
0
Communications
0% of docket
7
Semiconductors
88% of docket
0
Mechanical / Eng
0% of docket
0
Business / Other
0% of docket

Time-on-OA Estimate

Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.

80 h
Manual time on pending OAs
16 h
Time saved (low, 20%)
28 h
Time saved (mid, 35%)
0.7 wks
FTE-weeks freed (mid)

Top Examiners on this docket

ExaminerApps on this docketAllow rateInterview lift
MAHMUD, GOLAM 1 60.5% +29.0%
MANN, WILLIAM ROBERT 1
LEE, PETE T 1 75.2% +10.4%
GREEN, TELLY D 1 81.9% +3.9%
PHAN, STEVE QUOC 1
CHEN, YU 1 68.0% +29.7%
STARK, JARRETT J 1 70.5% +11.3%
BAIG, ANEESA RIAZ 1 92.7% +8.8%

Hard Cases (6)

Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 6 ordered by deadline are shown.

App #TitleExaminerDue in
18226782 CHIP PACKAGE WITH ELECTROMAGNETIC INTERFERENCE SHIELDING LAYER AND METHOD OF MANUFACTURING THE SAME CHEN, YU 25d overdue
18207658 CHIP PACKAGE STARK, JARRETT J 1d overdue
18206591 BUMP OF CHIP PACKAGE WITH HIGHER BEARING CAPACITY IN WIRE BONDING BAIG, ANEESA RIAZ 61d
18419573 EMBEDDED DUAL IN-LINE MEMORY MODULE LEE, PETE T 71d
18647133 Metaverse Implementation Method MAHMUD, GOLAM
18504172 CHIP PACKAGE WITH METAL SHIELDING LAYER AND METHOD OF MANUFACTURING THE SAME GREEN, TELLY D

Interview Candidates (4)

Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 4 ordered by deadline are shown.

App #TitleExaminerDue in
18226782 CHIP PACKAGE WITH ELECTROMAGNETIC INTERFERENCE SHIELDING LAYER AND METHOD OF MANUFACTURING THE SAME CHEN, YU 25d overdue
18207658 CHIP PACKAGE STARK, JARRETT J 1d overdue
18419573 EMBEDDED DUAL IN-LINE MEMORY MODULE LEE, PETE T 71d
18647133 Metaverse Implementation Method MAHMUD, GOLAM

Top Art Units

Art UnitApps
2898 2
2458 1
2897 1
2824 1
2817 1
2896 1
2814 1

Pending Office Actions

App #TitleExaminerArt UnitStatutesStatusDue inAIFiled
18647133 Metaverse Implementation Method MAHMUD, GOLAM 2458 §103§112 Non-Final OA Pending Apr 26, 2024
18419576 CHIP PACKAGE UNIT WITH OUTER PROTECTIVE LAYER AND METHOD OF MANUFACTUIRNG THE SAME MANN, WILLIAM ROBERT 2897 §103 Non-Final OA Pending Jan 23, 2024
18419573 EMBEDDED DUAL IN-LINE MEMORY MODULE LEE, PETE T 2824 §102§103 Non-Final OA 71d Pending Jan 23, 2024
18504172 CHIP PACKAGE WITH METAL SHIELDING LAYER AND METHOD OF MANUFACTURING THE SAME GREEN, TELLY D 2898 §102§112 Final Rejection Pending Nov 08, 2023
18368217 ANTI-ELECTROMAGNETIC INTERFERENCE WAFER STRUCTURE PHAN, STEVE QUOC 2817 §103 Non-Final OA 46d overdue Pending Sep 14, 2023
18226782 CHIP PACKAGE WITH ELECTROMAGNETIC INTERFERENCE SHIELDING LAYER AND METHOD OF MANUFACTURING THE SAME CHEN, YU 2896 §102§103 Final Rejection 25d overdue Pending Jul 27, 2023
18207658 CHIP PACKAGE STARK, JARRETT J 2898 §102§103§112 Non-Final OA 1d overdue Pending Jun 08, 2023
18206591 BUMP OF CHIP PACKAGE WITH HIGHER BEARING CAPACITY IN WIRE BONDING BAIG, ANEESA RIAZ 2814 §103§112 Non-Final OA 61d Pending Jun 06, 2023

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