Prosecution Insights
Prosecution Insights
Technology areas: Networking & Security • Semiconductors, Circuits & Optics
6 pending office actions • 6 art units • 6 examiners • 0 of 6 (0%) have an AI response strategy ready • 9 patents granted in the last 365 days
Walton Advanced Engineering Inc. currently manages a portfolio featuring 6 pending office actions. These matters are situated within the Semiconductors, Circuits & Optics technology area, reflecting the company's primary technical focus for its current applications. The prosecution landscape for these filings is distributed, as the 6 pending office actions are spread across 6 distinct examiners.
This distribution is further reflected in the organizational structure of the patent office, with the workload spread across 6 distinct art units. MAHMUD, GOLAM is identified as the busiest examiner for the portfolio, though they are currently responsible for only 1 pending office action. This indicates that every pending matter is being handled by a different examiner in a different art unit.
For a practitioner, this data suggests that Walton Advanced Engineering Inc. must navigate 6 unique examination styles simultaneously. There is no concentration of cases under a single examiner or art unit that would allow for a unified prosecution strategy across multiple applications. Each of the 6 distinct art units may have different internal standards that the company must address to successfully advance its 6 pending office actions.
Based on the USPTO statutory response window for each pending office action. 4 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.
Every pending office action with a known statutory deadline, placed on a days-until-due axis. Dots left of Today are overdue; the further right, the more runway. Cases that share a deadline window stack vertically. 4 of the docket's apps have a known mailing date.
Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.
| Bucket | Cases |
|---|---|
| §103 only | 3 (50%) |
| §112 only | 1 (17%) |
| Multi-statute (no §101) | 2 (33%) |
How the docket's pending cases split across USPTO tech-center bands.
Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.
| Examiner | Apps on this docket | Allow rate | Interview lift |
|---|---|---|---|
| MAHMUD, GOLAM | 1 | 61.2% | +29.8% |
| MANN, WILLIAM ROBERT | 1 | — | — |
| SANDVIK, BENJAMIN P | 1 | 76.9% | +6.2% |
| SURVILLO, OLEG | 1 | 72.5% | +29.2% |
| PHAN, STEVE QUOC | 1 | — | — |
| STARK, JARRETT J | 1 | 70.5% | +11.5% |
Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 2 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18207658 | CHIP PACKAGE | STARK, JARRETT J | 1d overdue |
| 18647133 | Metaverse Implementation Method | MAHMUD, GOLAM | — |
Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 3 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18207658 | CHIP PACKAGE | STARK, JARRETT J | 1d overdue |
| 18368065 | METHOD FOR HIGH-SECURITY NETWORK MESSAGE TRANSMISSION | SURVILLO, OLEG | 14d |
| 18647133 | Metaverse Implementation Method | MAHMUD, GOLAM | — |
| Art Unit | Apps |
|---|---|
| 2458 | 1 |
| 2897 | 1 |
| 2812 | 1 |
| 2457 | 1 |
| 2817 | 1 |
| 2898 | 1 |
| App # | Title | Examiner | Art Unit | Statutes | Status | Due in | AI | Filed |
|---|---|---|---|---|---|---|---|---|
| 18647133 | Metaverse Implementation Method | MAHMUD, GOLAM | 2458 | §103§112 | Non-Final OA | — | Pending | Apr 26, 2024 |
| 18419576 | CHIP PACKAGE UNIT WITH OUTER PROTECTIVE LAYER AND METHOD OF MANUFACTUIRNG THE SAME | MANN, WILLIAM ROBERT | 2897 | §103 | Non-Final OA | — | Pending | Jan 23, 2024 |
| 18393633 | CHIP PACKAGE WITH HEAT DISSIPATION AND ELECTROMAGNETIC PROTECTION | SANDVIK, BENJAMIN P | 2812 | §103 | Non-Final OA | 34d | Pending | Dec 21, 2023 |
| 18368065 | METHOD FOR HIGH-SECURITY NETWORK MESSAGE TRANSMISSION | SURVILLO, OLEG | 2457 | §112 | Non-Final OA | 14d | Pending | Sep 14, 2023 |
| 18368217 | ANTI-ELECTROMAGNETIC INTERFERENCE WAFER STRUCTURE | PHAN, STEVE QUOC | 2817 | §103 | Non-Final OA | 46d overdue | Pending | Sep 14, 2023 |
| 18207658 | CHIP PACKAGE | STARK, JARRETT J | 2898 | §102§103§112 | Final Rejection | 1d overdue | Pending | Jun 08, 2023 |
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