DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The Office acknowledges receipt on 18 March 2026 of Applicants’ amendments in which claims 1 and 5 are amended. The Office withdraws the claim objection identified in the Office Communication dated 23 December 2025 in view of the amendments.
Response to Arguments
Applicants’ arguments with respect to claim(s) 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 2, 5, 7, and 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hsieh (US20220367636A1) in view of Lichtenwalner et al. (US20220052152A1) and Okumura (US20220238655A1).
Regarding claim 1, Hsieh teaches in Fig. 6 a semiconductor device, comprising:
a substrate (601-609), having a first surface (upper surface) and a second surface (lower surface) {[0037]; Hsieh’s features having the same one’s and ten’s digits in the reference number are the same, though the hundred’s digit may differ for each of different drawings};
a trench (603), disposed in the substrate (601-609) {[0037]};
a gate electrode (605), disposed in the trench (603) {[0037]};
a source contact region (611), disposed on the first surface (upper surface) of the substrate (601-609) {[0037]};
a drain contact region (620), disposed on the second surface (lower surface) of the substrate (601-609) {[0037]};
a region (615), having a first conductivity type (p-type) and disposed directly below the trench (603), wherein a width of the region (615) is smaller than a width of the trench (603) in a first direction (horizontal) {[0037]}; and
a current spreading layer (627), having a second conductivity type (n-type), disposed in the substrate (601-609) and surrounding a bottom of the trench (603) and the region (615) {[0043]}.
Hsieh does not teach the region is heavily doped.
Hsieh teaches the region (615) is a shield region. In an analogous art, Lichtenwalner teaches in Fig. 8C and paragraph [0080] a heavily-doped shield region (840) having a first conductivity type (p-type). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Hsieh’s semiconductor device based on the teachings of Lichtenwalner – such that the region is heavily doped – for protecting the corners of the gate insulating layer … from high electric fields during reverse blocking operation. Lichtenwalner [0042]. Moreover, all the claimed elements (e.g., shield region, heavily p-type doping) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Lichtenwalner) with no change in their respective functions, and the combination yielding nothing more than predictable results (p+ shield region) to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known material based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Hsieh as modified by Lichtenwalner does not teach the current spreading layer has a gradual doping concentration that is gradually increased from the heavily doped region to an outer region of the current spreading layer away from the trench along the first direction.
In an analogous art, Okumura teaches in Fig. 3A and paragraph [0051] a current spreading layer (3, 9) has a gradual doping concentration that is gradually increased from a heavily doped region (4b) to an outer region of the current spreading layer (3, 9) away from a trench (10) along a first direction (y-direction). More specifically, a first current spreading layer (3) closest to the trench (10) has a lower concentration of n-type doping than does a second current spreading layer (9), which is disposed on an opposite side of the first current spreading layer (3) with respect to the heavily doped region (4b) along the y-axis. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Hsieh’s semiconductor device as modified by Lichtenwalner based on the teachings of Okumura – such that the current spreading layer has a gradual doping concentration that is gradually increased from the heavily doped region to an outer region of the current spreading layer away from the trench along the first direction – because by selectively increasing the impurity concentration of the n-type region: (1) avalanche breakdown can be generated at a low electric field strength and (2) it is possible to prevent the dielectric breakdown of the gate insulating film at the bottom of the trench. Okumura [0051]. Moreover, all the claimed elements (e.g., current spreading layer, doping concentration, shield region) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Okumura) with no change in their respective functions, and the combination yielding nothing more than predictable results (current spreading layer) to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Regarding claim 2, Hsieh as modified by Lichtenwalner and Okumura teaches the semiconductor device of claim 1, and Hsieh further teaches wherein the current spreading layer (627) comprises an inner region in a direct contact with the heavily doped region (modified 615) and bottom corners of the trench (603) {Fig. 6}.
Hsieh does not teach the inner region has a lowest doping concentration in the current spreading layer.
Okumura teaches in Fig. 3A and paragraph [0051] an inner region (3) of a current spreading layer (3, 9) closest to a trench (10) has a lowest doping concentration in the current spreading layer (3, 9). The motivation for this modification is identified with respect to base claim 1.
Regarding claim 5, Hsieh as modified by Lichtenwalner and Okumura teaches the semiconductor device of claim 2, and Hsieh further teaches further comprising a gate dielectric layer (606) conformally disposed on sidewalls and a bottom surface of the trench (603), and surrounding the gate electrode (605), wherein the gate dielectric layer (606) is located between the gate electrode (605) and the inner region of the current spreading layer (627) {[0037]}.
Regarding claim 7, Hsieh as modified by Lichtenwalner and Okumura teaches the semiconductor device of claim 1, and Hsieh further teaches further comprising:
a well region (610), having the first conductivity type (p-type), disposed in the substrate (601-609) and abutting a side of the trench (603) {[0043]};
a bulk contact region (614), having the first conductivity type (p-type), disposed in the well region (610) and abutting the source contact region (611) {[0037]}; and
a source electrode (612), electrically coupled to both the source contact region (611) and the bulk contact region (614) {[0037, 0043]}.
Regarding claim 8, Hsieh as modified by Lichtenwalner and Okumura teaches the semiconductor device of claim 1, and Hsieh further teaches further comprising:
another trench (603 of rightmost 201 in Fig. 2), disposed in the substrate (601-609) {[0037]}; and
another gate electrode (605 of rightmost 201 in Fig. 2), disposed in the another trench (603 of rightmost 201 in Fig. 2) {[0037]},
wherein a pitch is between the trench (603 of leftmost 201 in Fig. 2) and the another trench (603 of rightmost 201 in Fig. 2), and the width of the heavily doped region is decreased as the pitch is decreased {see Examiner’s Note, below}.
Examiner’s Note: The recitation whereby “the width of the heavily doped region is decreased as the pitch is decreased,” is a product-by-process feature defining a scaling operation (i.e., maintaining a relative scaling between the dimensions of two features when changing a size of one of the features or the entire product for subsequent manufacture). Stated another way for increased understanding, the pitch of the trenches within the product of the semiconductor device cannot be changed (e.g., decreased) after its manufacture, and claim 8 is directed to the product of the semiconductor device. [E]ven though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. MPEP §2113(I). Accordingly, the recited product-by-process feature does not limit the scope of the claimed product.
Claim(s) 3, 4, and 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hsieh in view of Lichtenwalner and Okumura as applied to claim 2 (for claims 3 and 4) and claim 1 (for claim 6) above, and further in view of Meiser et al. (US20190296110A1).
Regarding claim 3, Hsieh as modified by Lichtenwalner and Okumura teaches the semiconductor device of claim 2, and Hsieh further teaches wherein the substrate (601-609) includes an epitaxial layer (602) having the second conductivity type (n-type), located between the drain contact region (620) and the current spreading layer (627) {[0043]}.
Hsieh does not teach the lowest doping concentration of the inner region is lower than a doping concentration of the epitaxial layer.
Meiser teaches in Fig. 2B and paragraphs [0061] and [0100] that: (1) a current spread region (132) may have a lightly-doped region (1321) adjacent a trench gate structure (150) and a heavily-doped region (1322) on a side of the lightly-doped region (1321) opposite to a side adjacent the trench gate structure (150) {[0100]} and (2) a mean net dopant concentration in the current spread region (132) may be equal to a mean net dopant concentration in an epitaxial layer (131). Accordingly, Meiser’s lightly-doped region (1321) of the current spread region (132) has a lower doping concentration than a doping concentration of the epitaxial layer (131). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Hsieh’s semiconductor device as modified by Lichtenwalner and Okumura based on the teachings of Meiser – such that the lowest doping concentration of the inner region is lower than a doping concentration of the epitaxial layer – to give[] a further degree of freedom for adjusting a trade-off concerning the portion of the on-state resistance resulting from the connection of the gated channels to the current spread region and the voltage blocking capability. Meiser [0101]. Moreover, all the claimed elements (e.g., current spreading layer, doping concentration, epitaxial layer) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Meiser) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Regarding claim 4, Hsieh as modified by Lichtenwalner, Okumura, and Meiser teaches the semiconductor device of claim 3, but Hsieh does not teach wherein the current spreading layer comprises an outer region having a highest doping concentration in the current spreading layer, and the highest doping concentration of the outer region is higher than the doping concentration of the epitaxial layer.
Okumura teaches in Fig. 3A and paragraph [0051] a current spreading layer (3, 9) comprises an outer region having a highest doping concentration in the current spreading layer (3, 9). The motivation for this modification is identified with respect to base claim 1.
Meiser teaches in Fig. 2B and paragraphs [0061] and [0100] that: (1) a current spread region (132) may have a lightly-doped region (1321) adjacent a trench gate structure (150) and a heavily-doped region (1322) on a side of the lightly-doped region (1321) opposite to a side adjacent the trench gate structure (150) {[0100]} and (2) a mean net dopant concentration in the current spread region (132) may be equal to a mean net dopant concentration in an epitaxial layer (131) {[0061]}. Accordingly, Meiser’s heavily-doped region (1322) of the current spread region (132) has a higher doping concentration than a doping concentration of the epitaxial layer (131). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Hsieh’s semiconductor device as modified by Lichtenwalner and Okumura based on the teachings of Meiser – such that the highest doping concentration of the outer region is higher than the doping concentration of the epitaxial layer – to give[] a further degree of freedom for adjusting a trade-off concerning the portion of the on-state resistance resulting from the connection of the gated channels to the current spread region and the voltage blocking capability. Meiser [0101]. Moreover, all the claimed elements (e.g., current spreading layer, doping concentration, epitaxial layer) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Meiser) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Regarding claim 6, Hsieh as modified by Lichtenwalner and Okumura teaches the semiconductor device of claim 1, but Hsieh does not teach wherein the width of the heavily doped region is smaller than a width of the gate electrode in the first direction.
Meiser teaches in Fig. 2B and paragraph [0100] a width of the heavily doped region (1322) is smaller than a width of the gate electrode (155) in the first direction (horizontal). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Hsieh’s semiconductor device as modified by Lichtenwalner and Okumura based on the teachings of Meiser – such that the width of the heavily doped region is smaller than a width of the gate electrode in the first direction – to give[] a further degree of freedom for adjusting a trade-off concerning the portion of the on-state resistance resulting from the connection of the gated channels to the current spread region and the voltage blocking capability. Meiser [0101]. Moreover, all the claimed elements (e.g., current spreading layer, doping concentration, epitaxial layer) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Meiser) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Examiner’s Note: “The Examiner is authorized to make a finding of relative dimensions that are, as here, clearly depicted in a drawing.” Ex parte Wright, 091818 USPTAB, 2017-001093 (Patent Trial and Appeal Board Decisions, 2018).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/D.W.W./Examiner, Art Unit 2891
/MATTHEW C LANDAU/Supervisory Patent Examiner, Art Unit 2891