DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by SAITO (US 20150084124).
Regarding claim 1, SAITO discloses a semiconductor device, comprising:
a substrate (the substrate 11 including 32, see fig 1-2, para 27), having a first conductivity type (32 is n-type, see fig 2, para 31) and comprising a cell region (the element region 12, see fig 2, para 27) and a termination region (the termination region 14, see fig 2, para 27);
a trench (the outermost trench 24 in region 12, see fig 2, para 33), disposed in the substrate and located in the cell region;
a gate electrode (gate electrode 16 in the outermost trench 24 in region 12, see fig 2, para 33), disposed in the trench;
a well region (the p-type well comprising the portions of 36 and 39 in region 12, see fig 2, para 30), having a second conductivity type (36 and 39 are p-type, see fig 2, para 30), disposed in the substrate and located in the cell region;
a shielding doped region (34a, see fig 2, para 39), having the second conductivity type (34a is p-type, see fig 2, para 39), disposed in the substrate and located directly below the trench (34a is located directly below the outermost trench 24 in region 12, see fig 2);
a buried guard ring (the buried p-type regions 37a and 37b, see fig 2, para 36), having the second conductivity type, disposed in the substrate and located in the termination region (37a and 37b are both in 14, see fig 2), wherein the buried guard ring and the shielding doped region are at the same depth in the substrate (37a, 37b and 34a are at the same depth, see fig 2), and the buried guard ring comprises a plurality of laterally separated ring-shaped doped regions in the termination region (37a and 37b are ring shaped and in 14, see fig 1-2, para 36); and
a junction termination extension structure (the p-type regions including the portions of 36b and 39 in the region 14, as well as the regions 41, see fig 2, para 30 and 28), having the second conductivity type, disposed in the substrate, located directly above the buried guard ring (37a and 37b are both aligned with 39 along vertical axes, see fig 2), and separated from the buried guard ring (37a and 37b are separated from 36 and 39, see fig 2),
wherein the junction termination extension structure comprises:
an inner doped region (the p-type regions including the portions of 36b and 39 in the region 14, see fig 2), located directly above the plurality of laterally separated ring-shaped doped regions in the termination region (36 and 39 are aligned with 37a and 37b along vertical axes in 14, see fig 2) and abutting the well region of the cell region (the portions of 36 and 39 in 14 are in direct lateral contact with the portions of 36 and 39 in 12, see fig 2); and
a plurality of laterally separated outer doped regions (the outer doped regions 41, see fig 2, para 28), laterally separated from the inner doped region and the plurality of laterally separated ring-shaped doped regions (41a-f are all laterally separated from 36, 39, 37a and 37b, see fig 2),
a source electrode (fig 2, 46, para 34), disposed over the cell region of the substrate (46 is at least partially in 12, see fig 2) and extending from above the well region to a region directly above the inner doped region of the junction termination extension structure (46 extends from above the portions of 36 and 39 in region 12 to be directly above the portions of 36 and 39 in region 14, see fig 2);
wherein a plurality of spacing between the plurality of laterally separated ring-shaped doped regions are gradually increased in a direction from the cell region to the termination region (the spacing between the regions 41a-f increases as they are increasingly far from 12, see fig 2, para 41).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 2-5, 7, 10 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over SAITO (US 20150084124) in view of TANAKA (US 20230307535).
Regarding claim 2, SAITO discloses the semiconductor device of claim 1.
SAITO fails to explicitly disclose a device, wherein the inner doped region and the plurality of laterally separated outer doped regions of the junction termination extension structure have the same doping concentration.
TAKANA teaches a device, wherein the inner doped region and the plurality of laterally separated outer doped regions of the junction termination extension structure have the same doping concentration (6a and 6 are all p- doped, see fig 4, para 35).
SAITO and TANAKA are analogous art because they both are directed towards semiconductor transistor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of SAITO with the specific doping concentrations of TANAKA because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of SAITO with the specific doping concentrations of TANAKA in order to increase breakdown voltage (see TANAKA para 17).
Regarding claim 3, SAITO and TAKANA disclose the semiconductor device of claim 2.
SAITO further discloses a device, wherein a vertical projection area of the plurality of laterally separated outer doped regions is outside a vertical projection area of the buried guard ring (the projections of 37a and 37b along the vertical direction do not overlap with the projections of 41a-f along the vertical direction, see fig 2).
Regarding claim 4, SAITO and TAKANA disclose the semiconductor device of claim 2.
SAITO fails to explicitly disclose a device, wherein an outermost edge of the inner doped region is farther away from the cell region than an outermost edge of the buried guard ring.
TAKANA teaches a device, wherein an outermost edge of the inner doped region is farther away from the cell region than an outermost edge of the buried guard ring (the outermost edge of 6a is further out than the outer edge of the inner region 5, see fig 4).
SAITO and TANAKA are analogous art because they both are directed towards semiconductor transistor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of SAITO with the specific doping concentrations of TANAKA because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of SAITO with the specific doping concentrations of TANAKA in order to increase breakdown voltage (see TANAKA para 17).
Regarding claim 5, SAITO discloses the semiconductor device of claim 1.
SAITO fails to explicitly disclose a device, wherein doping concentrations of the plurality of laterally separated ring-shaped doped regions are the same as a doping concentration of the shielding doped region.
TAKANA teaches a device, wherein doping concentrations of the plurality of laterally separated ring-shaped doped regions are the same as a doping concentration of the shielding doped region (4 and 5 can have the same doping concentration, see fig 4, para 36).
SAITO and TANAKA are analogous art because they both are directed towards semiconductor transistor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of SAITO with the specific doping concentrations of TANAKA because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of SAITO with the specific doping concentrations of TANAKA in order to increase breakdown voltage (see TANAKA para 17).
Regarding claim 7, SAITO and TAKANA disclose the semiconductor device of claim 5.
SAITO further discloses a device, wherein the plurality of laterally separated ring-shaped doped regions have the same width (41a-f can be the same size w1, see fig 2, para 40).
Regarding claim 10, SAITO discloses the semiconductor device of claim 1.
SAITO fails to explicitly disclose a device, wherein a doping concentration of the junction termination extension structure is lower than a doping concentration of the buried guard ring.
TAKANA teaches a device, wherein a doping concentration of the junction termination extension structure is lower than a doping concentration of the buried guard ring (6a and 6 are p- regions and 5a and 5 are p+ regions, see fig 4).
SAITO and TANAKA are analogous art because they both are directed towards semiconductor transistor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of SAITO with the specific doping concentrations of TANAKA because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of SAITO with the specific doping concentrations of TANAKA in order to increase breakdown voltage (see TANAKA para 17).
Regarding claim 12, SAITO discloses the semiconductor device of claim 1, wherein the shielding doped region and the ring-shaped doped regions are laterally separated from each other (34a is laterally separated from 37a and 37b, see fig 2).
SAITO fails to explicitly disclose a device wherein the ring-shaped doped regions and the shielding doped region have the same thickness.
TAKANA teaches a device wherein the buried guard ring and the shielding doped region have the same thickness (4 and 5 have a same thickness, see fig 4).
SAITO and TANAKA are analogous art because they both are directed towards semiconductor transistor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of SAITO with the specific layer thicknesses of TANAKA because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of SAITO with the specific layer thicknesses of TANAKA in order to increase breakdown voltage (see TANAKA para 17).
Claim(s) 8-9 is/are rejected under 35 U.S.C. 103 as being unpatentable over SAITO (US 20150084124) and TANAKA (US 20230307535) in view of SAITO ‘422 (US 20160329422).
Regarding claim 8, SAITO and TANAKA disclose the semiconductor device of claim 5.
SAITO fails to explicitly disclose a device, further comprising a plurality of trench isolation structures disposed in the substrate and located in the termination region,
wherein the plurality of trench isolation structures are correspondingly disposed directly above the plurality of laterally separated ring-shaped doped regions.
SAITO ‘422 teaches a device, further comprising a plurality of trench isolation structures disposed in the substrate and located in the termination region (fig 1-2, 53, para 41),
wherein the plurality of trench isolation structures are correspondingly disposed directly above the plurality of laterally separated ring-shaped doped regions (53 are above 56, see fig 2, para 41).
SAITO and SAITO ‘422 are analogous art because they both are directed towards semiconductor transistor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of SAITO with the plurality of trench isolation structures of SAITO ‘422 because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of SAITO with the plurality of trench isolation structures of SAITO ‘422 in order to improve the voltage resistance (see SAITO para 7).
Regarding claim 9, SAITO and TANAKA disclose the semiconductor device of claim 8.
SAITO fails to explicitly disclose a device, wherein the plurality of trench isolation structures pass through the junction termination extension structure, and
bottom surfaces of the plurality of trench isolation structures are at the same level in the height with a bottom surface of the trench.
SAITO ‘422 teaches a device, wherein the plurality of trench isolation structures pass through the junction termination extension structure (53 passes through 51, see fig 2, para 41), and
bottom surfaces of the plurality of trench isolation structures are at the same level in the height with a bottom surface of the trench (bottom surfaces of 34 and 53 are located at a depth into 12, see fig 2, para 42).
SAITO and SAITO ‘422 are analogous art because they both are directed towards semiconductor transistor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of SAITO with the plurality of trench isolation structures of SAITO ‘422 because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of SAITO with the plurality of trench isolation structures of SAITO ‘422 in order to improve the voltage resistance (see SAITO para 7).
Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over SAITO (US 20150084124) in view of SUZUKI (US 20090200559).
Regarding claim 11, SAITO discloses the semiconductor device of claim 1.
SUZUKI fails to explicitly disclose a device, wherein a thickness of the junction termination extension structure is greater than a thickness of the buried guard ring.
TAKANA teaches a device, wherein a thickness of the junction termination extension structure is greater than a thickness of the buried guard ring (the base region 303 which is part of the junction extension region can have a thickness of 2 microns, and part of the guard ring 316 can have a thickness of 0.7 microns, see fig 31a, para 204 and 217).
SAITO and SUZUKI are analogous art because they both are directed towards semiconductor transistor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of SAITO with the layer thicknesses of SUZUKI because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of SAITO with the layer thicknesses of SUZUKI in order to increase the channel mobility (see SUZUKI para 159).
Claim(s) 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over SAITO (US 20150084124) in view of OHSE (US 20180308972).
Regarding claim 13, SAITO discloses the semiconductor device of claim 1.
SUZUKI fails to explicitly disclose a device, wherein both the buried guard ring and the junction termination extension structure are electrically coupled to the source electrode or a ground terminal.
OHSE teaches a device, wherein both the buried guard ring and the junction termination extension structure are electrically coupled to a source electrode or a ground terminal (32 and 4a are both connected to 14 by 6, see fig 10, para 49 and 47).
SUZUKI and OHSE are analogous art because they both are directed towards semiconductor transistor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of SUZUKI with the coupling of OHSE because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of SUZUKI with the coupling of OHSE in order to improve reliability (see OHSE para 3).
Response to Arguments
Applicant’s arguments with respect to claim(s) 1 and 12 have been considered but are moot because the new ground of rejection does not rely on the combination of references applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JONAS TYLER BEARDSLEY whose telephone number is (571)272-3227. The examiner can normally be reached 930-600 M-F.
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/JONAS T BEARDSLEY/Examiner, Art Unit 2811
/SAMUEL A GEBREMARIAM/Primary Examiner, Art Unit 2811
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