DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
1. The information disclosure statement (IDS) submitted on 7/12/2023 and is in compliance with the provisions of 37 CFR 1.97. According, the information disclosure statement is being considered by the Examiner.
Election/Restrictions
2. Applicant elected, without traverse, Species I of Figs. 4-10 with claims 1-3, 7-9, 16-18 and 20 as readable on the elected invention, in the reply filed on 1/20/2026 is acknowledged. Claims 4-6, 10-15, and 19 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected claim invention. Claims 1-3, 7-9, 16-18 and 20 are presented for examination.
Examiner Notes
3. Examiner cites particular paragraphs, columns and line numbers in the references as applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the applicant fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner.
Claim Rejections - 35 USC § 102
4. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
5. Claims 1 and 16-17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ohtsuka et al. (US. Pub. 2016/0169958; hereinafter “Ohtsuka”).
Regarding claim 1, Ohtsuka discloses a defect evaluation method for evaluating a defect due to electrostatic discharge (“an object of the present invention is to find the dielectric breakdown voltage and timing at which discharge occurred on a test sample such as a circuit board in a test performed through use of an electrostatic discharge test apparatus. Thus, it becomes possible to know the timing at which an electrical anomalous phenomenon such as discharge occurred on a test sample as a result of application of steep voltage such as electrostatic discharge” in paragraph [0009]), the defect evaluation method comprising: obtaining a charged map of a lower part of a test object (a charged map is obtained from a circuit configuration having circular electrodes located at a lower part of a to-be-tested board or a test object in Fig. 8); preparing a test pattern (arranging voltage application electrode and ground electrode are formed into a test electrodes pattern in Fig. 8 and [0047]) simulating the charged map of the lower part of the test object (“A charge voltage Vic is input to an electrostatic discharge tester as a test condition... Along with this charge voltage Vic, various conditions which constitute an electric circuit. The electrostatic discharge tester generates a voltage having an impulse-shaped waveform on the basis of the test conditions, and the evaluation section main body simulates the waveform of the impulse voltage applied to the test sample, on the basis of the test conditions and the electrical circuit conditions of the test circuit.” in [0027] and also see [0047-51]); contacting the test object (the to-be-tested board) to the test pattern (see Fig. 8); and applying a voltage to the test pattern (“The voltage application electrode and the ground electrode are formed by patterning copper foil on a printed wiring board having a thickness of 1.6 mm. A pointed end of a contact discharge tip (discharge electrode) of an ESD gun connected to an ESD tester is brought into contact with the left end of the electrode indicted by (I) in FIG. 8…”).
Regarding claim 16, Ohtsuka discloses a defect evaluation device which evaluates a defect due to electrostatic discharge (“an object of the present invention is to find the dielectric breakdown voltage and timing at which discharge occurred on a test sample such as a circuit board in a test performed through use of an electrostatic discharge test apparatus. Thus, it becomes possible to know the timing at which an electrical anomalous phenomenon such as discharge occurred on a test sample as a result of application of steep voltage such as electrostatic discharge” in paragraph [0009]), the defect evaluation device comprising: a test pattern (arranging voltage application electrode and ground electrode are formed into a test electrodes pattern in Fig. 8 and [0047]) which simulates a charged map of a lower part of a test object, and includes a metal (“A charge voltage Vic is input to an electrostatic discharge tester as a test condition... Along with this charge voltage Vic, various conditions which constitute an electric circuit. The electrostatic discharge tester generates a voltage having an impulse-shaped waveform on the basis of the test conditions, and the evaluation section main body simulates the waveform of the impulse voltage applied to the test sample, on the basis of the test conditions and the electrical circuit conditions of the test circuit.” in [0027] and also see [0047-51]); a voltage supply connected to the test pattern (“The voltage application electrode and the ground electrode are formed by patterning copper foil on a printed wiring board having a thickness of 1.6 mm. A pointed end of a contact discharge tip (discharge electrode) of an ESD gun connected to an ESD tester is brought into contact with the left end of the electrode indicted by (I) in FIG. 8…”); a detector (a horn antenna) which detects the defect in the test object (“An electromagnetic wave antenna measures a radiation electromagnetic wave signal generated from the electrostatic discharge tester when the electrostatic discharge tester is driven and a radiation electromagnetic wave signal generated from the test sample when discharge or dielectric breakdown occurs”, see [0011]); and an electrometer (an optical sensor disposed on the to-be-tested board for measuring electrical discharge, see [0036]) disposed on the test object.
Regarding claim 17, Ohtsuka discloses the defect evaluation device of claim 16, wherein the electrometer applies the voltage to the test object while gradually increasing the voltage (“The electrostatic discharge tester generates a voltage having an impulse-shaped waveform on the basis of the test conditions, and the evaluation section main body simulates the waveform of the impulse voltage applied to the test sample, on the basis of the test conditions and the electrical circuit conditions of the test circuit. he electrostatic discharge tester can apply a high impulse voltage having a very steep waveform whose rising time is 1 ns or less like electrostatic discharge” in [0027]. Also see [0015]).
6. Claims 1-3 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Honda et al. (US. Pub. 2013/0234749; hereinafter “Honda”).
Regarding claim 1, Honda discloses a defect evaluation method for evaluating a defect due to electrostatic discharge (a method of testing malfunction caused by a discharge phenomenon generated inside the electronic equipment, see abstract), the defect evaluation method comprising: obtaining a charged map of a lower part of a test object (a charged map is obtained from an arrangement electrode pattern located at a lower part of an electronic equipment under test P or a test object P as shown in Figs. 7A, 8A-8C, 9A-9B, and 11A-11C); preparing a test pattern (arranging emission electrodes are formed into a test electrodes pattern, see Figs. 7A, 8A-8C, 9A-9B, and 11A-11C) simulating the charged map of the lower part of the test object (“the testing apparatus 110 makes it possible to check whether or not malfunction occurs by simulating various electric field fluctuation patterns so as to cause induction charging inside the electronic equipment P”, see [0099]); contacting the test object to the test pattern (see contacting the test object P to the test pattern in Figs. 7A, 8A-8C, 9A-9B, and 11A-11C); and applying a voltage to the test pattern (“electric field fluctuating means 30, the positive and negative induction charging phenomena can be generated in the electronic equipment P only by supplying either positive or negative single polarity voltage to the emission electrode 20”, see [0088]).
Regarding claim 2, Honda discloses the defect evaluation method of claim 1, wherein the preparing the test pattern includes: spacing a plurality of metal rods apart from each other along one direction with a predetermined interval (see such as Figs. 8D and 11E).
Regarding claim 3, Honda discloses the defect evaluation method of claim 2, wherein the applying the voltage to the test pattern includes: applying the voltage to the plurality of metal rods (see [0088, 107] and Figs. 8D and 11E).
Claim Rejections - 35 USC § 103
7. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
8. Claims 16-17 are rejected under 35 U.S.C. 103 as being unpatentable over Honda in view of Kikunaga et al. (US. Pub. 2014/0091806; hereinafter “Kikunaga”).
Regarding claim 16, Honda discloses a defect evaluation device which evaluates a defect due to electrostatic discharge (a testing apparatus configured to test malfunction caused by a discharge phenomenon generated inside the electronic equipment, see abstract), the defect evaluation device comprising: a test pattern which simulates a charged map of a lower part of a test object, and includes a metal (a charged map is obtained from an arrangement electrode pattern located at a lower part of an electronic equipment under test P or a test object P as shown in Figs. 7A, 8A-8C, 9A-9B, and 11A-11C); a voltage supply connected to the test pattern “electric field fluctuating means 30, the positive and negative induction charging phenomena can be generated in the electronic equipment P only by supplying either positive or negative single polarity voltage to the emission electrode 20”, see [0088]); a detector (discharge detection means) which detects the defect in the test object (“the immunity of the electronic equipment P against the electric field may be verified by appropriately utilizing information such as the number of discharge phenomena occurred inside the electronic equipment P by the discharge detection means, the magnitude of the amplitude when a discharge waveform is detected (noise intensity), and whether or not the electronic equipment P is actually causing malfunction”, see [0094]); and Honda does not explicitly specify that an electrometer disposed on the test object.
Kikunaga discloses an electrometer measures the quantity of static electricity by bringing a probe closer to a tested object and causing a detecting electrode to receive electrostatic field intensity from an electrified object by electrostatic induction (see [00114]).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to employ the testing apparatus of Honda by having an electrometer disposed on the test object as taught by Kikunaga for purpose of providing electrostatic amount of electronic and mechanical components can be measured reliably with high accuracy.
Regarding claim 17, Honda and Kikunaga disclose the defect evaluation device of claim 16, Honda further teaches wherein the electrometer applies the voltage to the test object while gradually increasing the voltage (see [0086-87]).
Regarding claim 18, Honda and Kikunaga discloses the defect evaluation device of claim 16, Honda further teaches wherein the test pattern includes: a plurality of metal rods spaced apart from each other along one direction with a predetermined interval (see such as Figs. 8D and 11E).
Allowable Subject Matter
9. Claims 7-9 and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if corrected to overcome the claim objections set forth above in this Office action and to include all of the limitations of the base claim, any intervening claims.
Regarding claim 7 and similarly claim 20, the cited references, alone or in combination, do not disclose nor fairly suggest:
“ … the preparing the test pattern includes: spacing a plurality of first metal rods apart from each other along one direction with a predetermined interval; disposing a second metal rod on one end of the plurality of first metal rods to crossing the plurality of first metal rods; connecting a resistor to the second metal rod; and connecting a ground terminal to the resistor” in combination with all other elements as claimed in claim 7.
As to claim(s) 8-9, the claims are allowable as they are further limitation of claim 7.
Conclusion
9. Any inquiry concerning this communication or earlier communications from the examiner should be directed to THANG LE whose telephone number is (571)272-9349. The examiner can normally be reached on Monday thru Friday 7:30AM-5:00PM EST.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Huy Phan can be reached on (571) 272-7924. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/THANG X LE/Primary Examiner, Art Unit 2858
2/19/2026