DETAILED ACTION
This Office Action is in response to Applicant’s Amendment dated 3/30/2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 8-12 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
► With respect to claim 8,
Line 12, it is not clear how the substrate can be in the channel. ***Suggestion: “on the substate in the channel” should be changed to “in the channel on substrate” to clarify scope of claim.
► With respect to claim 9,
Line 4, “the filler dielectric” lacks antecedent basic
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1 and 4-5 are rejected under 35 U.S.C. 102(a)(1) and 102(a))(2) as being anticipated by Adrian [US 5,654,216]
► With respect to claim 1, Adrian (fig 8, cols 1-6) discloses the claimed device comprising:
a substrate (1);
one or more structures (22, col! 5 lines 15-17: composite interconnect metallization structure 22 composed of barrier layer 13/aluminum base 12, titanium nitride 11) disposed on the substrate, each structure comprising a metal liner (11), and a stack metal (12/13) ;
a first structure (first structure 22 electrically connected tungsten plug 10 to source drain region 4/5) of the one or more structures comprising a first metal containing feature (metal via structure 14b, col, col 4 lines 58-60) disposed above the stack metal;
a second structure (second structure 22 electrically connected to tungsten plug 10 on FOX 10) of the one or more structures adjacent the first structure and comprising a first metal containing feature (14b) disposed above the stack metal;
a filler dielectric (18, col 5 lines 32-33: SOG 18)) disposed in a channel (space between the first right structure 22 and the second right structure 22) on a surface of the substate between the first and second structures;
a first dielectric liner (17) disposed between the channel and the first structure, wherein the first dielectric liner is disposed on sides of the metal liner, the stack metal and a portion of the first metal containing feature of the first structure;
a second dielectric liner (17) disposed between the channel and the second structure, wherein the second dielectric liner disposed on sides of the metal liner, the stack metal, and a portion of the second metal containing feature of the second structure;
a dielectric stop layer (19, col 5 lines 41-67 & col 6 lines 1-11, fig 8: the dielectric layer 19 functioning as the dielectric stop layer for forming overlying interconnect metallization structure 23) disposed above at least a portion of the channel, the first dielectric liner and the second dielectric liner.
► With respect to claim 4, Adrian (fig 8) discloses the first metal containing feature (14b) is substantially aligned with the stack metal of the first structure.
► With respect to claim 5, Adrian (fig 8) discloses wherein a height of the second structure comprising the first metal containing feature is substantially equal to a height of the filler dielectric within the channel.
Claims 1-5, 7-13 and 15, as being best understood, are rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by Huang et al [US 2014/0252624]
► With respect to claim 1, Huang et al (fig 11, text [0001]-[0041]) discloses the claimed device comprising:
a substrate (20);
one or more structures (36/28) disposed on the substrate, each structure comprising a metal liner (28, text [0016]) and a stack meta (text [0017]-[0019l) disposed on the metal liner;
a first structure of the one or more structures further comprising a first metal containing feature (50/66, text [0027]-[0029]) disposed above the stack metal;
a second structure of the one or more structures adjacent the first structure and further comprising a second metal containing feature (50/66, text [0027]-[0029]) disposed above the stack metal;
a filler dielectric (42) disposed in a channel (space between the first structure 36/28 and the second structure 36/28) on a surface of the substrate between the first and second structures;
a first dielectric liner (38, text [0020]: nitrogen doped silicon carbide, silicon nitride or aluminum oxide) disposed between the channel and the first structure, wherein the first dielectric liner is disposed on sides of the metal liner, the stack metal, and a portion of the first metal containing feature of the first structure;
a second dielectric liner (38, text [0020]: nitrogen doped silicon carbide, silicon nitride or aluminum oxide) disposed between the channel and the second structure, wherein the second dielectric liner is disposed on sides of the metal liner, the stack metal, and a portion of the second metal containing feature of the second structure;
a dielectric stop layer (40, text [0021]: silicon oxide doped carbon) disposed above at least a portion of the channel, the first dielectric liner, and the second dielectric liner.
► With respect to claim 2, Huang et al discloses the second metal containing feature comprises a lower portion that substantially aligned with the stack metal and an upper portion that is wider than the lower portion.
► With respect to claim 3, Huang et al (text [0022]) discloses the filler dielectric has air gaps (pores).
► With respect to claim 4, Huang et al discloses the first metal containing feature is substantially aligned with the stack metal of the first structure.
► With respect to claim 5, Huang et al discloses a height of the lower portion of the second metal containing feature is substantially equal to a height of the filler dielectric within the channel.
► With respect to claim 7, Huang et al discloses wherein the dielectric stop layer includes at least one of silicon carbonitride and silicon carboxide, and the first dielectric liner and the second dielectric liner each comprises at least one of silicon oxide and silicon nitride silicon carbonitride, silicon nitride, or aluminum oxide.
► With respect to claim 8, as being best understood, Huang et al (fig 11, text [0001]-[0041]) discloses the claimed device comprising:
a substrate (20/24/26);
one or more structures (36/28) disposed on the substrate, each structure comprising a metal liner (28, text [0016]) and a stack metal (36);
a first structure of the one or more structures further comprising a first oxide layer (38) and a first metal containing feature (50/66, text [0027]-[0029]) )disposed on the stack metal;
a second structure of the one or more structures further comprising a second oxide layer (38) and a second metal containing feature (50/66, text [0027]-[0029]) disposed on the stack metal;
a channel (spaces between adjacent structures 28/36) to a surface of the substrate is disposed between adjacent structures;
a surface filler dielectric (42) disposed in the channel on the substrate.
► With respect to claim 9, as being best understood, Huang et al (text [0022]) discloses the surface filler dielectric disposed in the channel has air gaps.
► With respect to claim 10, Huang et al discloses a filler dielectric (40) disposed on the first oxide layer and the second oxide layer.
► With respect to claim 11, Huang et al discloses the first oxide layer and the first metal containing feature are disposed adjacent to each other on the stack metal, and wherein the second oxide layer and the second metal containing feature are disposed adjacent to each other on the stack metal.
► With respect to claim 12, Huang et al (text [0022]) discloses the surface dielectric layer comprises silicon dioxide, silicon nitride, silicon carbonitride, or silicon carboxide.
► With respect to claim 13, Huang et al (fig 11, text [0001]-[0041]) discloses the claimed device comprising:
a substrate (20/24/26) having one or more structures (28/36/50/66) disposed on the substrate;
a first structure of the one or more structures disposed on the substrate comprising a first metal liner (28) disposed on the substrate, a first stack metal (36) disposed on the first metal liner, and a first metal containing feature (50/66) disposed on the first stack metal;
a second structure of the one or more structures disposed on the substrate comprising a second metal liner (28) disposed on the substrate, a second stack metal (36) disposed on the second metal liner, and a second metal containing feature (50/66)disposed on the second stack metal;
a first dielectric liner (38) disposed on sidewalls sides of the first structure;
a second dielectric liner (38) disposed on sidewalls sides of the second structure;
a first filler dielectric (40) disposed in a channel (space between the first structure and the second structure) and on a surface of the substrate and between the first and second dielectric liners
a dielectric stop layer (70) disposed above the first filler dielectric;
a secondary dielectric layer (72) disposed on the dielectric stop.
► With respect to claim 15, Huang et al discloses a second filler dielectric (74) disposed on the secondary dielectric layer.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 6, 14 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Huang et al [US 2014/03252624]
► With respect to claims 6, 14 and 16, the claimed range thickness would have been obvious to an ordinary artisan practicing the invention because, absent evidence of disclosure of criticality for the range giving unexpected results, it is not inventive to discover optimal or workable ranges by routine experimentation. In re Aller, 220 F.2d 454, 105 USPQ 233, 235 (CCPA 1955). Furthermore, it appears that these changes produce no functional differences and therefore would have been obvious. See In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Claims 17-20 are rejected under 35 U.S.C. 103 as being unpatentable over Huang et al [US 2014/03252624] in view Noguchi et al [US 2003/0183940]
► With respect to claim 17, Huang et al substantially discloses the claimed device but does not expressly teach comprising an interconnect layer disposed above the first and second metal containing features.
However, Noguchi et al (fig 26, text [0001]-[00163]) teaches comprising an interconnect layer (61) disposed above the first and second metal containing features (38).
Therefore, it would have been obvious for those skilled in the art to modify device of Huang et al by including the interconnect layer as being claimed, per taught by Noguchi et al, to provide designed conductive path as being needed for device operation.
► With respect to claim 18, the same reason given above, Noguchi et al teaches the interconnect layer comprises a second metal liner (38a) and a second metal stack (38b).
► With respect to claim 19, the same reason given above, Noguchi et al teaches a surface filler (62)
partially disposed over the first metal containing feature.
► With respect to claim 20, the same reason given above, Noguchi et al teaches the interconnect layer (61) comprises a surface metal layer (38b, similar to fig 25)
Response to Arguments
Applicant’s arguments with respect to claims 1-20 have been considered but are moot in new ground of rejection.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to THANHHA S PHAM whose telephone number is (571)272-1696. The examiner can normally be reached Monday-Friday.
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/THANHHA S PHAM/Primary Examiner, Art Unit 2812
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