DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Acknowledgement
Applicant’s response and amendments to the claims dated 04/07/2026 to the non-Final Office Action dated 01/22/2026 are acknowledged. Claims 1-20 remain pending.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-8 are rejected under 35 U.S.C. 103 as being unpatentable over Wang et. al., U. S. Pat. Pub. 2013/0307060, hereafter Wang, in view of KR20090125363, hereafter ’63, and further in view of Liao et. al., U.S. Pat. Pub. 2023/0326969, hereafter Liao.
Regarding claim 1, Wang discloses (Figs 5-18) a method, comprising:
providing a device structure including an epitaxial layer [302], [304] and a hard mask [306], [540] (par. [0044]) over the epitaxial (par. [0030],[0039]) layer[302],[304];
forming (Fig. 8) a trench [810], [812] through the epitaxial layer [304], wherein the trench is defined by a sidewall, a bottom, and a corner at an intersection of the sidewall and the bottom (The trenches [810], [812] have bottoms and sidewalls);
etching (Fig. 8, par. [0045]. last sentence) the trench to increase rounding of the corner.
Wang fails to explicitly disclose
implanting the device structure by delivering ions into the corner and into the bottom of the trench.
However, ’63 discloses (figs 4a, 4b, 5, 6)
implanting the device structure by delivering ions (oxygen ion implantation is performed) into the corner and into the bottom of the trench.
It would have been obvious to one having ordinary skill in the art prior to effective filing date of the instant application to replace intermediate step of formation of sacrificial oxide in the trench for rounding corners by thermal oxidation (par. [0045], last 2 sentences) with formation of said sacrificial oxide layer by ion implantation, as taught in ’63, because ion implantation provides a much better control over the thickness of sacrificial oxide layer and the corner rounding process.
Wang in view of ’63 fails to explicitly disclose
wherein the device structure is implanted at a temperature below 0° C.
However, Liao discloses (par. [0014])
wherein the device structure is implanted at a temperature below 0° C.
It would have been obvious to one of ordinary skill in the art prior to effective filing date of the instant application to use an ultra cold implant technique of Liao in the method of Wang, because Liao teaches (par. [0003]) that low temperatures reduce thermal diffusion, which allows scaling of devices to smaller sizes
Regarding claim 2, Wang in view of ’63 in view of Liao discloses everything as applied above. Wang further discloses (Fig. 12) further comprising removing the hard mask [306], [540] after the trench [810], [812] is etched.
Regarding claim 3, Wang in view of ’63 in view of Liao discloses everything as applied above. ’63 further discloses wherein implanting the trench comprises: performing a first ion implant at a non-zero angle relative to a perpendicular extending from a plane defined by top surface of the mask (Fig. 4a); and performing a vertical, second ion implant (Fig. 4b).
It would have been obvious to one having ordinary skill in the art prior to effective filing date of the instant application to replace intermediate step of formation of sacrificial oxide in the trench for rounding corners by thermal oxidation (par. [0045], last 2 sentences) with formation of said sacrificial oxide layer by ion implantation, as taught in ’63 for the reasons applied in the rejection of claim 1 above.
Regarding claim 4, Wang in view of ’63 in view of Liao discloses everything as applied above. ’63 further discloses (Fig. 4a) wherein implanting the trench further comprises delivering ions of the first ion implant into the sidewall of the trench (area [101] in Fig. 4a).
It would have been obvious to one having ordinary skill in the art prior to effective filing date of the instant application to replace intermediate step of formation of sacrificial oxide in the trench for rounding corners by thermal oxidation (par. [0045], last 2 sentences) with formation of said sacrificial oxide layer by ion implantation, as taught in ’63 for the reasons applied in the rejection of claim 1 above.
Regarding claim 5, Wang in view of ’63 in view of Liao discloses everything as applied above. Wang further discloses (par. [0045]) wherein etching the trench comprises performing a wet etch (for rounding corners).
Regarding claim 6, Wang in view of ’63 in view of Liao discloses everything as applied above. Wang further discloses further comprising (Figs 9, 10): forming a thermal gate oxide layer [240] within the trench [810], [812] (Fig. 9, par. [0046]); and
forming (Fig.10, par. [0047]) polysilicon gate material [250], [260] over the thermal gate oxide [240].
Regarding claim 7, Wang in view of ’63 in view of Liao discloses everything as applied above. Wang further discloses (par. [0045, last 2 sentences) further comprising: forming a sacrificial oxide within the trench; removing the sacrificial oxide; and forming a polysilicon gate material (Fig. 10, par. [0047]) within the trench [810], [820].
Wang fails to explicitly disclose forming the polysilicon gate material after an annealing. However, ’63 discloses (Fig. 5) formation of the sacrificial oxide [141] by annealing (heat treatment) of implanted oxygen ions [101] (Fig. 4). Annealing is therefore necessary to form sacrificial oxide layer in ’63, and the annealing step must be performed prior to the forming the polysilicon gate.
It would have been obvious to one having ordinary skill in the art prior to effective filing date of the instant application to replace intermediate step of formation of sacrificial oxide in the trench for rounding corners by thermal oxidation (par. [0045], last 2 sentences) with formation of said sacrificial oxide layer by ion implantation, as taught in ’63 for the reasons applied in the rejection of claim 1 above.
Regarding claim 8, Wang in view of ’63 in view of Liao discloses everything as applied above. Wang further discloses (Figs 13-18) further comprising providing a source region [270], [272] over a well [324], wherein the trench [810],[812] is formed through the epitaxial layer [304], the well [324], and the source region [270], [272].
Claims 9-11, 15, and 16-18 are rejected under 35 U.S.C. 103 as being unpatentable over Pan et. al., U. S. Pat. Pub. 2009/0315083, hereafter Pan, in view of KR20090125363, hereafter ’63, and further in view of Liao et. al., U.S. Pat. Pub. 2023/0326969, hereafter Liao.
Regarding claim 9, Pan discloses (Figs 4-6) a method of forming a transistor, comprising: providing a device structure (Figs 5,6) including a well [522] in an epitaxial layer [534], and a hard mask [401] (Fig. 4C) over the well [522] (par. [0059], the method of Fig. 4 is performed for the structure of Fogs 5-6);
forming a trench [510] through the well [522] and the epitaxial layer [534], wherein the trench is defined by a sidewall, a bottom, and a corner at an intersection of the sidewall and the bottom (Fig. 4C); etching the trench (Fig. 4D) to increase rounding of the corner, wherein the etching is performed while the hard mask [401] (Fig. 4C) is present over the well [522].
Pan fails to explicitly disclose
amorphizing the trench by delivering ions into a surface of the corner and into a surface of the bottom of the trench.
However, ’63 discloses (Figs 4a, 4b, 5,6)
amorphizing the trench [111] by delivering ions (which inherently damages the crystal lattice and amorphizes the target surface prior to annealing) into a surface of the corner (Fig. 4a) and into a surface of the bottom (Fig. 4b) of the trench [111].
It would have been obvious to one having ordinary skill in the art prior to effective filing date of the instant application to replace intermediate step of corner rounding by silicon etching of Pan with the method of rounding corners of the trench by forming of a sacrificial oxide layer by ion implantation, as taught in ’63 because ion implantation provides a much better control over the thickness of sacrificial oxide layer and the corner rounding process.
Pan in view of ’63 fails to explicitly disclose
wherein the ions are delivered while the device structure is held at a temperature below 0° C.
However, Liao discloses (par. [0014])
wherein the ions are delivered while the device structure is held at a temperature below 0° C.
It would have been obvious to one of ordinary skill in the art prior to effective filing date of the instant application to use an ultra cold implant technique of Liao in the method of Pan, because Liao teaches (par. [0003]) that low temperatures reduce thermal diffusion, which allows scaling of devices to smaller sizes.
Regarding claim 10, Pan in view of ’63 in view of Liao discloses everything as applied above. Pan further discloses (Figs 4-6) further comprising removing the hard mask [401] after the trench [410] is etched.
Regarding claim 11, Pan in view of ’63 in view of Liao discloses everything as applied above. ’63 further discloses (Figs 4a, 4b) wherein amorphizing the trench comprises: performing a first ion implant (Fig. 4a) at a non-zero angle relative to a perpendicular extending from a plane defined by top surface of the device structure; and performing a second ion implant (Fig. 4b), wherein the ions of the second ion implant are delivered into the surface of the bottom of the trench [111].
Regarding claim 15, Pan in view of ’63 in view of Liao discloses everything as applied above. Pan further discloses (Fig. 5)
further comprising providing a source region [528] over the well [522], wherein the trench [510] is formed through the epitaxial layer [534], the well [522], and the source region [528].
Regarding claim 16, Pan discloses a method of forming a silicon carbide (par. [0067]) trench, the method comprising (Figs 4-6):
forming a hard mask [401] over an epitaxial layer [534] (Fig. 5, par. [0059]);
forming a trench [510] through the epitaxial layer [534], wherein the trench is defined by a sidewall, a bottom, and a corner at an intersection of the sidewall and the bottom;
etching the trench (Fig. 4D) to increase rounding of the corner, wherein the etching is performed while the hard mask [401] is present over the epitaxial layer [534] (Fig. 5).
Pan fails to explicitly disclose
amorphizing the trench by delivering ions into a surface of the corner and into a surface of the bottom of the trench.
However, ’63 discloses (Figs 4a, 4b, 5,6)
amorphizing the trench [111] by delivering ions into a surface of the corner (Fig. 4a) and into a surface of the bottom (Fig. 4b) of the trench [111].
It would have been obvious to one having ordinary skill in the art prior to effective filing date of the instant application to replace intermediate step of corner rounding by silicon etching of Pan with the method of rounding corners of the trench by forming of a sacrificial oxide layer by ion implantation, as taught in ’63 because ion implantation provides a much better control over the thickness of sacrificial oxide layer and the corner rounding process.
Pan in view of ’63 fails to explicitly disclose
wherein the ions are delivered while the device structure is held at a temperature below 0° C.
However, Liao discloses (par. [0014])
wherein the ions are delivered while the device structure is held at a temperature below 0° C.
It would have been obvious to one of ordinary skill in the art prior to effective filing date of the instant application to use an ultra cold implant technique of Liao in the method of Pan, because Liao teaches (par. [0003]) that low temperatures reduce thermal diffusion, which allows scaling of devices to smaller sizes
Regarding claim 17, Pan in view of '63 in view of Liao discloses everything as applied above. Pan further discloses (Figs 4-6) further comprising removing the hard mask [401] after the trench [410] is etched.
Regarding claim 18, Pan in view of ’63 discloses everything as applied above. ’63 further discloses (Figs 4a, 4b) wherein amorphizing the trench comprises: performing a first ion implant (Fig. 4a) at a non-zero angle relative to a perpendicular extending from a plane defined by top surface of the device structure; and performing a second ion implant (Fig. 4b), wherein the ions of the second ion implant are delivered into the surface of the bottom of the trench [111].
Claims 12-14 and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Pan et. al., U. S. Pat. Pub. 2009/0315083, hereafter Pan, in view of KR20090125363, hereafter ’63, in view of Liao et. al., U.S. Pat. Pub. 2023/0326969, hereafter Liao, and further in view of Wang et. al., U. S. Pat. Pub. 2013/0307060, hereafter Wang.
Regarding claims 12 and 19 (claims with identical limitations), Pan in view of ’63 in view of Liao discloses everything as applied above. Pan in view of ’63 fails to explicitly disclose wherein etching the trench comprises performing a wet etch process.
However, Wang discloses (par. [0045]) wherein etching the trench comprises performing a wet etch (for rounding corners).
It would have been obvious to one having ordinary skill in the art prior to effective filing date of the instant application to use wet etch for rounding corners as taught by Wang, because both wet and dry etching processes can be used to improve the shape of the trench gate optimizing the effect of corner electric field distortions to improve device performance.
Regarding claim 13, Pan in view of ’63 in view of Liao discloses everything as applied above. Pan in view of ’63 fails to explicitly disclose further comprising: forming a thermal gate oxide layer within the trench; and forming polysilicon gate material over the thermal gate oxide.
However, Wang discloses (Figs 9, 10, par. [0046],[0047]) further comprising: forming a thermal gate oxide layer [240] within the trench [810],[812]; and forming polysilicon gate material [250], [260] over the thermal gate oxide [240].
It would have been obvious to one having ordinary skill in the art prior to effective filing date of the instant application to use thermal silicon oxide as the gate dielectric and polysilicon as the gate electrode, as taught by Wang, because these materials are most widely used for this purpose and are readily used in semiconductor manufacturing processes.
Regarding claims 14 and 20, Pan in view of ’63 in view of Liao discloses everything as applied above. Pan in view of ’63 fails to explicitly disclose further comprising: forming a sacrificial oxide within the trench; removing the sacrificial oxide; and forming a polysilicon gate material within the trench after an annealing.
However, Wang discloses (par. [0045], last 2 sentences, par. [0047]) further comprising: forming a sacrificial oxide within the trench; removing the sacrificial oxide; and forming a polysilicon gate material within the trench.
Wang fails to explicitly disclose forming the polysilicon gate material after an annealing. However, ’63 discloses (Fig. 5) formation of the sacrificial oxide [141] by annealing (heat treatment) of implanted oxygen ions [101] (Fig. 4). Annealing is therefore necessary to form sacrificial oxide layer in ’63, and the annealing step must be performed prior to the forming the polysilicon gate.
It would have been obvious to one having ordinary skill in the art prior to effective filing date of the instant application to replace intermediate step of formation of sacrificial oxide in the trench for rounding corners by thermal oxidation (par. [0045], last 2 sentences) with formation of said sacrificial oxide layer by ion implantation, as taught in ’63, because a formation of sacrificial oxide by ion implantation offers more control over optimizing the corners of the gate trench for better device performance.
Response to Arguments
Applicant’s arguments and the Interview Summary regarding the March 4, 2026 interview have been considered. While it was agreed that the prior art of record (Wang and Shin) did not teach implanting at a temperature below 0°C, an updated search necessitated by Applicant’s amendment revealed the Liao reference, which explicitly teaches this limitation. Therefore, Applicant’s arguments against Wang and Shin are moot in light of the new ground of rejection applied herein.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to VICTOR V BARZYKIN whose telephone number is (571)272-0508. The examiner can normally be reached Monday-Friday, 9am-5pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, BRITT HANLEY can be reached at (571)270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/VICTOR V BARZYKIN/ Examiner, Art Unit 2893
/Britt Hanley/ Supervisory Patent Examiner, Art Unit 2893
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